CN105575330B - A kind of array base palte, its driving method and relevant apparatus - Google Patents
A kind of array base palte, its driving method and relevant apparatus Download PDFInfo
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- CN105575330B CN105575330B CN201610154492.9A CN201610154492A CN105575330B CN 105575330 B CN105575330 B CN 105575330B CN 201610154492 A CN201610154492 A CN 201610154492A CN 105575330 B CN105575330 B CN 105575330B
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- 238000000034 method Methods 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 claims description 30
- 230000000737 periodic effect Effects 0.000 claims description 24
- 238000010586 diagram Methods 0.000 description 6
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a kind of array base palte, its driving method and relevant apparatus, the array base palte includes：Several pixel cells being arranged in array, data wire and gate line, each pixel cell include a drive module being connected with data wire and gate line and a luminescent device being connected with drive module；Wherein, so that per two adjacent row pixel cells, as a pixel groups, two row pixel cells in each pixel groups share a data line, and a gate line is provided between adjacent rows pixel cell；The opposite polarity of the driving voltage of drive module in two pixel cells driven in same pixel groups and by same gate line.The opposite polarity of the driving voltage of drive module in two pixel cells for being located in the present invention in same pixel groups and being driven by same gate line, it can thus be worked by the two drive module intervals of a data line traffic control, and then data wire quantity is reduced in the case where not increasing row scan data line number amount.
Description
Technical Field
The invention relates to the technical field of organic electroluminescence, in particular to an array substrate, a driving method thereof and a related device.
Background
In the driving technology of an Organic Light Emitting Display (OLED) in the prior art, the number of row scan lines and the number of data lines are generally related to the resolution, and as the resolution is improved, the number of row scan lines and data lines is improved, so that the complexity in the aspects of display panel design and peripheral driving is improved, and the process difficulty is increased.
In summary, in the current OLED driving technology, although the number of data lines can be reduced by increasing the number of line scan signal lines, adding other gate units to the line scan, or disposing the scan signal lines on the array substrate, a certain complexity is added to the line scan design, which has a problem of reducing yield.
Disclosure of Invention
Embodiments of the present invention provide an array substrate, a driving method thereof and a related apparatus, which are used to reduce the number of data lines without increasing the number of row scan data lines.
An array substrate provided in an embodiment of the present invention includes: the pixel structure comprises a plurality of pixel units, data lines and gate lines, wherein each pixel unit comprises a driving module connected with the data lines and the gate lines and a light-emitting device connected with the driving module; wherein,
taking every two adjacent columns of pixel units as a pixel group, wherein two columns of pixel units in each pixel group share one data line, and a gate line is arranged between two adjacent rows of pixel units;
the polarities of the driving voltages of the driving modules in the two pixel units which are located in the same pixel group and driven by the same gate line are opposite.
According to the array substrate provided by the embodiment of the invention, the polarities of the driving voltages of the driving modules in the two adjacent pixel units driven by the same gate line are opposite, so that the two driving modules can be controlled to work at intervals by one data line, the number of the data lines can be reduced under the condition that the number of the row scanning data lines is not increased, the difficulty of routing the data lines in the display panel is reduced, the number or output number of driving ICs (integrated circuits) can be reduced, the cost is reduced, and the yield is improved.
Preferably, the driving module includes a switching transistor, a driving transistor, and a compensation module;
the source electrode of the switching transistor is connected with the data line, and the grid electrode of the switching transistor is connected with the grid line;
the grid electrode of the driving transistor is connected with the drain electrode of the switching transistor in the pixel unit, the drain electrode is connected with a power supply VDD, and the source electrode is connected with the light-emitting device;
and two ends of the compensation module are connected between the grid electrode and the source electrode of the driving transistor in the pixel unit.
Preferably, the two pixel units in the two pixel units located in the same pixel group and driven by the same gate line, wherein the driving transistor in one pixel unit is a P-type transistor, and the driving transistor in the other pixel unit is an N-type transistor.
Preferably, the driving transistors in two rows of pixel units in the same pixel group are both P-type transistors, and the driving transistors in the other row of pixel units are both N-type transistors.
Preferably, the types of the driving transistors in the pixel units of two adjacent columns are different.
The electroluminescent display device provided by the embodiment of the invention comprises the array substrate provided by the embodiment of the invention.
The display device provided by the embodiment of the invention comprises the electroluminescent display device provided by the embodiment of the invention.
The method for driving the array substrate provided by the embodiment of the invention comprises the following steps:
outputting a high-level signal to each gate line by line, wherein the duration time of the high-level signal consists of two time periods which are respectively used for driving two pixel units in the same pixel group to work;
and transmitting positive and negative periodic pulse signals to all data lines while outputting a high-level signal to any gate line, wherein positive pulse signals in the positive and negative periodic pulse signals are used for driving one pixel unit in each pixel group to work, and negative pulse signals in the positive and negative periodic pulse signals are used for driving another pixel unit in the pixel group to work.
Preferably, the duration of the high level signal is not less than the period duration of the positive and negative periodic pulse signals.
Preferably, in the two time periods of the high-level signal, the duration of the first time period is not less than the duration of a positive pulse signal in the positive and negative periodic pulse signals; the duration of the second time period is not less than the duration of a negative pulse signal in the positive and negative periodic pulse signals.
Drawings
Fig. 1 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 2 is a detailed structural schematic diagram of an array substrate according to an embodiment of the present invention;
fig. 3 is a timing diagram of a line scan operation according to an embodiment of the present invention.
Detailed Description
The following describes in detail specific embodiments of a pixel circuit, a driving method thereof, and a related apparatus according to an embodiment of the present invention with reference to the accompanying drawings.
As shown in fig. 1, which is a schematic structural diagram of an array substrate according to an embodiment of the present invention, the array substrate includes: the liquid crystal display comprises a plurality of pixel units 10, data lines 20 and gate lines 30 which are arranged in an array, wherein each pixel unit 10 comprises a driving module 101 connected with the data lines 20 and the gate lines 30 and a light-emitting device 102 connected with the driving module 101; the pixel unit of each two adjacent columns is taken as a pixel group, the pixel units of two columns in each pixel group share one data line, and a gate line is arranged between the pixel units of two adjacent rows; the polarities of the driving voltages of the driving modules in the two pixel units which are located in the same pixel group and driven by the same gate line are opposite.
The array substrate provided by the embodiment of the invention comprises a plurality of pixel units 10 arranged in an array, and a data line 20 and a gate line 30 for driving the pixel units 10 to work, as shown in fig. 1, a pixel unit 10 is shown in a dotted line frame, each pixel unit 10 comprises a driving module 101 and a light emitting device 102, wherein the driving module 101 is connected with the data line 20 and the gate line 30, and the light emitting device 102 is connected with the driving module 101. Assuming that each two adjacent columns of pixel units are taken as a pixel group, that is, 6 pixel units 10 in fig. 1 are taken as a pixel group, two columns of pixel units in each pixel group share one data line, that is, 6 pixel units 10 (two columns of pixel units) in the figure share one data line 20; and one gate line 30 is disposed between every two adjacent rows of pixel units.
In practical implementation, in order to control the driving modules in two pixel units driven by the same gate line and in the same pixel group through one data line to operate at an interval, the driving voltages of the two driving modules are set to have opposite polarities, for example, in the two pixel units 10 in the first row in fig. 1, the driving voltage of the driving module 101 in the pixel unit 10 on the left side may be set to be a positive voltage, and the driving voltage of the driving module 101 in the pixel unit 10 on the right side may be set to be a negative voltage. Therefore, the array substrate provided by the embodiment of the invention can control two adjacent driving modules to work at intervals through one data line, so that the number of the data lines can be reduced under the condition of not increasing the number of the row scanning data lines, the wiring difficulty of the data lines in the display panel is reduced, the number or output number of the driving ICs can be reduced, the cost is reduced, and the yield is improved.
The array substrate provided by the embodiment of the invention can be applied to an OLED driving technology, and the driving module can be set according to requirements as long as the polarity of the driving voltage can be changed. In order to more clearly illustrate the above driving module, an embodiment of the present invention provides a detailed structural schematic diagram of a possible array substrate, and a specific structure of the driving module is shown in the drawing, as shown in fig. 2, a detailed structural schematic diagram of an array substrate is provided for an embodiment of the present invention. Preferably, the driving module 101 includes a switching transistor M1, a driving transistor M2, and a compensation module Cgs; the source electrode of the switching transistor M1 is connected with the data line, and the grid electrode is connected with the grid line; the gate of the driving transistor M2 is connected to the drain of the switching transistor M1 in the pixel cell, the drain is connected to the power supply VDD, and the source is connected to the light emitting device 102; the two ends of the compensation module Cgs are connected between the gate and the source of the driving transistor M2 in the pixel cell.
In specific implementation, the switching transistor M1 and the driving transistor M2 may be any transistors, such as thin film transistors TFT; and the compensation module Cgs may be configured as a storage capacitor; the light emitting device 102 may be an OLED. As shown in fig. 2, the source of the switching transistor M1 is connected to the data line, and the gate is connected to the gate line; the gate of the driving transistor M2 is connected to the drain of the switching transistor M1 in the pixel cell, the drain is connected to the power supply VDD, and the source is connected to the light emitting device 102; the two ends of the compensation module Cgs are connected between the gate and the source of the driving transistor M2 in the pixel unit, and are equivalent capacitances between the gate and the source of the driving TFT, which generally function to store charges to maintain the conduction of the driving TFT during DATA writing, thereby prolonging the light emitting time of the OLED. The source and drain of the switching transistor M1 may be interchanged, and the source and drain of the driving transistor M2 may be interchanged.
For the array substrate shown in fig. 2, in order to reverse the polarity of the driving voltage of the driving module in two pixel units adjacent to each other and driven by the same gate line, the two driving transistors may be provided in different types. Preferably, the two pixel units in the two pixel units located in the same pixel group and driven by the same gate line, wherein the driving transistor in one pixel unit is a P-type transistor, and the driving transistor in the other pixel unit is an N-type transistor.
As shown in fig. 2, the two pixel units 10 in each row are two pixel units in the same pixel group and driven by the same gate line, and preferably, one of the driving transistors in the two pixel units is a P-type transistor, and the other is an N-type transistor. In the implementation, the transistors may be enhancement type P-type or N-type transistors, or depletion type P-type or N-type transistors.
In particular, the type of the driving transistor in each column of pixel units may be set to be the same type for the convenience of control. Preferably, the driving transistors in two rows of pixel units located in the same pixel group are both P-type transistors, and the driving transistors in the other row of pixel units are both N-type transistors. In order to control the lighting sequence of the OLEDs, preferably, the types of the driving transistors in two adjacent rows of pixel units are different. Namely a row of P-type driving transistors and a row of N-type driving transistors, which are arranged at intervals.
Further, in the implementation, the types of the driving transistors in each column of pixel units may not be set to be the same. It is sufficient that the polarities of the driving voltages of the driving modules in the two adjacent pixel units driven by the same gate line can be controlled to be opposite. For example, as shown in fig. 2, the driving transistor in the first pixel unit in the first row may be set as an N-type transistor, and the driving transistor in the second pixel unit may be set as a P-type transistor; setting the driving transistor in the first pixel unit in the second row as a P-type transistor, and setting the driving transistor in the second pixel unit as an N-type transistor; and the driving transistor in the first pixel unit in the third row is set as an N-type transistor, and the driving transistor in the second pixel unit is set as a P-type transistor.
Based on the same inventive concept, embodiments of the present invention provide an electroluminescent display device, which includes the array substrate provided by embodiments of the present invention. Because the principle of solving the problems of the electroluminescent display device is similar to that of the array substrate, the implementation of the electroluminescent display device can be referred to the implementation of the array substrate, and repeated details are not repeated.
Based on the same inventive concept, embodiments of the present invention provide a display apparatus including the above electroluminescent display device provided by embodiments of the present invention. Since the principle of the display device to solve the problem is similar to that of the above electroluminescent display device, the implementation of the display device can be referred to the implementation of the above electroluminescent display device, and repeated details are not repeated.
Based on the same inventive concept, a method for driving the array substrate provided by the embodiment of the present invention includes: outputting high-level signals to each gate line by line, wherein the duration time of the high-level signals consists of two time periods and is respectively used for driving two pixel units in the same pixel group to work; and transmitting positive and negative periodic pulse signals to all data lines while outputting a high-level signal to any gate line, wherein positive pulse signals in the positive and negative periodic pulse signals are used for driving one pixel unit in each pixel group to work, and negative pulse signals in the positive and negative periodic pulse signals are used for driving another pixel unit in the pixel group to work.
According to the method for driving the array substrate provided by the embodiment of the invention, high-level signals are output to each gate line row by row, and positive and negative periodic pulse signals are sent to all data lines while high-level signals are output to any gate line, namely, the positive and negative periodic pulse signals are required to be sent to all data lines no matter which line is scanned. As shown in fig. 3, the line scan timing chart provided in the embodiment of the present invention includes DATA which is positive and negative periodic pulse signals loaded on DATA lines, GATE1, GATE2, and GATE3 which are high level signals loaded on GATE lines, where GATE1, GATE2, and GATE3 represent the high level signals loaded on the GATE lines corresponding to the pixel cells in row 3 in fig. 2, respectively.
In specific implementation, the GATE signal and the DATA signal shown in fig. 3 are loaded on the array substrate shown in fig. 2. Assuming that all of the driving transistors in the pixel cells in the left column in fig. 2 are N-type transistors, all of the driving transistors in the pixel cells in the right column are P-type transistors, and all of the switching transistors in the figure are N-type transistors, the DATA signal in fig. 3 is sent to all of the DATA lines when the pixel cells in the first row start scanning, the OLEDs on the left side in the pixel cells in the first row are turned on during a period T1, and the OLEDs on the right side in the pixel cells in the first row are turned on during a period T2; when the second row of pixel units is scanned, the left OLED in the second row of pixel units is lighted in a T3 time period, and the right OLED in the second row of pixel units is lighted in a T4 time period; when the third row of pixel cells scans, the left OLED in the third row of pixel cells is turned on during the T5 time period, and the right OLED in the third row of pixel cells is turned on during the T6 time period.
For the duration of the high level signal and the positive and negative periodic pulse signals, preferably, the duration of the high level signal is not less than the period duration of the positive and negative periodic pulse signals. That is, in fig. 3, the duration of the high level in the GATE signal is not less than the period duration of the DATA signal. Preferably, in two time periods of the high-level signal, the duration of the first time period is not less than the duration of the positive pulse signal in the positive and negative periodic pulse signal; the duration of the second time period is not less than the duration of the negative pulse signal in the positive and negative periodic pulse signals. That is, in fig. 3, the duration of the GATE signal in the period T1 is not less than the duration of the positive pulse signal in the DATA signal; the duration of the GATE signal during the period T2 is not less than the duration of the negative pulse signal in the DATA signal.
In specific implementation, the duration of the high-level signal may be set to be greater than the period duration of the positive and negative periodic pulse signals according to needs, so that the duration of lighting the OLEDs in the previous row may be maintained for a period of time when scanning the next row. The duration of the positive pulse signal and the duration of the negative pulse signal of the positive and negative periodic pulse signals can be set according to requirements, and the two can be equal or unequal.
In summary, in the array substrate provided in the embodiments of the present invention, the driving voltages of the driving modules in two adjacent pixel units driven by the same gate line have opposite polarities, so that the two driving modules can be controlled to work at an interval by one data line, and the number of the data lines can be reduced without increasing the number of the row scanning data lines, thereby reducing the difficulty of routing the data lines inside the display panel, and simultaneously reducing the number of driving ICs or the number of outputs, and improving the yield while reducing the cost.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (8)
1. An array substrate, comprising: the pixel structure comprises a plurality of pixel units, data lines and gate lines, wherein each pixel unit comprises a driving module connected with the data lines and the gate lines and a light-emitting device connected with the driving module; wherein,
taking every two adjacent columns of pixel units as a pixel group, wherein two columns of pixel units in each pixel group share one data line, and a gate line is arranged between two adjacent rows of pixel units;
the polarities of the driving voltages of the driving modules in the two pixel units which are positioned in the same pixel group and driven by the same gate line are opposite;
the driving module comprises a switching transistor, a driving transistor and a compensation module;
the source electrode of the switching transistor is connected with the data line, and the grid electrode of the switching transistor is connected with the grid line;
the grid electrode of the driving transistor is connected with the drain electrode of the switching transistor in the pixel unit, the drain electrode is connected with a power supply VDD, and the source electrode is connected with the light-emitting device;
two ends of the compensation module are connected between the grid and the source of the driving transistor in the pixel unit;
and the two pixel units are positioned in the same pixel group and driven by the same gate line, wherein the driving transistor in one pixel unit is a P-type transistor, and the driving transistor in the other pixel unit is an N-type transistor.
2. The array substrate of claim 1, wherein two rows of pixel units in the same pixel group are provided, wherein the driving transistors in one row of pixel units are both P-type transistors, and the driving transistors in the other row of pixel units are both N-type transistors.
3. The array substrate of claim 2, wherein the types of the driving transistors in two adjacent columns of pixel units are different.
4. An electroluminescent display device comprising the array substrate according to any one of claims 1 to 3.
5. A display device characterized in that it comprises an electroluminescent display device according to claim 4.
6. A method of driving the array substrate of any one of claims 1-3, the method comprising:
outputting a high-level signal to each gate line by line, wherein the duration time of the high-level signal consists of two time periods which are respectively used for driving two pixel units in the same pixel group to work;
and transmitting positive and negative periodic pulse signals to all data lines while outputting a high-level signal to any gate line, wherein positive pulse signals in the positive and negative periodic pulse signals are used for driving one pixel unit in each pixel group to work, and negative pulse signals in the positive and negative periodic pulse signals are used for driving another pixel unit in the pixel group to work.
7. The method of claim 6, wherein the high level signal lasts for a period not less than a period of the positive and negative periodic pulse signals.
8. The method according to claim 7, wherein, of the two periods of the high level signal, the first period has a duration not less than the duration of a positive pulse signal of the positive and negative periodic pulse signals; the duration of the second time period is not less than the duration of a negative pulse signal in the positive and negative periodic pulse signals.
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| KR102328177B1 (en) * | 2017-12-22 | 2021-11-19 | 삼성디스플레이 주식회사 | Display device |
| CN110197643B (en) * | 2019-07-05 | 2021-03-30 | 京东方科技集团股份有限公司 | Pixel driving circuit and display device |
| JP7422869B2 (en) | 2019-11-29 | 2024-01-26 | 京東方科技集團股▲ふん▼有限公司 | Array substrate, display panel, splicing display panel, and display driving method |
| CN111210772B (en) * | 2020-03-06 | 2021-03-09 | 京东方科技集团股份有限公司 | Display driving circuit, display panel and electronic equipment |
| CN114267297B (en) * | 2021-12-16 | 2023-05-02 | Tcl华星光电技术有限公司 | Pixel compensation circuit and method and display panel |
| CN115064105B (en) * | 2022-05-30 | 2023-05-26 | 惠科股份有限公司 | Pixel driving circuit and driving method of display panel and display device |
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| EP0536964B1 (en) * | 1991-10-05 | 1998-03-18 | Fujitsu Limited | Active matrix-type display device having a reduced number of data bus lines |
| JP5675601B2 (en) * | 2010-11-10 | 2015-02-25 | パナソニック株式会社 | Organic EL display panel and driving method thereof |
| CN103531150B (en) * | 2013-10-31 | 2015-06-10 | 京东方科技集团股份有限公司 | AC (alternating current)-driven pixel circuit, driving method and display device |
| CN105118425A (en) * | 2015-10-14 | 2015-12-02 | 京东方科技集团股份有限公司 | Display panel and display control method thereof as well as display device |
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