CN105553330A - Nonlinear piezoelectric energy recovery interface circuit inductor design and switch control method - Google Patents

Abstract

A nonlinear piezoelectric energy recovery interface circuit inductor design and switch control method provided by the invention takes into consideration the fact that inductors and switches have the characteristic of non-ideality and both have on resistance, and the interface circuit is not simply analyzed and designed in accordance with an LC oscillation circuit. In design of an SSHI circuit, by using the design method put forward by the invention, optimal system design can be achieved. The method is of important significance to actual piezoelectric energy recovery interface circuit design, and has an extensive application prospect in piezoelectric energy collection.

Description

Non-linear piezoelectric energy recovery interface circuit inductor design and method of controlling switch

Technical field

The present invention relates to field of energy-saving technology, more specifically, relate to a kind of non-linear piezoelectric energy recovery interface circuit inductor design and method of controlling switch.

Background technology

The equipment such as microelectronics system and wireless network node generally relies on chemical cell to power, but chemical cell limited useful life to cause changing frequent and waste battery also exists the problems such as environmental pollution.Therefore, the acquisition of the Nature energy and the large solution utilized into these problems.Wherein, the piezoelectric energy recovery utilizing the Nature to vibrate is for herein is provided possibility.

Can, in piezoelectric energy recovery, interface circuit obtains for system for whole piezoelectric energy, has vital status, be related to the efficiency of system and provide effective electric current and voltage for targeted loads.

The interface circuit of standard is made up of a diode full-wave bridge and a filter capacitor, but standard interface circuit regenerative power is low.In order to provide power, synchro switch inductance reclaims (SSHI) circuit and is carried out, and development afterwards extends into the circuit such as AC-P-SSHI, DC-P-SSHI, AC-S-SSHI, DC-S-SSHI.

Traditional synchro switch inductance recovery circuit is when mechanical activation amplitude reaches extreme value, and when namely piezoelectric element accumulating maximum amount of charge, Closing Switch, makes follow-up energy storage collecting circuit that the electric charge on piezoelectric element is all extracted into energy storage collecting circuit.Cut-off switch after half LC vibration period, again stored charge amount on the piezoelectric element, circulate successively.

But, in non-linear piezoelectric energy recovery interface circuit (comprising AC-P-SSHI, DC-P-SSHI, AC-S-SSHI, DC-S-SSHI) design, people often ignore the inductance of connection and switch also exists conducting resistance, still analyze according to the LC vibrating circuit of standard and carry out circuit design, causing piezoelectric energy recovery efficiency to there is deviation.Even if the quality factor Q of inductance introduced by part document, do not consider the impact of conducting resistance on circuit oscillation yet.

Summary of the invention

The object of the invention is to, a kind of non-linear piezoelectric energy recovery interface circuit inductor design and method of controlling switch are provided, by under truth, the non-ideal characteristic of the inductance and switch that there is conducting resistance includes analysis in, has great significance to the design of actual piezoelectric energy recovery interface circuit.

For realizing above goal of the invention, the technical scheme of employing is:

A kind of non-linear piezoelectric energy recovery interface circuit inductor design and method of controlling switch, the piezoelectric energy that wherein said non-linear piezoelectric energy recovery interface circuit stores for extracting piezoelectric element; Described non-linear piezoelectric energy recovery interface circuit comprises two working stages:

First stage: piezoelectric element is equivalent to a current source in parallel with a piezoelectric patches clamped capacitance, now switch disconnects, and current source charges to piezoelectric patches clamped capacitance, and piezoelectric patches clamped capacitance obtains output voltage;

Second stage: when voltage reaches extreme value on piezoelectric patches clamped capacitance, switch closes, and powers to the load;

Described inductor design and method of controlling switch are by controlling the induction reactance value of inductance, make non-linear piezoelectric energy recovery interface circuit be in underdamping state in second stage, and control switch close and last till that the moment of first extreme value appears in oscillating output voltage under underdamping state.

In second stage, under non-ideal characteristic, non-linear piezoelectric energy recovery interface circuit is pure LC oscillating circuit not, and switch there is conducting resistance and inductance also exists loss resistance.And piezoelectric patches clamped capacitance has certain voltage value in the first stage, according to the RLC second-order circuit principle having driving source, in the situation that piezoelectric element clamped capacitance is fixing, the different designs of inductance has 3 kinds of different damping state by making circuit: Critical damping state, overdamping state, underdamping state.In these three cases, voltage upset situation is different.

For critical damping and overdamp situation, second-order circuit voltage can not vibrate, and only exponentially rule can decay, and under underdamping condition, oscillatory extinction will occur.When initial voltage is identical, the state of overdamp and critical damping, the voltage after upset is close to 0.But polarity of voltage after underdamping state upset is contrary, maximum absolute value.Due to the first stage, the output voltage of piezoelectricity inner clip electric capacity is larger, piezoelectric energy recovery interface circuit just can collect more energy, so, absolute value of voltage after upset is the bigger the better, and requirement can be consistent with current source polarity, in these three kinds of situations, underdamping is obviously the most satisfactory.

Sum up above design, by controlling the induction reactance value of inductance, make system second stage circuit working in underdamping state, and control above-mentioned switch to close and last till that the moment of first extreme value appears in oscillating output voltage under underdamping state, output voltage then during whole system arrival stable state is higher, and the energy that load obtains is maximum.

Preferably, described non-linear piezoelectric energy recovery interface circuit comprises AC-P-SSHI circuit, DC-P-SSHI circuit, AC-S-SSHI circuit and DC-S-SSHI circuit.

Preferably, for AC-P-SSHI circuit, the induction reactance L of inductance should be designed to:

$(R_s+2R_L-2\sqrt{R_s{R}_L+R_L^2})R_L{C}_p<L<(R_s+2R_L+2\sqrt{R_s{R}_L+R_L^2})R_L{C}_p$

Wherein, C _prepresent piezoelectric patches clamped capacitance, L represents inductance induction reactance, R _srepresent inductance conducting resistance and switch conduction resistance sum, R _lrepresent load;

And switch-closed time τ _onbe designed to:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}};$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of the circuit differential equation respectively, obtains by circuit differential equation characteristic root.

Preferably, for DC-P-SSHI circuit, the induction reactance L of inductance should be designed to:

$L>\frac{{R_s}^2{C}_p}{4}$

Wherein, C _prepresent piezoelectric patches clamped capacitance, R _srepresent inductance conducting resistance and switch conduction resistance sum, L represents inductance induction reactance;

And switch-closed time τ _onbe designed to:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}};$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of the circuit differential equation respectively, obtains by circuit differential equation characteristic root.

Preferably, for AC-S-SSHI circuit, the induction reactance L of inductance should be designed to:

$L>\frac{1}{4}{(R_s+R_L)}^2{C}_p$

C _prepresent piezoelectric patches clamped capacitance, R _srepresent inductance conducting resistance and switch conduction resistance sum, L represents inductance induction reactance, R _lrepresent load;

And switch-closed time τ _onbe designed to:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}};$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of the circuit differential equation respectively, obtains by circuit differential equation characteristic root.

Preferably, for DC-S-SSHI circuit, the induction reactance of inductance answers L to be designed to:

$L>\frac{1}{4}{(2R_d+R_s)}^2{C}_p;$

C _prepresent piezoelectric patches clamped capacitance, L represents inductance induction reactance, R _srepresent inductance conducting resistance and switch conduction resistance sum, R _drepresent diode current flow resistance;

And switch-closed time τ _onbe designed to:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}};$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of the circuit differential equation respectively, obtains by circuit differential equation characteristic root.

Compared with prior art, the invention has the beneficial effects as follows:

Non-linear piezoelectric energy recovery interface circuit inductor design provided by the invention and method of controlling switch consider inductance and switch under truth and have the feature of non-ideal characteristic: all there is conducting resistance, make interface circuit not carry out analysis and designation according to LC vibrating circuit simply; When designing SSHI circuit, use the method for designing that the present invention proposes, can realize the optimized design of system, this has great significance to actual piezoelectric energy recovery interface circuit design, is with a wide range of applications in piezoelectric energy is collected.

Accompanying drawing explanation

In Fig. 1 in (a), Fig. 1 in (b), Fig. 1 in (c), Fig. 1 (d) be respectively the design principle figure of AC-P-SSHI circuit, DC-P-SSHI circuit, AC-S-SSHI circuit and DC-S-SSHI circuit.

Fig. 2 is the equivalent circuit diagram of AC-P-SSHI circuit in the first stage.

Fig. 3 is the equivalent circuit diagram of AC-P-SSHI circuit in second stage.

The voltage upset oscillogram of Critical damping state, overdamping state, underdamping state three kinds of states when Fig. 4 is second stage.

Fig. 5 is the output voltage waveform of Critical damping state, overdamping state, underdamping state three kinds of states.

Fig. 6 is the oscillogram of output voltage under underdamping state.

Embodiment

Accompanying drawing, only for exemplary illustration, can not be interpreted as the restriction to this patent;

Below in conjunction with drawings and Examples, the present invention is further elaborated.

Embodiment 1

Fig. 1 is respectively the design principle figure of AC-P-SSHI circuit, DC-P-SSHI circuit, AC-S-SSHI circuit and DC-S-SSHI circuit, and under considering truth, inductance and switch have non-ideal characteristic, all there is conducting resistance.Piezoelectric element is equivalent to a current source in parallel with a piezoelectric patches clamped capacitance.The inductance and switch series that there is conducting resistance under reality are linked togather, optimize the design of inductance and switch-control strategy, make circuit be in underdamping state, thus improve the extraction power of whole circuit to energy.

Fig. 2 is the equivalent circuit diagram of AC-P-SSHI circuit in the first stage, and now switch S disconnects, and the equivalent current source of piezoelectric patches inside is to piezoelectric patches clamped capacitance C _pcharge, under the source forcing of piezoelectricity equivalent current, obtain the output voltage of first stage piezoelectric patches clamped capacitance.

Fig. 3 is the equivalent circuit diagram of AC-P-SSHI circuit in second stage, when on piezoelectric patches clamped capacitance, voltage reaches extreme value, namely when mechanical vibration amplitudes reaches extreme value, switch S closes, under non-ideal characteristic, non-linear piezoelectric energy recovery interface circuit is pure LC oscillating circuit not, and switch there is conducting resistance and inductance also exists loss resistance.And piezoelectric patches clamped capacitance has certain voltage value in the first stage, according to the RLC second-order circuit principle having driving source, in the situation that piezoelectric element clamped capacitance is fixing, the different designs of inductance has 3 kinds of different damping state by making circuit: Critical damping state, overdamping state, underdamping state.In these three cases, voltage upset situation is different.

Fig. 4 gives piezoelectric energy recovery interface circuit in critical damping, overdamp and underdamping three kinds of situations, the upset oscillogram of voltage in its second stage.For critical damping and overdamp situation, second-order circuit voltage can not vibrate, and only exponentially rule can decay, and under underdamping condition, oscillatory extinction will occur.When initial voltage is identical, the state of overdamp and critical damping, the voltage after upset is close to 0.But polarity of voltage after underdamping state upset is contrary, maximum absolute value.Due to the first stage, the output voltage of piezoelectricity inner clip electric capacity is larger, piezoelectric energy recovery interface circuit just can collect more energy, so, absolute value of voltage after upset is the bigger the better, and requirement can be consistent with current source polarity, in these three kinds of situations, underdamping is obviously the most satisfactory.

By controlling the induction reactance value of inductance, make system second stage circuit working in underdamping state, and control above-mentioned switch to close and last till that the moment of first extreme value appears in oscillating output voltage under underdamping state, output voltage then during whole system arrival stable state is higher, and the energy that load obtains is maximum.

For following four kinds of different circuit, piezoelectric patches clamped capacitance all can be set as C _p, inductance induction reactance is L, and on inductance, electric current is i _l, inductance conducting resistance and switch conduction resistance sum are R _s, load resistance is R _l, diode current flow resistance is R _d, piezoelectric patches angle of throw frequency is ω, and in piezoelectric patches, the initial phase of equivalent current source is its electric current maximum amplitude is I _o, therefore piezoelectric patches instantaneous equivalent electric current can be expressed as:

The differential equation that can obtain AC-P-SSHI circuit is:

This equation is with i _lfor the rlc circuit differential equation of unknown quantity, solve this equation, can i be established _l=Ae ^pt, p is then characteristic root, α and β is real part and the imaginary part of this characteristic root respectively.

The discriminant of its characteristic equation is:

$\mathrm{\&Delta;}={(R_s{C}_p+\frac{L}{R_L})}^2-4C_{p}L(1+\frac{R_s}{R_L}).$

Under Fig. 5 gives three kinds of damping situations, the output voltage waveform of system.In three kinds of situations, after circuit arrives stable state, the output voltage of underdamping (Under-damping) is higher, and the energy that load obtains is maximum.Therefore, when actual selection inductance L, should meet and make circuit working in underdamped state, be i.e. Δ < 0, thus can obtain

$(R_s+2R_L-2\sqrt{R_s{R}_L+R_L^2})R_L{C}_p<L<(R_s+2R_L+2\sqrt{R_s{R}_L+R_L^2})R_L{C}_p$

Fig. 6 shows output voltage wave under underdamping state, in order to obtain good voltage rollover effect, control switch closes and lasts till that the moment of first extreme value appears in oscillating output voltage under underdamping state, i.e. the time point that disconnects as switch of minimum point F, and switch closing period is:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}}$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of the circuit differential equation respectively, obtains by circuit differential equation characteristic root.

In Fig. 1, (b) gives DC-P-SSHI circuit structure diagram, with AC-P-SSHI circuit unlike, DC-P-SSHI circuit adds diode rectification bridge circuit and output filter capacitor C between nonlinear circuit and load _o, system can provide direct voltage to load, due to filter capacitor C _ovalue is large, output voltage V _outalmost keep constant, can V be set _outit is a constant.

Allow second stage circuit working the absolute value of voltage after overturning just can be made maximum in underdamping district, electric induction is designed to:

$L>\frac{{R_s}^2{C}_p}{4}$

In Fig. 1, (c) gives AC-S-SSHI circuit structure diagram, and for AC-S-SSHI circuit, its differential equation is:

The discriminant of its characteristic equation is: Δ=(R _s+ R _l) ²c _p ²-4C _pl, makes it reach underdamping state, i.e. Δ < 0, thus can obtain electric induction and be designed to:

$L>\frac{1}{4}{(R_s+R_L)}^2{C}_p$

In Fig. 1, (d) gives DC-S-SSHI circuit structure diagram, considers the non-ideal characteristic that diode has conducting voltage and conducting resistance simultaneously, and for DC-S-SSHI circuit, its differential equation is

The discriminant of its characteristic equation is: Δ=(2R _d+ R _s) ²c _p ²-4C _pl, makes it reach underdamping state, i.e. Δ < 0, thus can obtain electric induction and be designed to:

$L>\frac{1}{4}{(2R_d+R_s)}^2{C}_p$

Similar to AC-P-SSHI circuit, for DC-P-SSHI circuit, AC-S-SSHI circuit, DC-S-SSHI circuit, control its switch and close and last till that the moment of first extreme value appears in oscillating output voltage under underdamping state, its closing time is all designed to:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}}.$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of second order differential equation respectively, obtains by circuit differential equation characteristic root.

Obviously, the above embodiment of the present invention is only for example of the present invention is clearly described, and is not the restriction to embodiments of the present invention.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without the need to also giving all execution modes.All any amendments done within the spirit and principles in the present invention, equivalent to replace and improvement etc., within the protection range that all should be included in the claims in the present invention.

Claims (6)

1. non-linear piezoelectric energy recovery interface circuit inductor design and a method of controlling switch, the piezoelectric energy that wherein said non-linear piezoelectric energy recovery interface circuit stores for extracting piezoelectric element; Described non-linear piezoelectric energy recovery interface circuit comprises two working stages:

First stage: piezoelectric element is equivalent to a current source in parallel with a piezoelectric patches clamped capacitance, now switch disconnects, and current source charges to piezoelectric patches clamped capacitance, and piezoelectric patches clamped capacitance obtains output voltage;

Second stage: when voltage reaches extreme value on piezoelectric patches clamped capacitance, switch closes, and powers to the load;

It is characterized in that: described inductor design and method of controlling switch are by controlling the induction reactance value of inductance, make non-linear piezoelectric energy recovery interface circuit be in underdamping state in second stage, and control switch close and last till that the moment of first extreme value appears in oscillating output voltage under underdamping state.

2. non-linear piezoelectric energy recovery interface circuit inductor design according to claim 1 and method of controlling switch, is characterized in that: described non-linear piezoelectric energy recovery interface circuit comprises AC-P-SSHI circuit, DC-P-SSHI circuit, AC-S-SSHI circuit and DC-S-SSHI circuit.

3. non-linear piezoelectric energy recovery interface circuit inductor design according to claim 2 and method of controlling switch, is characterized in that: for AC-P-SSHI circuit, and the induction reactance L of inductance should be designed to:

$(R_s+2R_L-2\sqrt{R_s{R}_L+R_L^2})R_L{C}_p<L<(R_s+2R_L+2\sqrt{R_s{R}_L+R_L^2})R_L{C}_p$

Wherein, C _prepresent piezoelectric patches clamped capacitance, L represents inductance induction reactance, R _srepresent inductance conducting resistance and switch conduction resistance sum, R _lrepresent load;

And switch-closed time τ _onbe designed to:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}};$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of the circuit differential equation respectively, obtains by circuit differential equation characteristic root.

4. non-linear piezoelectric energy recovery interface circuit inductor design according to claim 2 and method of controlling switch, is characterized in that: for DC-P-SSHI circuit, and the induction reactance L of inductance should be designed to:

$L>\frac{{R_s}^2{C}_p}{4}$

Wherein, C _prepresent piezoelectric patches clamped capacitance, R _srepresent inductance conducting resistance and switch conduction resistance sum, L represents inductance induction reactance;

And switch-closed time τ _onbe designed to:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}};$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of the circuit differential equation respectively, obtains by circuit differential equation characteristic root.

5. non-linear piezoelectric energy recovery interface circuit inductor design according to claim 2 and method of controlling switch, is characterized in that: for AC-S-SSHI circuit, and the induction reactance L of inductance should be designed to:

$L>\frac{1}{4}{(R_s+R_L)}^2{C}_p$

C _prepresent piezoelectric patches clamped capacitance, R _srepresent inductance conducting resistance and switch conduction resistance sum, L represents inductance induction reactance, R _lrepresent load;

And switch-closed time τ _onbe designed to:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}};$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of the circuit differential equation respectively, obtains by circuit differential equation characteristic root.

6. non-linear piezoelectric energy recovery interface circuit inductor design according to claim 2 and method of controlling switch, is characterized in that: for DC-S-SSHI circuit, and the induction reactance of inductance answers L to be designed to:

$L>\frac{1}{4}{(2R_d+R_s)}^2{C}_p;$

C _prepresent piezoelectric patches clamped capacitance, L represents inductance induction reactance, R _srepresent inductance conducting resistance and switch conduction resistance sum, R _drepresent diode current flow resistance;

And switch-closed time τ _onbe designed to:

${\mathrm{\&tau;}}_{on}=\frac{\frac{\mathrm{\&pi;}}{2}-{\mathrm{\&mu;}}^{\&prime;}}{\mathrm{\&beta;}};$

Wherein, μ is circuit RLC parameter; α and β is real part and the imaginary part of the characteristic root of the circuit differential equation respectively, obtains by circuit differential equation characteristic root.