CN105552218A - Multistage storage unit based on epitaxial nickel oxide film heterojunction and preparation method thereof - Google Patents
Multistage storage unit based on epitaxial nickel oxide film heterojunction and preparation method thereof Download PDFInfo
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- 229910000480 nickel oxide Inorganic materials 0.000 title claims abstract description 19
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 title claims abstract description 19
- 238000002360 preparation method Methods 0.000 title claims abstract description 11
- 238000003860 storage Methods 0.000 title abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 60
- 239000002184 metal Substances 0.000 claims abstract description 16
- 229910052751 metal Inorganic materials 0.000 claims abstract description 16
- 238000000151 deposition Methods 0.000 claims abstract description 10
- 229910002367 SrTiO Inorganic materials 0.000 claims description 80
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 16
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 8
- 239000000919 ceramic Substances 0.000 claims description 8
- 239000001301 oxygen Substances 0.000 claims description 8
- 229910052760 oxygen Inorganic materials 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 7
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 6
- 239000008367 deionised water Substances 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 4
- 238000010521 absorption reaction Methods 0.000 claims description 4
- 239000000428 dust Substances 0.000 claims description 4
- 239000002245 particle Substances 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 4
- 238000010792 warming Methods 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 2
- 238000005137 deposition process Methods 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 claims description 2
- 238000004549 pulsed laser deposition Methods 0.000 claims description 2
- 230000008901 benefit Effects 0.000 abstract description 3
- 230000001066 destructive effect Effects 0.000 abstract description 3
- 238000005265 energy consumption Methods 0.000 abstract description 2
- 229910003193 Nb:SrTiO3 Inorganic materials 0.000 abstract 2
- 229910002370 SrTiO3 Inorganic materials 0.000 abstract 1
- 239000010408 film Substances 0.000 description 24
- 238000012360 testing method Methods 0.000 description 20
- 230000005291 magnetic effect Effects 0.000 description 19
- 230000008859 change Effects 0.000 description 14
- 206010016256 fatigue Diseases 0.000 description 8
- 230000014759 maintenance of location Effects 0.000 description 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000002929 anti-fatigue Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000011056 performance test Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000004087 circulation Effects 0.000 description 2
- 238000005238 degreasing Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 230000003446 memory effect Effects 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000005294 ferromagnetic effect Effects 0.000 description 1
- 125000005842 heteroatom Chemical group 0.000 description 1
- UCNNJGDEJXIUCC-UHFFFAOYSA-L hydroxy(oxo)iron;iron Chemical compound [Fe].O[Fe]=O.O[Fe]=O UCNNJGDEJXIUCC-UHFFFAOYSA-L 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
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- 238000005259 measurement Methods 0.000 description 1
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- 230000010287 polarization Effects 0.000 description 1
- 229920000314 poly p-methyl styrene Polymers 0.000 description 1
- 206010063401 primary progressive multiple sclerosis Diseases 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8833—Binary metal oxides, e.g. TaOx
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
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Abstract
The invention discloses a multistage storage unit based on an epitaxial nickel oxide film heterojunction. The multistage storage unit comprises a Nio/Nb:SrTiO3 heterostructure layer, a Pt metal film serving as an upper electrode, and metal In serving as a lower electrode. The invention further discloses the preparation method of the multistage storage unit. A pulse laser deposition method is adopted for deposing a NiO film on a Nb: SrTiO3 substrate so as to prepare the Nio/Nb:SrTiO3 heterostructure. The multistage storage unit based on the epitaxial nickel oxide film heterojunction has the advantages that the size is small, the structure is simple, the multistage storage unit is non-volatile, rapid reading and writing is realized, the working voltage is low, energy consumption is low, moving parts are not needed, non-destructive reading is realized, etc.
Description
Technical field
The invention belongs to semiconductor integrated circuit and manufacturing technology field thereof, be specifically related to a kind of multi-level memory cell based on extension nickel oxide film heterojunction and preparation method thereof.
Background technology
The high speed development of information technology needs the non-volatile memory of high speed, high density and low-power consumption, and research and development novel non-volatilization memory receives lasting concern in recent years.Electric charge is that information stores the two large electrical attributes utilized with spin, and mostly both is applied separately and there is respective drawback.
Flash memory utilizes charge-storage mechanism, and its operating voltage is high, program speed slow, and especially semiconductor feature sizes also will face physics limit after entering into the 22nm epoch; Magnetic memory utilizes magnetic field to read and write information to magnetic thin film and stores, but writing speed is slow, and useful life is short; It is current signal by detecting polarization reversal that the information of ferroelectric memory reads, and it reads voltage and must belong to destructive higher than coercive voltage and read, and especially storage medium size narrows down to submicron-scale stored charge weak output signal may be caused to be difficult to read.
Scientist notices in recent years, if electric charge and spin two large attributes are organically blended, utilize electric field to write fast, magnetic field to read fast respective advantage and be expected to realize novel " autotelegraph magnetic is read " memory, so people have carried out years of researches in the field such as dilute magnetic semiconductor, how ferromagnetic electric coupling, but still there is many bottleneck problems.Current research also finds, utilizes the magnetic be associated with magnetic oxide film resistive to modulate, and studies and provides new approach, be expected to become the solution meeting the most competitiveness of non-volatile memory demand in many-side for electric charge and spin.
Therefore, how to select resistive dielectric layer material, obtain change resistance performance good, the resistance-variable storing device that change resistance performance is stable, explore the multi-level store combined with the spin two large degrees of freedom by electric charge, be the important topic that scientific worker studies, will greatly widen the application of resistance-variable storing device.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of multi-level memory cell based on extension nickel oxide film heterojunction and preparation method thereof, described extension nickel oxide film heterojunction can realize the integrated of resistance and magnetic, reaches the object of dynamic data attemper.
For achieving the above object, the invention provides following technical scheme:
1., based on a multi-level memory cell for extension nickel oxide film heterojunction, described multi-level memory cell comprises NiO/Nb:SrTiO
3hetero structure layers, as the Pt metallic film of top electrode, as the metal In of bottom electrode.
Further, described NiO/Nb:SrTiO
3hetero structure layers is by Nb:SrTiO
3substrate and NiO film are formed, described Nb:SrTiO
3substrate thickness is 0.2-0.5mm, and described NiO film thickness is 100 ~ 200nm.
Further, described Pt thickness of metal film is 100 ~ 200nm, and described metal In thickness is 200nm.
Further, described Nb:SrTiO
3substrate is the SrTiO of 0.7%Nb doping
3monocrystal chip.
2, the preparation method of the described multi-level memory cell based on extension nickel oxide film heterojunction, it is characterized in that, step is as follows:
1) Nb:SrTiO
3substrate is cleared up: use acetone, absolute ethyl alcohol, washed with de-ionized water Nb:SrTiO respectively
3substrate surface, then dry up stand-by with nitrogen;
2) NiO/Nb:SrTiO is produced
3heterostructure: adopt pulsed laser deposition at Nb:SrTiO
3substrate deposition NiO film preparation NiO/Nb:SrTiO
3heterostructure, described NiO film thickness is 100-200nm;
3) electrode is made: adopt Deposited By Dc Magnetron Sputtering method through step 2) NiO/Nb:SrTiO that prepared
3in structure, NiO pellicular front splash-proofing sputtering metal Pt is as top electrode, at Nb:SrTiO
3substrate face pressure metal In is as bottom electrode.
Further, described step 2) realize as follows successively:
A, NiO ceramic target is loaded in target platform, by Nb:SrTiO
3substrate is arranged on substrate table, and target distance substrate is 5cm;
B, settling chamber's base vacuum is evacuated to 1 × 10
-5pa, utilizes substrate heating platform by Nb:SrTiO
3substrate is warming up to 650 DEG C, and pass into oxygen and regulate the dynamic equilibrium air pressure in settling chamber to be 10 ~ 20Pa, adjustment energy of lasers is 260-280Mj, and laser frequency is 3-5Hz, adjusts light path and focuses on and NiO ceramic target starts deposition produce NiO/Nb:SrTiO
3structure;
After c, deposition process complete, to NiO/Nb:SrTiO under oxygen atmosphere
3structure is lowered the temperature, and rate of temperature fall is 3-5 DEG C/min, takes out after cool to room temperature, i.e. obtained NiO/Nb:SrTiO
3structure.
Further, described step 1) carry out as follows: Nb:SrTiO
3acetone ultrasonic cleaner cleaning 10-15 minute put into by substrate, rear absolute ethyl alcohol and washed with de-ionized water Nb:SrTiO
3substrate, removes Nb:SrTiO
3the dust of substrate surface absorption and carbon powder particle, make Nb:SrTiO
3substrate surface flat and smooth, finally dries up stand-by with nitrogen.
Beneficial effect of the present invention is:
1, the multi-level memory cell based on extension nickel oxide film heterojunction prepared by the present invention has that volume is little, structure is simple, non-volatile, can the advantage such as low, the low energy consumption of fast reading and writing, operating voltage, movement-less part, non-Destructive readout.
2, performance parameter is stablized, after fatigability test result shows that prepared multi-level memory cell passes through the fatigue resistance loop test being greater than 50 times, still can change between two kinds of resistance states, resistance value does not significantly change, thus the multi-level memory cell indicated prepared by the present invention has stronger anti-fatigue performance, at high-impedance state and low resistance state, all there is good retention performance.Voltage-current characteristic test shows that the ratio of multi-level memory cell of the present invention height resistance state resistor/resistance value is greater than 10 in addition
5, meanwhile, utilize the magnetic of resistive controllable extension NiO hetero-junction thin-film, the electric field namely achieving resistance and magnetic in same memory device regulates and controls, and can reach the object of dynamic data attemper.
Accompanying drawing explanation
In order to make object of the present invention, technical scheme and beneficial effect clearly, the invention provides following accompanying drawing and being described:
Fig. 1 is the XRD diffraction pattern of hetero structure layers;
Fig. 2 is the circuit diagram that this multi-level memory cell of test adopts;
Fig. 3 is the voltage-current characteristic resolution chart of this multi-level memory cell, and illustration is test schematic diagram;
Fig. 4 is that the multistage resistive effect of this multi-level memory cell should test one;
Fig. 5 is that the multistage resistive effect of this multi-level memory cell should test two;
Fig. 6 is the fatigue resistance resolution chart of this multi-level memory cell;
Fig. 7 is the retention performance resolution chart of this multi-level memory cell;
Fig. 8 is the Magnetic Test figure under different resistive state.
Embodiment
Below in conjunction with accompanying drawing, the preferred embodiments of the present invention are described in detail.
Following used Nb:SrTiO
3substrate is purchased from Hefei Ke Jing Materials Co., Ltd, described impulse laser deposition system laser used is KrF excimer laser, wavelength 248nm, LambdaPhysikCOMPEX205, settling chamber is the PLD-500 system that Beijing scientific instrument Co., Ltd produces, and DC magnetron sputtering system is that Shenyang scientific instrument Co., Ltd produces.
Embodiment 1
Prepare the multi-level memory cell based on extension nickel oxide film heterojunction, concrete steps are as follows:
1) Nb:SrTiO
3substrate is cleared up: Nb:SrTiO
3acetone degreasing first used by substrate, Nb:SrTiO
3substrate is put into acetone ultrasonic cleaner and is cleaned 10 minutes, rear absolute ethyl alcohol and washed with de-ionized water Nb:SrTiO
3substrate, removes Nb:SrTiO
3the dust of substrate surface absorption and carbon powder particle, make Nb:SrTiO
3substrate surface flat and smooth, finally dries up stand-by with nitrogen;
2) NiO/Nb:SrTiO is produced
3heterostructure: in the settling chamber of deposition film making system of pulse laser, loads NiO ceramic target in target platform, by described Nb:SrTiO
3substrate is arranged on substrate table, and target distance substrate is 5cm, and settling chamber is evacuated to 1 × 10
-5pa, simultaneously by Nb:SrTiO
3substrate is warming up to 650 DEG C, and then pass into oxygen and regulate the dynamic equilibrium air pressure in settling chamber to be 10Pa, adjustment laser energy is 280MJ, and its light path focuses on NiO ceramic target, and laser frequency used is 5Hz, at described Nb:SrTiO
3deposition on substrate NiO resistance-change memory layer, deposit thickness is 200nm, and then lower the temperature to described NiO resistance-change memory layer under oxygen atmosphere, rate of temperature fall is 5 DEG C/min, takes out after cool to room temperature, obtained NiO/Nb:SrTiO
3heterostructure;
3) top electrode is made: in the settling chamber of Deposited By Dc Magnetron Sputtering masking system, be arranged on the target platform of settling chamber, by step 2 by top electrode Pt metal targets) NiO/Nb:SrTiO for preparing
3heterostructure is arranged on substrate table, is then evacuated to 1 × 10
-4pa, then passes into argon gas and makes the dynamic equilibrium air pressure in growth room be 3Pa, at obtained NiO/Nb:SrTiO
3the NiO resistance-change memory layer of heterostructure utilizes 0.2mm mask plate sputtering 200nm thick Pt metallic film in aperture do top electrode, form Pt/NiO/Nb:SrTiO
3hetero structure layers;
4) bottom electrode is made: in the Pt/NiO/Nb:SrTiO that step (3) is obtained
3the Nb:SrTiO of heterostructure
3back side pressure metal In does bottom electrode, namely obtains Pt/NiO/Nb:SrTiO
3/ In multi-level memory cell.
Embodiment 2
Prepare the multi-level memory cell based on extension nickel oxide film heterojunction, concrete steps are as follows:
1) Nb:SrTiO
3substrate is cleared up: Nb:SrTiO
3acetone degreasing first used by substrate, Nb:SrTiO
3substrate is put into acetone ultrasonic cleaner and is cleaned 15 minutes, rear absolute ethyl alcohol and washed with de-ionized water Nb:SrTiO
3substrate, removes Nb:SrTiO
3the dust of substrate surface absorption and carbon powder particle, make Nb:SrTiO
3substrate surface flat and smooth, finally dries up stand-by with nitrogen;
2) NiO/Nb:SrTiO is produced
3heterostructure: in the settling chamber of deposition film making system of pulse laser, loads NiO ceramic target in target platform, by described Nb:SrTiO
3substrate is arranged on substrate table, and target distance substrate is 5cm, and settling chamber is evacuated to 1 × 10
-5pa, simultaneously by Nb:SrTiO
3substrate is warming up to 650 DEG C, and then pass into oxygen and regulate the dynamic equilibrium air pressure in settling chamber to be 20Pa, adjustment laser energy is 270MJ, and its light path focuses on NiO ceramic target, and laser frequency used is 3Hz, at described Nb:SrTiO
3deposition on substrate NiO resistance-change memory layer, deposit thickness is 100nm, and then lower the temperature to described NiO resistance-change memory layer under oxygen atmosphere, rate of temperature fall is 3 DEG C/min, takes out after cool to room temperature, obtained NiO/Nb:SrTiO
3heterostructure;
3) top electrode is made: in the settling chamber of Deposited By Dc Magnetron Sputtering masking system, be arranged on the target platform of settling chamber, by step 2 by top electrode Pt metal targets) NiO/Nb:SrTiO for preparing
3heterostructure is arranged on substrate table, is then evacuated to 1 × 10
-4pa, then passes into argon gas and makes the dynamic equilibrium air pressure in growth room be 3Pa, at obtained NiO/Nb:SrTiO
3the NiO resistance-change memory layer of heterostructure utilizes 0.2mm mask plate sputtering 200nm thick Pt metallic film in aperture do top electrode, form Pt/NiO/Nb:SrTiO
3hetero structure layers;
4) bottom electrode is made: in the Pt/NiO/Nb:SrTiO that step (3) is obtained
3the Nb:SrTiO of heterostructure
3back side pressure metal In does bottom electrode, namely obtains Pt/NiO/Nb:SrTiO
3/ In multi-level memory cell.
Performance test:
1, by embodiment 1 step 2) NiO/Nb:SrTiO that prepared
3heterostructure carries out XRD diffraction and obtains the XRD figure shown in Fig. 1, is epitaxial growth by the provable NiO film of Fig. 1, consistent with substrate orientation.
2, apply continuous sweep voltage by circuit as shown in Figure 2 to multi-level store prepared by embodiment 1, scanning step is 0.01V, and Limited Current is 10mA, after scanning 50 circulations, and the electric current of verifying memory and the variation relation of voltage, i.e. I-V change.
(1) forward voltage scanning (0 →+3V → 0)
As shown in Figure 3, when voltage scans for the first time from 0V, this memory initial table reveals high resistant characteristic, and along with voltage is increased to+3V, now memory remains on low resistance state, and when voltage flyback is to 0V, the low resistance state of memory still can keep.
(2) reverse voltage scanning (0 →-5V → 0)
As shown in Figure 3, voltage from 0V during Sao Miao Zhi – 5V (reset voltage), this memory change high-impedance state into, when voltage Cong – 5V is scanned up to 0V, memory remains on high-impedance state.
(3) low resistance state applies the scanning of different oppositely reset voltage
As shown in Figure 4, when device is in low resistance state, voltage scans five circulations from 0V, i.e. 0 →-1V → 0,0 →-2V → 0,0 →-3V → 0,0 →-4V → 0,0 →-5V → 0, visible device shows multistage resistive effect should, under the reset voltage of different size, can different Resistance states be obtained, and can keep.
(4) high-impedance state applies the scanning of different forward resetting voltage
As shown in Figure 5, when device is in low resistance state, voltage scans five back and forth from 0V, i.e. 0 →+1V → 0,0 →+2V → 0,0 →+3V → 0, visible device shows multistage resistive effect should, under the resetting voltage of different size, can different Resistance states be obtained, and can keep.
3, fatigue resistance test is carried out to multi-level store prepared by embodiment 1
Fatigue resistance is tested: by described resistive memory element (hereinafter referred to as element), first adopts 3V pulse voltage to be applied on Pt top electrode, makes element become low resistance state by high-impedance state, then use the resistance value of the voltage tester element of 0.3V; Then adopt the pulse voltage of-5V to be applied on Pt top electrode, make element come back to high-impedance state by low resistance state, then utilize the resistance of the voltage tester element of 0.3V, loop test like this more than 50 times, obtains the fatigue resistance of device.Result: as shown in Figure 6, after being greater than the loop test of 50 times, element still can be changed between two kinds of resistance states, and resistance value does not significantly change, thus indicates the present invention and have stable performance and stronger anti-fatigue performance.
4, retention performance test is carried out to multi-level store prepared by embodiment 1
Retention performance is tested: this element is placed in high-impedance state and low resistance state respectively, and then use 0.3V to test respective resistance value respectively respectively, result as shown in Figure 7, finds through 1.2 × 10
4after s, the resistance value of two kinds of resistance states all remains in certain magnitude, illustrates that device has good retention performance.
It is pointed out that the present embodiment adopts lower voltage 0.3V to test height resistance state resistor value, the resistance value state that can not change element can be ensured like this.
5, the multi-level store prepared embodiment 1 carries out the test of electric field regulation and control magnetic
The measurement of magnetic utilizes the comprehensive physical property measuring system of PPMS to complete.
With the potential pulse of+3V and-5V, device is transformed to low resistance state (LRS-1) and high-impedance state HRS, the magnetic of test NiO film.Externally-applied magnetic field size used is 1T, applies magnetic direction perpendicular to film surface.The magnetic hysteresis loop of gained has deducted the diamagnetism of substrate contribution, and all at room temperature carries out.As shown in Figure 8, Ms (LRS-1) > Ms (HRS), and Ms (HRS) is close to identical with Ms (IS).As can be seen here, the change of the magnetic that the upset obtaining resistive RS in NiO film causes, and this change demonstrates non-volatile.On this basis in order to study the memory effect of Ms ,+3V potential pulse being applied continuously to device device is replaced low resistance state again, then connect and apply twice+3V potential pulse respectively and go test magnetic to obtain Ms (LRS-2), Ms (LRS-3).Result shows Ms (LRS-3) > Ms (LRS-2) > Ms (LRS-1).This corresponds to the reduction of resistance state, and Ms raises gradually, and obvious Ms change presents to recall with I-V and hinders consistent memory effect.
Can show that the multi-level memory cell performance parameter prepared by the present invention is stablized from above the performance test results, after fatigability test result shows that prepared resistive memory element passes through the fatigue resistance loop test being greater than 50 times, still can change between two kinds of resistance states, resistance value does not significantly change, thus indicate the present invention there is stronger anti-fatigue performance, retentivity test shows that the present invention has good retention performance at high-impedance state and low resistance state.Voltage-current characteristic test shows that the ratio of height of the present invention resistance state resistor/resistance value is greater than 10 in addition
5.
What finally illustrate is, above preferred embodiment is only in order to illustrate technical scheme of the present invention and unrestricted, although by above preferred embodiment to invention has been detailed description, but those skilled in the art are to be understood that, various change can be made to it in the form and details, and not depart from claims of the present invention limited range.
Claims (7)
1. based on a multi-level memory cell for extension nickel oxide film heterojunction, it is characterized in that, described multi-level memory cell comprises NiO/Nb:SrTiO
3hetero structure layers, as the Pt metallic film of top electrode, as the metal In of bottom electrode.
2. according to claim 1 based on the multi-level memory cell of extension nickel oxide film heterojunction, it is characterized in that, described NiO/Nb:SrTiO
3hetero structure layers is by Nb:SrTiO
3substrate and NiO film are formed, described Nb:SrTiO
3substrate thickness is 0.2-0.5mm, and described NiO film thickness is 100 ~ 200nm.
3. according to claim 1 based on the multi-level memory cell of extension nickel oxide film heterojunction, it is characterized in that, described Pt thickness of metal film is 100 ~ 200nm, and described metal In thickness is 200nm.
4. be applied to the extension nickel oxide film heterojunction of dynamic data attemper according to claim 1, it is characterized in that, described Nb:SrTiO
3substrate is the SrTiO of 0.7%Nb doping
3monocrystal chip.
5. described in any one of Claims 1 to 4 based on the preparation method of the multi-level memory cell of extension nickel oxide film heterojunction, it is characterized in that, step is as follows:
1) Nb:SrTiO
3substrate is cleared up: use acetone, absolute ethyl alcohol, washed with de-ionized water Nb:SrTiO respectively
3substrate surface, then dry up stand-by with nitrogen;
2) NiO/Nb:SrTiO is produced
3heterostructure: adopt pulsed laser deposition at Nb:SrTiO
3substrate deposition NiO film preparation NiO/Nb:SrTiO
3heterostructure, described NiO film thickness is 100-200nm;
3) electrode is made: adopt Deposited By Dc Magnetron Sputtering method through step 2) NiO/Nb:SrTiO that prepared
3in structure, NiO pellicular front splash-proofing sputtering metal Pt is as top electrode, at Nb:SrTiO
3substrate face pressure metal In is as bottom electrode.
6., according to claim 5 based on the preparation method of the multi-level memory cell of extension nickel oxide film heterojunction, it is characterized in that, described step 2) realize as follows successively:
A, NiO ceramic target is loaded in target platform, by Nb:SrTiO
3substrate is arranged on substrate table, and target distance substrate is 5cm;
B, settling chamber's base vacuum is evacuated to 1 × 10
-5pa, utilizes substrate heating platform by Nb:SrTiO
3substrate is warming up to 650 DEG C, and pass into oxygen and regulate the dynamic equilibrium air pressure in settling chamber to be 10 ~ 20Pa, adjustment energy of lasers is 260-280Mj, and laser frequency is 3-5Hz, adjusts light path and focuses on and NiO ceramic target starts deposition produce NiO/Nb:SrTiO
3structure;
After c, deposition process complete, to NiO/Nb:SrTiO under oxygen atmosphere
3structure is lowered the temperature, and rate of temperature fall is 3-5 DEG C/min, takes out after cool to room temperature, i.e. obtained NiO/Nb:SrTiO
3structure.
7., according to claim 5 based on the preparation method of the multi-level memory cell of extension nickel oxide film heterojunction, it is characterized in that, described step 1) carry out as follows: Nb:SrTiO
3acetone ultrasonic cleaner cleaning 10-15 minute put into by substrate, rear absolute ethyl alcohol and washed with de-ionized water Nb:SrTiO
3substrate, removes Nb:SrTiO
3the dust of substrate surface absorption and carbon powder particle, make Nb:SrTiO
3substrate surface flat and smooth, finally dries up stand-by with nitrogen.
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| US20080011996A1 (en) * | 2006-07-11 | 2008-01-17 | Johannes Georg Bednorz | Multi-layer device with switchable resistance |
| CN103247627A (en) * | 2012-02-13 | 2013-08-14 | 中国科学院微电子研究所 | Semiconductor memory device and access method thereof |
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|---|---|---|---|---|
| US20080011996A1 (en) * | 2006-07-11 | 2008-01-17 | Johannes Georg Bednorz | Multi-layer device with switchable resistance |
| CN103247627A (en) * | 2012-02-13 | 2013-08-14 | 中国科学院微电子研究所 | Semiconductor memory device and access method thereof |
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| YONGDAN ZHU ET AL.: "《Bipolar Resistive Switching Characteristic of Epitaxial NiO Thin Film on Nb-Doped SrTiO3 Substrate》", 《ADVANCES IN CONDENSED MATTER PHYSICS》 * |
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