CN105548819B - A kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave - Google Patents

A kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave Download PDF

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CN105548819B
CN105548819B CN201610095225.9A CN201610095225A CN105548819B CN 105548819 B CN105548819 B CN 105548819B CN 201610095225 A CN201610095225 A CN 201610095225A CN 105548819 B CN105548819 B CN 105548819B
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mrow
msub
line
traveling wave
voltage
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CN105548819A (en
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李小鹏
滕予非
张纯
甄威
汤涌
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State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Sichuan Electric Power Co Ltd
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State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Sichuan Electric Power Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08Locating faults in cables, transmission lines, or networks
    • G01R31/081Locating faults in cables, transmission lines, or networks according to type of conductors
    • G01R31/085Locating faults in cables, transmission lines, or networks according to type of conductors in power transmission or distribution lines, e.g. overhead

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  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

The invention discloses a kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave, comprise the following steps:(a) it is arranged on DC transmission system converting plant and voltage, the current transformer in Inverter Station line side gathers positive pole and voltage, the electric current at negative pole circuit both ends respectively;(b) the voltage jump amount and jump-value of current at positive pole circuit and negative pole circuit both ends are calculated;(c) the voltage jump amount on obtained each polar curve road and jump-value of current are converted into corresponding line mode voltage component and line mould current component;(d) the anti-traveling wave of voltage at DC line both ends is calculated using line mode voltage component and line mould galvanometer, and anti-traveling wave amplitude is integrated within the specific time;(e) DC line rectification side and the ratio of the anti-traveling wave amplitude integral result of inverter side are calculated, according to ratio in judgement failure.The present invention can quick and precisely cog region internal and external fault, also can correctly be acted under line end high resistive fault and noise jamming, reliability and sensitivity is high.

Description

A kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave
Technical field
The present invention relates to field of power, event inside and outside specifically a kind of HVDC transmission line area based on anti-traveling wave Hinder recognition methods.
Background technology
At present, main protection of the DC line using traveling-wave protection as circuit, protected with differential under-voltage protection, electric current longitudinal differential Whether shield etc. breaks down as back-up protection to identify on DC line.Wherein, traveling-wave protection and differential under-voltage protection foundation Voltage change ratio forms Protection criteria, easy because voltage change ratio can not reach definite value when high resistive fault occurs for circuit Tripping.
Electric current longitudinal differential protection, can be with effective detection high resistant as traveling-wave protection and the back-up protection of differential under-voltage protection Failure, but differential protection is to avoid line distribution capacitance charging and discharging currents caused by AC failure and sampled value fluctuation outside area from making Into malfunction, its responsiveness is slow, and actuation time is second level, it is possible to differential protection action before, it is low in rectification side pole control Voltage protection or maximum Trigger Angle protection act are by the locking of failure pole so that the standby that differential protection does not usually have to circuit is protected Shield acts on.Meanwhile current differential protection is ensures reliability, it is necessary to the end data precise synchronization of circuit two, to communication apparatus requirement It is higher.
The content of the invention
The purpose of the present invention is to overcome the weak point of existing DC transmission line area inside/outside failure recognition methods, it is proposed that A kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave, this method reliably can be identified rapidly The internal fault external fault of circuit, also can fast reaction for high resistance earthing fault.
For achieving the above object, the present invention is realized using following technical scheme:A kind of high pressure based on anti-traveling wave DC transmission line area inside/outside failure recognition methods, comprises the following steps:
(a) it is arranged on DC transmission system converting plant and voltage, the current transformer in Inverter Station line side gathers just respectively Pole and voltage, the electric current at negative pole circuit both ends;
(b) using the voltage x current at the circuit both ends collected, the voltage for calculating positive pole circuit and negative pole circuit both ends is dashed forward Variable and jump-value of current;
(c) phase-model transformation method is utilized, the voltage jump amount on obtained each polar curve road and jump-value of current are converted into Corresponding line mode voltage component and line mould current component;
(d) the anti-traveling wave of voltage at DC line both ends is calculated using line mode voltage component and line mould galvanometer, and specific Time in anti-traveling wave amplitude is integrated;
(e) DC line rectification side and the ratio of the anti-traveling wave amplitude integral result of inverter side are calculated, if the ratio is more than door Threshold value, failure judgement occur outside circuit;If the ratio is less than threshold value, failure judgement occurs on the line.
Further, preferably, the detailed process of the step (b) is:
(b1) by formula (1), the voltage jump amount and jump-value of current of positive pole circuit and negative pole circuit rectification side are calculated,
In formula (1), Δ uRp、ΔiRpThe voltage jump amount and electric current of respectively positive pole circuit and negative pole circuit rectification side are dashed forward Variable;uRpFor positive pole circuit and the voltage of negative pole circuit rectification side, wherein p=1,2,1 represent positive pole circuit, and 2 represent negative line Road;N is sampled point number, and n is the sampling number in 10ms, uRp(N) positive pole circuit and negative pole circuit rectification side voltage are represented Sampled value, iRp(N) sampled value of positive pole circuit and negative pole circuit rectification side electric current is represented.
(b2) similarly, using formula (1), the voltage jump amount for calculating positive pole circuit and negative pole circuit inverter side is dashed forward with electric current Variable.
Further, preferably, the detailed process of the step (c) is:
(c1) by formula (2), the line mode voltage and line mould current component of DC line rectification side are calculated,
In formula, Δ uR11With Δ iR11Respectively the line mode voltage of DC line rectification side and line mould electric current.
(c2) similarly, by formula (2), the line mode voltage Δ u of DC line inverter side is calculatedI11With line mould electric current Δ iI11
Further, preferably, the detailed process of the step (d) is:
(d1) line mode voltage component and line mould electric current are utilized, calculates the anti-row of voltage of DC line rectification side and inverter side Ripple.
In formula, uRbWith uIbThe respectively anti-traveling wave of the voltage of DC line rectification side and inverter side, ZCFor DC line wave resistance It is anti-;
(d2) in specific time TdIt is interior that anti-traveling wave amplitude is integrated, as shown in formula (4)
In formula (4), bRAnd bIIt is that the amplitude of DC line rectification side and the anti-traveling wave of inverter side integrates in a period of time respectively, t1And t2Respectively DC line rectification side and inverter side detect the time of failure, TdScope value beWherein, L is line length, and v is traveling wave spread speed.
(d3) discretization is carried out to formula (4), can obtained
In formula (5), i=1 represents to detect first sampled point after failure, and Ns is the sampled point in an integration window length Number, Δ t is the sampling interval.
Further, preferably, the detailed process of the step (e) is:
(e1) by the amplitude integrated value of DC line rectification side and the anti-traveling wave of inverter side, larger integrated value is smaller than upper Integrated value, obtain integrate ratio R atio be:
In formula (6), ε is the threshold value of internal fault external fault identical criterion;
(e2) when integration ratio R atio is less than threshold value ε, failure judgement occurs on the line, otherwise, failure judgement hair Life is outside circuit.
Further, preferably, the threshold value ε is 5.
Further, preferably, step (f), the step are also included after the step (d), before step (e) Suddenly the detailed process of (f) is:The anti-traveling wave amplitude integral result of circuit that Inverter Station is obtained is transferred to converting plant.
Compared with prior art, the present invention has the advantages that:
First, the required data window of the present invention is short, the influence of uncontrolled systemic effect, can quick and precisely in cog region, Outer failure, also can correctly it be acted under line end high resistive fault and noise jamming, reliability and sensitivity is high.
2nd, the present invention only needs to transmit the result of the anti-traveling wave amplitude integration of inverter side, is adopted without real-time delivery voltage, electric current Sample value, low is required to communication speed and both ends data syn-chronization, can adapt to existing means of communication.
3rd, than the existing internal fault external fault recognition methods based on transient, the present invention extracts the sampling frequency of anti-traveling wave Rate is 10kHz, identical with the sample rate of actual DC system control protection device, facilitates engineering construction.
Figure of description
Fig. 1 is the bipolar line mode of connection in DC transmission engineering.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, with reference to embodiment and accompanying drawing, to this Invention is described in further detail, and exemplary embodiment of the invention and its explanation are only used for explaining the present invention, do not make For limitation of the invention.
Embodiment
A kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave of the present invention, including with Lower step:
(a) it is arranged on DC transmission system converting plant and voltage, the current transformer in Inverter Station line side gathers just respectively Pole and voltage, the electric current at negative pole circuit both ends;The mode of connection of DC transmission engineering generally use is bipolar line mode, is passed through The wire of two opposed polarities (i.e. positive and negative electrode) carries out electric energy transmission, and this two wires are referred to as positive pole circuit and negative pole circuit. Wherein, current conversion station leading-out terminal above earth potential is referred to as positive pole for positive, is referred to as negative pole for negative, as shown in Figure 1.
(b) using the voltage x current at the circuit both ends collected, the voltage for calculating positive pole circuit and negative pole circuit both ends is dashed forward Variable and jump-value of current;
(c) phase-model transformation method is utilized, the voltage jump amount on obtained each polar curve road and jump-value of current are converted into Corresponding line mode voltage component and line mould current component, each polar curve road here refer to positive pole circuit and negative pole circuit, phase Moding is changed to the prior art commonly used in a kind of transmission line of electricity, will not be repeated here.
(d) the anti-traveling wave of voltage at DC line both ends is calculated using line mode voltage component and line mould galvanometer, and specific Time in anti-traveling wave amplitude is integrated, DC line both ends here refer to the rectification side of circuit and the inversion of circuit Side.
(e) DC line rectification side and the ratio of the anti-traveling wave amplitude integral result of inverter side are calculated, if the ratio is more than door Threshold value, failure judgement occur outside circuit;If the ratio is less than threshold value, failure judgement occurs on the line.
Specifically, the detailed process of step (b) is:
(b1) by formula (1), the voltage jump amount and jump-value of current of positive pole circuit and negative pole circuit rectification side are calculated,
In formula (1), Δ uRp、ΔiRpThe voltage jump amount and electric current of respectively positive pole circuit and negative pole circuit rectification side are dashed forward Variable;uRpFor positive pole circuit and the voltage of negative pole circuit rectification side, wherein p=1,2,1 represent positive pole circuit, and 2 represent negative line Road;N is sampled point number, and n is the sampling number in 10ms, uRp(N) positive pole circuit and negative pole circuit rectification side voltage are represented Sampled value, iRp(N) sampled value of positive pole circuit and negative pole circuit rectification side electric current is represented.
(b2) similarly, using formula (1), the voltage jump amount for calculating positive pole circuit and negative pole circuit inverter side is dashed forward with electric current Variable.
Specifically, the detailed process of step (c) is:
(c1) by formula (2), the line mode voltage and line mould current component of DC line rectification side are calculated,
In formula, Δ uR11With Δ iR11Respectively the line mode voltage of DC line rectification side and line mould electric current.
(c2) similarly, by formula (2), the line mode voltage Δ u of DC line inverter side is calculatedI11With line mould electric current Δ iI11
Specifically, the detailed process of step (d) is:
(d1) line mode voltage component and line mould electric current are utilized, calculates the anti-row of voltage of DC line rectification side and inverter side Ripple.
In formula, uRbWith uIbThe respectively anti-traveling wave of the voltage of DC line rectification side and inverter side, ZCFor DC line wave resistance It is anti-;
(d2) in specific time TdIt is interior that anti-traveling wave amplitude is integrated, as shown in formula (4)
In formula (4), bRAnd bIIt is that the amplitude of DC line rectification side and the anti-traveling wave of inverter side integrates in a period of time respectively, t1And t2Respectively DC line rectification side and inverter side detect the time of failure, TdScope value beWherein, l For line length, v is traveling wave spread speed.
(d3) discretization is carried out to formula (4), can obtained
In formula (5), i=1 represents to detect first sampled point after failure, and Ns is the sampled point in an integration window length Number, Δ t is the sampling interval.
Specifically, the detailed process of step (e) is:
(e1) by the amplitude integrated value of DC line rectification side and the anti-traveling wave of inverter side, larger integrated value is smaller than upper Integrated value, obtain integrate ratio R atio be:
In formula (6), ε is the threshold value of internal fault external fault identical criterion, depending on the big I of threshold value is as needed;
(e2) when integration ratio R atio is less than threshold value ε, failure judgement occurs on the line, otherwise, failure judgement hair Life is outside circuit.
Specifically, the preferred threshold value ε of the present embodiment is 5, i.e., when integrating ratio R atio less than 5, failure judgement occurs to exist On circuit, otherwise, failure judgement occurs outside circuit.
Specifically, step (f) is also included after step (d), before step (e), the detailed process of the step (f) is: The anti-traveling wave amplitude integral result of circuit that Inverter Station is obtained is transferred to converting plant, in DC transmission system, DC line Restarting logic is completed in rectification side, it is only necessary to which the lateral rectification side of inversion provides anti-traveling wave amplitude integration information, it is not necessary to The anti-traveling wave amplitude integral result of converting plant is passed into Inverter Station.
With reference to the content of the inventive method, following emulation embodiment is provided for a certain DC transmission system model:
The inventive method has built ± 500kV DC transmission system simulation models, and model parameter refers to Three Gorges-Changzhou direct current Power transmission engineering.Wherein, power transmission power is 3000MW, and rated voltage and rated current are respectively 500kV and 3kA.Transmission line of electricity is grown Degree is set to 2000km.Circuit model uses frequency dependent model, and tower structure uses DC2.Sample frequency is 10kHz.Take 5kHz Under line mould wave impedance calculate anti-traveling wave, it is 213 Ω that the wave impedance under 5kHz is obtained by route parameter calculation.F1~F5 is set for event Barrier point, wherein, F1 represents positive pole line fault, and F2 represents negative pole line fault, and F3 represents event on the outside of converting plant smoothing reactor Barrier, F4 represent Inverter Station AC failure, and F5 represents bipolar line failure.
Table 1 gives under different faults distance and transition resistance positive pole F1 failures, negative pole F2 failures, bipolar F5 failures in area Under Fault Identification result.
Fault Identification result under the conditions of 1 different troubles inside the sample spaces of table
As shown in Table 1, when troubles inside the sample space occurs, although with the increase of transition resistance, the width of the anti-traveling wave at circuit both ends Value integration is reduced, but the anti-traveling wave amplitude integration ratio at circuit both ends is basically unchanged, in different faults pole, fault distance situation Under, the ratio between anti-traveling wave amplitude integration is no more than 1.5, less than threshold value, is judged as troubles inside the sample space.
Table 2 gives the Fault Identification knot under F3 failures and Inverter Station AC F4 failures on the outside of converting plant smoothing reactor Fruit.
The test result of protection algorism under the conditions of 2 different external area errors of table
As shown in Table 2, when external area error occurs, the anti-traveling wave amplitude integration of circuit one end is much larger than the anti-row of the other end Wave amplitude integrates, and external area error can be recognized accurately in the notable difference integrated using the anti-traveling wave amplitude at circuit both ends.
Experiment does not consider influence of noise above, to verify adaptability of the invention in practical engineering application, in simulations Add signal to noise ratio be 20dB noise to simulate in practical application it is possible that signal interference.Fault Identification the results are shown in Table 3。
Fault Identification result in the case of the noise jamming of table 3
From the simulation result of table 3, during troubles inside the sample space, influence of the noise to protection is smaller;During external area error, due to noise The presence of interference, increasing the calculation error of the anti-traveling wave in one end so that the ratio of the anti-traveling wave amplitude integration in circuit both ends declines, but Still there is enough nargin that external area error is recognized accurately.
Above-described embodiment, the purpose of the present invention, technical scheme and beneficial effect are carried out further Describe in detail, should be understood that the embodiment that the foregoing is only the present invention, be not intended to limit the present invention Protection domain, within the spirit and principles of the invention, any modification, equivalent substitution and improvements done etc., all should include Within protection scope of the present invention.

Claims (7)

  1. A kind of 1. HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave, it is characterised in that:Including following Step:
    (a) be arranged on DC transmission system converting plant and Inverter Station line side voltage, current transformer gather respectively positive pole and Voltage, the electric current at negative pole circuit both ends;
    (b) voltage x current at the circuit both ends collected is utilized, calculates the voltage jump amount at positive pole circuit and negative pole circuit both ends And jump-value of current;
    (c) phase-model transformation method is utilized, the voltage jump amount on obtained each polar curve road and jump-value of current are converted into accordingly Line mode voltage component and line mould current component;
    (d) the anti-traveling wave of voltage at DC line both ends is calculated using line mode voltage component and line mould galvanometer, and when specific It is interior that anti-traveling wave amplitude is integrated;
    (e) product of the larger integrated value and smaller integrated value in DC line rectification side traveling wave amplitude integration anti-with inverter side is calculated Divide ratio, if the integration ratio is more than threshold value, failure judgement occurs outside circuit;If the integration ratio is less than threshold value, sentence Disconnected failure occurs on the line.
  2. 2. a kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave according to claim 1, It is characterized in that:The detailed process of the step (b) is:
    (b1) by formula (1), the voltage jump amount and jump-value of current of positive pole circuit and negative pole circuit rectification side are calculated,
    <mrow> <mfenced open = "{" close = ""> <mtable> <mtr> <mtd> <mrow> <msub> <mi>&amp;Delta;u</mi> <mrow> <mi>R</mi> <mi>p</mi> </mrow> </msub> <mo>=</mo> <msub> <mi>u</mi> <mrow> <mi>R</mi> <mi>p</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>N</mi> <mo>)</mo> </mrow> <mo>-</mo> <msub> <mi>u</mi> <mrow> <mi>R</mi> <mi>p</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>N</mi> <mo>-</mo> <mi>n</mi> <mo>)</mo> </mrow> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <msub> <mi>&amp;Delta;i</mi> <mrow> <mi>R</mi> <mi>p</mi> </mrow> </msub> <mo>=</mo> <msub> <mi>i</mi> <mrow> <mi>R</mi> <mi>p</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>N</mi> <mo>)</mo> </mrow> <mo>-</mo> <msub> <mi>i</mi> <mrow> <mi>R</mi> <mi>p</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>N</mi> <mo>-</mo> <mi>n</mi> <mo>)</mo> </mrow> </mrow> </mtd> </mtr> </mtable> </mfenced> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mrow> <mo>(</mo> <mn>1</mn> <mo>)</mo> </mrow> </mrow>
    In formula (1),The respectively voltage jump amount and jump-value of current of positive pole circuit and negative pole circuit rectification side;For positive pole circuit and the voltage of negative pole circuit rectification side, wherein p=1,2,1 represent positive pole circuit, and 2 represent negative pole circuit;N For sampled point number, n is the sampling number in 10ms,Represent the sampling of positive pole circuit and negative pole circuit rectification side voltage Value,Represent the sampled value of positive pole circuit and negative pole circuit rectification side electric current;
    (b2) similarly, using formula (1), the voltage jump amount and current break of positive pole circuit and negative pole circuit inverter side are calculated Amount.
  3. 3. a kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave according to claim 2, It is characterized in that:The detailed process of the step (c) is:
    (c1) by formula (2), the line mode voltage and line mould current component of DC line rectification side are calculated,
    <mrow> <mfenced open = "{" close = ""> <mtable> <mtr> <mtd> <mrow> <msub> <mi>&amp;Delta;u</mi> <mrow> <mi>R</mi> <mn>11</mn> </mrow> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>&amp;Delta;u</mi> <mrow> <mi>R</mi> <mn>1</mn> </mrow> </msub> <mo>-</mo> <msub> <mi>&amp;Delta;u</mi> <mrow> <mi>R</mi> <mn>2</mn> </mrow> </msub> </mrow> <msqrt> <mn>2</mn> </msqrt> </mfrac> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <msub> <mi>&amp;Delta;i</mi> <mrow> <mi>R</mi> <mn>11</mn> </mrow> </msub> <mo>=</mo> <mfrac> <mrow> <msub> <mi>&amp;Delta;i</mi> <mrow> <mi>R</mi> <mn>1</mn> </mrow> </msub> <mo>-</mo> <msub> <mi>&amp;Delta;i</mi> <mrow> <mi>R</mi> <mn>2</mn> </mrow> </msub> </mrow> <msqrt> <mn>2</mn> </msqrt> </mfrac> </mrow> </mtd> </mtr> </mtable> </mfenced> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mrow> <mo>(</mo> <mn>2</mn> <mo>)</mo> </mrow> </mrow>
    In formula, Δ uR11With Δ iR11Respectively the line mode voltage of DC line rectification side and line mould electric current;
    (c2) similarly, by formula (2), the line mode voltage Δ u of DC line inverter side is calculatedI11With line mould electric current Δ iI11
  4. 4. a kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave according to claim 3, It is characterized in that:The detailed process of the step (d) is:
    (d1) line mode voltage component and line mould electric current are utilized, calculates the anti-traveling wave of voltage of DC line rectification side and inverter side,
    <mrow> <mfenced open = "{" close = ""> <mtable> <mtr> <mtd> <mrow> <msub> <mi>u</mi> <mrow> <mi>R</mi> <mi>b</mi> </mrow> </msub> <mo>=</mo> <msub> <mi>&amp;Delta;u</mi> <mrow> <mi>R</mi> <mn>11</mn> </mrow> </msub> <mo>-</mo> <msub> <mi>Z</mi> <mi>C</mi> </msub> <msub> <mi>&amp;Delta;i</mi> <mrow> <mi>R</mi> <mn>11</mn> </mrow> </msub> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <msub> <mi>u</mi> <mrow> <mi>I</mi> <mi>b</mi> </mrow> </msub> <mo>=</mo> <msub> <mi>&amp;Delta;u</mi> <mrow> <mi>I</mi> <mn>11</mn> </mrow> </msub> <mo>-</mo> <msub> <mi>Z</mi> <mi>C</mi> </msub> <msub> <mi>&amp;Delta;i</mi> <mrow> <mi>I</mi> <mn>11</mn> </mrow> </msub> </mrow> </mtd> </mtr> </mtable> </mfenced> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mrow> <mo>(</mo> <mn>3</mn> <mo>)</mo> </mrow> </mrow>
    In formula, uRbWith uIbThe respectively anti-traveling wave of the voltage of DC line rectification side and inverter side, ZCFor DC line wave impedance;
    (d2) in specific time TdIt is interior that anti-traveling wave amplitude is integrated, as shown in formula (4)
    <mrow> <mfenced open = "{" close = ""> <mtable> <mtr> <mtd> <mrow> <msub> <mi>b</mi> <mi>R</mi> </msub> <mo>=</mo> <msubsup> <mo>&amp;Integral;</mo> <msub> <mi>t</mi> <mn>1</mn> </msub> <mrow> <msub> <mi>t</mi> <mn>1</mn> </msub> <mo>+</mo> <msub> <mi>T</mi> <mi>d</mi> </msub> </mrow> </msubsup> <mrow> <mo>|</mo> <msub> <mi>u</mi> <mrow> <mi>R</mi> <mi>b</mi> </mrow> </msub> <mo>|</mo> </mrow> <mi>d</mi> <mi>t</mi> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <msub> <mi>b</mi> <mi>I</mi> </msub> <mo>=</mo> <msubsup> <mo>&amp;Integral;</mo> <msub> <mi>t</mi> <mn>2</mn> </msub> <mrow> <msub> <mi>t</mi> <mn>2</mn> </msub> <mo>+</mo> <msub> <mi>T</mi> <mi>d</mi> </msub> </mrow> </msubsup> <mrow> <mo>|</mo> <msub> <mi>u</mi> <mrow> <mi>I</mi> <mi>b</mi> </mrow> </msub> <mo>|</mo> </mrow> <mi>d</mi> <mi>t</mi> </mrow> </mtd> </mtr> </mtable> </mfenced> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mrow> <mo>(</mo> <mn>4</mn> <mo>)</mo> </mrow> </mrow>
    In formula (4), bRAnd bIIt is that the amplitude of DC line rectification side and the anti-traveling wave of inverter side integrates in a period of time respectively, t1And t2 Respectively DC line rectification side and inverter side detect the time of failure, TdScope value beWherein, l is line Road length, v are traveling wave spread speed;
    (d3) discretization is carried out to formula (4), can obtained
    <mrow> <mfenced open = "{" close = ""> <mtable> <mtr> <mtd> <mrow> <msub> <mi>b</mi> <mi>R</mi> </msub> <mo>=</mo> <msubsup> <mo>&amp;Integral;</mo> <msub> <mi>t</mi> <mn>1</mn> </msub> <mrow> <msub> <mi>t</mi> <mn>1</mn> </msub> <mo>+</mo> <msub> <mi>T</mi> <mi>d</mi> </msub> </mrow> </msubsup> <mrow> <mo>|</mo> <msub> <mi>u</mi> <mrow> <mi>R</mi> <mi>b</mi> </mrow> </msub> <mo>|</mo> </mrow> <mi>d</mi> <mi>t</mi> </mrow> </mtd> </mtr> <mtr> <mtd> <mrow> <msub> <mi>b</mi> <mi>I</mi> </msub> <mo>=</mo> <msubsup> <mo>&amp;Integral;</mo> <msub> <mi>t</mi> <mn>2</mn> </msub> <mrow> <msub> <mi>t</mi> <mn>2</mn> </msub> <mo>+</mo> <msub> <mi>T</mi> <mi>d</mi> </msub> </mrow> </msubsup> <mrow> <mo>|</mo> <msub> <mi>u</mi> <mrow> <mi>I</mi> <mi>b</mi> </mrow> </msub> <mo>|</mo> </mrow> <mi>d</mi> <mi>t</mi> </mrow> </mtd> </mtr> </mtable> </mfenced> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mrow> <mo>(</mo> <mn>4</mn> <mo>)</mo> </mrow> </mrow>
    In formula (5), i=1 represents to detect first sampled point after failure, and Ns is the sampling number in an integration window length, Δ t is the sampling interval.
  5. 5. a kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave according to claim 4, It is characterized in that:The detailed process of the step (e) is:
    (e1) by the amplitude integrated value of DC line rectification side and the anti-traveling wave of inverter side, larger integrated value is than upper less product Score value, obtaining integration ratio R atio is:
    <mrow> <mi>R</mi> <mi>a</mi> <mi>t</mi> <mi>i</mi> <mi>o</mi> <mo>=</mo> <mfrac> <mrow> <mi>m</mi> <mi>a</mi> <mi>x</mi> <mrow> <mo>(</mo> <msub> <mi>b</mi> <mi>R</mi> </msub> <mo>,</mo> <msub> <mi>b</mi> <mi>I</mi> </msub> <mo>)</mo> </mrow> </mrow> <mrow> <mi>min</mi> <mrow> <mo>(</mo> <msub> <mi>b</mi> <mi>R</mi> </msub> <mo>,</mo> <msub> <mi>b</mi> <mi>I</mi> </msub> <mo>)</mo> </mrow> </mrow> </mfrac> <mo>&lt;</mo> <mi>&amp;epsiv;</mi> <mo>-</mo> <mo>-</mo> <mo>-</mo> <mrow> <mo>(</mo> <mn>6</mn> <mo>)</mo> </mrow> </mrow>
    In formula (6), ε is the threshold value of internal fault external fault identical criterion;
    (e2) when integration ratio R atio is less than threshold value ε, failure judgement occurs on the line, and otherwise, failure judgement occurs to exist Outside circuit.
  6. 6. a kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave according to claim 5, It is characterized in that:The threshold value ε is 5.
  7. 7. a kind of HVDC transmission line internal fault external fault recognition methods based on anti-traveling wave according to claim 1, It is characterized in that:Also include step (f) after the step (d), before step (e), the detailed process of the step (f) is: The anti-traveling wave amplitude integral result of circuit that Inverter Station is obtained is transferred to converting plant.
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