CN105548667A - Alternating current signal effective value measuring device - Google Patents

Abstract

The invention provides an alternating current signal effective value measuring device which comprises an absolute value conversion circuit, a high-frequency triangular wave generation circuit, a PWM signal modulation circuit, a front-end integral circuit, a rear-end integral circuit, a reset circuit, a sampling maintaining circuit, a dividing circuit, a root circuit and a timing circuit. According to the alternating current signal effective value measuring device, the absolute value | v(t)/of signals to be tested v(t) and single-polarity symmetric high-frequency triangular wave signal v(t) are subjected to modulation, and high-frequency PWM signals far higher than the v(t) frequency are obtained; due to the fact that v(t) are continuous signals, and vc(t) frequency is far higher than v(t), the area of the PWM signals in each cycle is equal to the area formed by the| v(t)/in the corresponding PWM signal cycle; meanwhile, v(t)<2> is also a continuous function, so that the effective value of v(t) can be obtained by calculating the square and evolution of the PWM signals in the cycle T of v(t). According to the alternating current signal effective value measuring device, the alternating signals v(t) for calculating the effective value are all alternating cycle signals, namely alternating current cycle signals containing direct current components and alternating current components, so that the alternating current signal effective value measuring device can effectively solve the problem that the signal to be tested contains direct current components and harmonic waves and is wider in application range.

Description

A kind of AC signal effective value measurement device

Technical field

The invention belongs to instrument and meter, signal transacting and measurement and control area, be specifically related to a kind of AC signal effective value measurement device, for measuring the effective value of any ac cycle signal.

Background technology

Ac cycle signal effective value measurement has important effect at instrument and meter, signal transacting and measurement and control area, is the important component part that electrical parameter is measured.At present, conventional ac cycle signal effective value measurement is mainly divided into hard ware measure and software measurement two schemes.It is based on by measuring that hardware plan measures ac cycle signal effective value | v (t) | mean value ask for the effective value of ac cycle signal v (t) this is because meet for sinusoidal ac signal: thus effective value can be calculated by the method measuring mean value.But there is some deficiency following in this method: 1. the method applicable surface is narrow, is only applicable to sinusoidal signal; 2. can not there is DC component in this sinusoidal signal; 3. can not there is harmonic wave in this sinusoidal signal.Software measurement is by the absolute value signal of high speed processor to periodic alternating signal v (t) | v (t) | carry out high-speed sampling, then according to effective value defined formula $V_{rms}=\sqrt{\frac{1}{{\mathrm{NT}}_s}\underset{i=1}{\overset{N}{\mathrm{\&Sigma;}}}v{\left({\mathrm{iT}}_s\right)}^2{T}_s}=\sqrt{\frac{1}{N}\underset{i=1}{\overset{N}{\mathrm{\&Sigma;}}}{V}_i^2}$ (wherein: $f_s=\frac{1}{T_s}=\frac{N}{T},$ F _sfor sample frequency, T _sfor the sampling period, T is the signal period) ask for the effective value of signal.The effective value of any period signal can being measured by the method, but have the following disadvantages: 1. for ensureing precision, high speed processor must be adopted to realize high-speed sampling and supercomputing, thus high to processor requirement; 2. at calculating effective value V _rmsneed to carry out N multiplying of floating number, the computing of N sub-addition, 1 division arithmetic and 1 extracting operation, thus can be a large amount of take cpu system internal memory and working time, particularly requirement of real-time high occasion and can have problems.

Summary of the invention

The object of the invention is to overcome above-mentioned weak point, a kind of AC signal effective value measurement device is provided.

Technical scheme provided by the invention is as follows:

A kind of AC signal effective value measurement device, it is characterized in that, comprise absolute value translation circuit, high frequency triangle wave circuit for generating, pwm signal modulation circuit, front end integrating circuit, rear end integrating circuit, reset circuit, sampling hold circuit, division circuit, root circuit and timing circuit;

The input end of absolute value translation circuit is connected with measured signal, and the output terminal of absolute value translation circuit is connected with the input end of pwm signal modulation circuit; Absolute value translation circuit is used for measured signal v (t) being carried out absolute value conversion and obtains | v (t) |; The output terminal of high frequency triangle wave circuit for generating is connected with the input end of pwm signal modulation circuit; High frequency triangle wave circuit for generating is for generation of high frequency triangular carrier v _c(t);

Pwm signal modulation circuit is used for input | v (t) | and v _ct () is carried out PWM and is obtained signal pwm signal modulation circuit, front end integrating circuit, rear end integrating circuit are connected successively with sampling hold circuit;

Front end integrating circuit is by signal as input signal, right carry out integration and obtain signal meet wherein α ₁for the integral coefficient of front end integrating circuit; Rear end integrating circuit is by the output signal of front end integrating circuit as input signal, right carry out integration and obtain signal meet $v_{02}^K\left(t\right)=V_{o2}^K\left(0\right)+{\&Integral;}_0^t({\mathrm{\&alpha;}}_2\&times;{\&Integral;}_0^{\mathrm{\&tau;}}{\mathrm{\&alpha;}}_1\&times;VCCd\mathrm{\&upsi;})d\mathrm{\&tau;},t\&Element;\&lsqb;0,T_{on}^K\&rsqb;;$ Wherein α ₂for the integral coefficient of rear end integrating circuit; for rear end integrating circuit is at the initial value of K signal period; The output signal of rear end integrating circuit as the input signal of the sampling hold circuit of rear end;

Reset circuit is all connected with rear end integrating circuit with front end integrating circuit, returns to original state for making front end integrating circuit and rear end integrating circuit;

Timing circuit comprises the timer of no-voltage comparator circuit, pulse signal generation circuit and band latch function; No-voltage comparator circuit is used for positive input and the reverse input end of measured signal v (t) and benchmark positive voltage δ being received respectively comparer, obtains comparison signal v _q(t); The output terminal of no-voltage comparator circuit is connected with pulse signal generation circuit, v _qt () start pulse signal circuit for generating obtains pulse signal v _p(t); v _pt timer that () triggers band latch function exports timing cycle v _t, be connected to the divisor input end of division circuit; v _pt () is also connected with sampling hold circuit, for triggering sampling hold circuit;

Sampling hold circuit is by the output signal of rear end integrating circuit as input signal, by the output signal v of pulse signal generation circuit _pthe rising edge triggered latch of (t); The output signal v of sampling hold circuit _h(NT) as the dividend input signal of division circuit below;

Division circuit is used for realizing v _h(NT) divided by v _t, obtain and as the input of root circuit; Root circuit is for realizing the signal to input carry out extracting operation, obtain

A kind of AC signal effective value measurement device of the present invention, compared with hard ware measure scheme of the prior art, has following advantage:

1. the present invention passes through the absolute value of tested AC signal v (t) | v (t) | and with unipolarity symmetrical high frequency triangle wave signal v _ct () carries out the high-frequency PWM signal that modulation obtains far above v (t) frequency.Because v (t) is for continuous signal and v _ct () frequency is far above v (t), thus the area of each cycle pwm signal is with in the corresponding pwm signal cycle | v (t) | and the area equation formed.Meanwhile, v (t) ²also be continuous function, thus can ask for the effective value of v (t) by the quadratic sum evolution of pwm signal in the cycle T of calculating v (t).Because the present invention calculates the AC signal v (t) of effective value for all ac cycle signals, certainly the ac cycle signal containing DC component and harmonic component is also comprised, so the present invention effectively can solve measured signal containing DC component and harmonic problem, thus the scope of application is wider;

2. the present invention is direct measuring-signal effective value thus precision is higher;

3. the present invention is without the need to sampling and floating point arithmetic to the amplitude of v (t).

4. the present invention is without the need to mlultiplying circuit;

5. only need single power supply when the present invention realizes, and the original paper that circuit relates to is general low cost original paper, thus this invention has very high cost performance and applicable interchangeability.

6. circuit of the present invention has that structure is simple, cost is low, precision is high, measuring speed is fast, the features such as reliability is high, practical; Effectively can detect the effective value of ac cycle signal, for instrument and meter, digital signal processing and measurement and control area provide a kind of new measurement scheme, particularly be applied to the measurement of alternating voltage and current effective value.

Accompanying drawing explanation

Fig. 1 is PWM area equivalent schematic diagram;

Fig. 2 is AC signal effective value measurement schematic diagram of device;

Fig. 3 is a kind of hardware circuit diagram that AC signal effective value measurement device is corresponding;

Embodiment

The invention provides a kind of AC signal effective value measurement device, mainly apply PWM area equivalent principle.PWM area equivalent schematic diagram as shown in Figure 1, known according to " Mechanical & electrical Transmission Control " (Deng Xingzhong etc., publishing house of the Central China University of Science and Technology, the 5th edition) chapter 8 impulse equivalency principle, have on inertial element when two equal and variform burst pulses of momentum load, effect is identical.Can obtain, at [0, T _s] (T _svery little) in the time, if v (t) > 0, exist:

${\&Integral;}_0^{T_s}v\left(t\right)dt=VCC\&times;T_{on}^1---\left(1\right)$

Wherein: VCC is supply voltage; V (t) is periodic signal to be measured; be in the 1st switch periods for the time of VCC; for v (t) and unipolarity symmetric triangular ripple signal v _c(t) relatively after at [0, T _s] in the pwm signal that obtains.

In like manner, at [T _s, 2T _s], [2T _s, 3T _s], [3T _s, 4T _s], [4T _s, 5T _s] there are formula (2) ~ (5) successively:

${\&Integral;}_{T_s}^{2T_s}v\left(t\right)dt=VCC\&times;T_{on}^2---\left(2\right)$

${\&Integral;}_{2T_s}^{3T_s}v\left(t\right)dt=VCC\&times;T_{on}^3---\left(3\right)$

${\&Integral;}_{3T_s}^{4T_s}v\left(t\right)dt=VCC\&times;T_{on}^4---\left(4\right)$

${\&Integral;}_{4T_s}^{5T_s}v\left(t\right)dt=VCC\&times;T_{on}^5---\left(5\right)$

Wherein, be respectively in the 2nd, 3,4,5 switch periods for VCC time (i=2,3,4 ...); for v (t) and unipolarity symmetric triangular ripple signal v _c(t) relatively after at [iT _s, (i+1) T _s] in the pwm signal that obtains.Can think at [(K-1) T _s, KT _s] in (1≤K≤N), the value of v (t) remains unchanged, that is:

v(t)＝V(KT _s)(N≥K≥1)(6)

Wherein, V (KT _s) for v (t) is at t=KT _sthe value in moment, namely

So have:

Again because momentum area equivalent principle, so have:

${\&Integral;}_{{\mathrm{KT}}_s}^{(K+1)T_s}v\left(t\right)dt=V\left({\mathrm{KT}}_s\right)\&times;T_s=VCC\&times;T_{on}^K---\left(8\right)$

If there is v (t) >=0, t ∈ [0, T], then have:

${\&Integral;}_0^{T}v\left(t\right)dt=\underset{K=1}{\overset{N}{\mathrm{\&Sigma;}}}{\&Integral;}_{{\mathrm{KT}}_s}^{(K+1)T_s}v\left(t\right)dt=\underset{K=1}{\overset{N}{\mathrm{\&Sigma;}}}V\left({\mathrm{KT}}_s\right)T_s=\underset{K=1}{\overset{N}{\mathrm{\&Sigma;}}}VCC\&times;T_{on}^K---\left(9\right)$

Known according to the definition of periodic signal effective value: wherein: V _rmsfor exchanging week

The effective value of phase signal v (t).Simultaneous formula (8) and (9) can obtain:

${\&Integral;}_0^{T}v{\left(t\right)}^{2}dt=\underset{K=1}{\overset{N}{\mathrm{\&Sigma;}}}{\&Integral;}_{{\mathrm{KT}}_s}^{(K+1)T_s}v{\left(t\right)}^{2}dt=\underset{K=1}{\overset{N}{\mathrm{\&Sigma;}}}V{\left({\mathrm{KT}}_s\right)}^2{T}_s=\frac{1}{T_s}\underset{K=1}{\overset{N}{\mathrm{\&Sigma;}}}{(VCC\&times;T_{on}^K)}^2---\left(10\right)$

Thus have:

$V_{rms}=VCC\sqrt{\frac{1}{T\&times;T_s}\underset{K=1}{\overset{N}{\mathrm{\&Sigma;}}}{\left(T_{on}^K\right)}^2}---\left(11\right)$

If will as the input signal of integrating circuit 1, then in K the switch periods obtained, integrating circuit 1 output signal is:

$\begin{array}{cc}{v}_{o1}^K\left(\mathrm{\&tau;}\right)=V_{o1}^K\left(0\right)+{\&Integral;}_0^{\mathrm{\&tau;}}{\mathrm{\&alpha;}}_1\&times;V_{PWM}^{K}d\mathrm{\&upsi;}& \mathrm{\&tau;}\&Element;\&lsqb;0,T_s\&rsqb;\end{array}---\left(12\right)$

Wherein, be the output signal of integrating circuit 1 in K switch periods, be the initial value that in K switch periods, integrating circuit 1 starts the output of long-pending time-sharing circuit, α ₁for the integral coefficient of integrating circuit 1, for time.Because integrating circuit 1 is in the timesharing of each switch periods inner product, initial value all will be reset to 0, so have arrange (12) can obtain:

$\begin{array}{cc}{v}_{o1}^K\left(\mathrm{\&tau;}\right)={\&Integral;}_0^{\mathrm{\&tau;}}{\mathrm{\&alpha;}}_1\&times;V_{PWM}^{K}d\mathrm{\&upsi;}& \mathrm{\&tau;}\&Element;\&lsqb;0,T_s\&rsqb;\end{array}---\left(13\right)$

Again will as the input signal of integrating circuit 2, then in K the switch periods obtained, integrating circuit 2 output signal is:

$\begin{array}{cc}{v}_{02}^K\left(t\right)=V_{o2}^K\left(0\right)+{\&Integral;}_0^t({\mathrm{\&alpha;}}_2\&times;{\&Integral;}_0^{\mathrm{\&tau;}}{\mathrm{\&alpha;}}_1\&times;V_{PWM}^{K}d\mathrm{\&upsi;})d\mathrm{\&tau;}& t\&Element;\&lsqb;0,T_s\&rsqb;\end{array}---\left(14\right)$

Wherein, be the initial value of second integrating circuit K signal period, α ₂for the integral coefficient of integrating circuit 2.When the initial value of K signal period it is the output valve of K-1 signal period namely then at the end of K signal period, then have:

$v_{02}^K\left({\mathrm{KT}}_s\right)=V_{o2}^K\left(0\right)+{\&Integral;}_0^t({\mathrm{\&alpha;}}_2\&times;{\&Integral;}_0^{\mathrm{\&tau;}}{\mathrm{\&alpha;}}_1\&times;V_{PWM}^{K}d\mathrm{\&upsi;})d\mathrm{\&tau;}=V_{o2}^K\left(0\right)+\frac{1}{2}{\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_{2}VCC{\left(T_{on}^K\right)}^2---\left(15\right)$

So have:

$\begin{array}{c}{v}_{02}^K\left({\mathrm{KT}}_s\right)=V_{o2}^K\left(0\right)+\frac{1}{2}{\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_{2}VCC{\left(T_{on}^K\right)}^2\\ =v_{02}^{K-1}\left(\right(K-1\left)T_s\right)+\frac{1}{2}{\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_{2}VCC{\left(T_{on}^K\right)}^2\\ =V_{02}^{K-1}\left(0\right)+\frac{1}{2}{\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_{2}VCC{\left(T_{on}^{K-1}\right)}^2+\frac{1}{2}{\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_{2}VCC{\left(T_{on}^K\right)}^2\\ .\\ .\\ .\\ =V_{02}^1\left(0\right)+\frac{1}{2}{\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_{2}VCC\underset{i=1}{\overset{K}{\mathrm{\&Sigma;}}}{\left(T_{on}^i\right)}^2\end{array}---\left(16\right)$

When then:

$v_{02}^K\left({\mathrm{KT}}_s\right)=\frac{1}{2}{\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_{2}VCC\underset{i=1}{\overset{K}{\mathrm{\&Sigma;}}}{\left(T_{on}^i\right)}^2---\left(16\right)$

If will as sampling hold circuit input end, then the output end signal v of sampling hold circuit _hat t=NT _sshi Wei:

$v_H\left({\mathrm{NT}}_s\right)=\frac{1}{2}{\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_{2}VCC\underset{i=1}{\overset{N}{\mathrm{\&Sigma;}}}{\left(T_{on}^i\right)}^2---\left(17\right)$

Simultaneous formula (11) and (17) can obtain:

$V_{rms}=\sqrt{\frac{VCC}{T\&times;T_s}\&times;\frac{2v_H\left({\mathrm{NT}}_s\right)}{{\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_2}}---\left(18\right)$

When ${\mathrm{\&alpha;}}_1{\mathrm{\&alpha;}}_2=\frac{2\&times;VCC}{T_s}$ Time, then:

$V_{rms}=\sqrt{\frac{v_H\left({\mathrm{NT}}_s\right)}{T}}---\left(18\right)$

Thus can by the output voltage v of acquired integrated circuit _o(NT _s) and the cycle T of v (t) effective value V can be obtained _rms.When applying the cycle of timing circuit measuring-signal v (t), then the output signal v of timer _tbe cycle T, institute with the formula (18) is:

$V_{rms}=\sqrt{\frac{v_H\left({\mathrm{NT}}_s\right)}{v_T}}---\left(19\right)$

Based on above principle, the invention provides a kind of AC signal effective value measurement device, as shown in Figure 2, absolute value translation circuit, high frequency triangle wave circuit for generating, pwm signal modulation circuit, front end integrating circuit, rear end integrating circuit, reset circuit, sampling hold circuit, division circuit, root circuit and timing circuit is comprised.

The input end of absolute value translation circuit is connected with measured signal, and the output terminal of absolute value translation circuit is connected with the input end of pwm signal modulation circuit; Absolute value translation circuit is used for measured signal v (t) being carried out absolute value conversion and obtains | v (t) | and, wherein a kind of implementation of absolute value translation circuit is with four diode composition full-wave rectifying circuits.

The output terminal of high frequency triangle wave circuit for generating is connected with the input end of pwm signal modulation circuit; High frequency triangle wave circuit for generating is for generation of high frequency triangular carrier v _c(t).

Pwm signal modulation circuit is used for input | v (t) | and v _ct () is carried out PWM and is obtained signal wherein a kind of implementation of pwm signal modulation circuit realizes pwm signal modulation with a comparer composition comparator circuit.

Pwm signal modulation circuit, front end integrating circuit, rear end integrating circuit are connected successively with sampling hold circuit.

Front end integrating circuit is by signal as input signal, when time, the forward integrating circuit pair that front end integrating circuit consists of R2, C1, R3, C2 and operational amplifier 1 carry out integration and obtain signal meet $\begin{array}{cc}{v}_{o1}^K\left(t\right)={\&Integral;}_0^t{\mathrm{\&alpha;}}_1\&times;VCCd\mathrm{\&upsi;}& t\&Element;\&lsqb;0,T_{on}^K\&rsqb;\end{array}.$ Wherein VCC is Switching Power Supply; for time; α ₁for the integral coefficient of front end integrating circuit, determined by R2, C1, R3, C2; The output signal of front end integrating circuit as the input signal of rear end integrating circuit.

Rear end integrating circuit is by the output signal of front end integrating circuit as input signal, when time, the forward integrating circuit pair that rear end integrating circuit consists of R5, C3, R6, C4 and operational amplifier 2 carry out integration and obtain signal meet $\begin{array}{cc}{v}_{02}^K\left(t\right)=V_{o2}^K\left(0\right)+{\&Integral;}_0^t({\mathrm{\&alpha;}}_2\&times;{\&Integral;}_0^{\mathrm{\&tau;}}{\mathrm{\&alpha;}}_1\&times;VCCd\mathrm{\&upsi;})d\mathrm{\&tau;}& t\&Element;\&lsqb;0,T_{on}^K\&rsqb;\end{array}.$ Wherein α ₂for the integral coefficient of rear end integrating circuit, determined by R5, C3, R6, C4; for rear end integrating circuit is at the initial value of K signal period; The output signal of rear end integrating circuit as the input signal of the sampling hold circuit of rear end.

Reset circuit is all connected with rear end integrating circuit with front end integrating circuit, returns to original state for making front end integrating circuit and rear end integrating circuit.A kind of typical realisation of reset circuit is: be made up of resistance R1, triode Q1, resistance R4, field effect transistor M1, field effect transistor M2 and field effect transistor M3.When time, triode Q1 ends, the voltage v on the grid source electrode on N channel field-effect pipe M1, M2 and M3 _gs=0, so field effect transistor M1, M2 and M3 cut-off; When time, triode Q1 conducting, the voltage v on the grid source electrode on N channel field-effect pipe M1, M2 and M3 _gs≈ VCC, thus field effect transistor M1, M2 and M3 conducting, the electric charge of upper to electric capacity C1, C2, C3 storage is discharged fast, makes the voltage at electric capacity C1, C2, C3 two ends be zero-sum the voltage at electric capacity C4 two ends then remains unchanged;

Timing circuit comprises the timer of no-voltage comparator circuit, pulse signal generation circuit and band latch function; No-voltage comparator circuit is used for measured signal v (t) and benchmark positive voltage δ (such as δ=0.01V or δ=0.001V, set according to actual conditions by user) receive positive input and the reverse input end of comparer respectively, obtain comparison signal v _qt (), its cycle is all T mutually with v (t).The output terminal of no-voltage comparator circuit is connected with pulse signal generation circuit, v _qt () start pulse signal circuit for generating obtains pulse signal v _p(t).V _pt timer that () triggers band latch function exports timing cycle v _t, be connected to the divisor input end of division circuit.Meanwhile, v _pt () is also connected with sampling hold circuit, for triggering sampling hold circuit, make guarantee when N+1 cycle starts, initial value be zero.

Sampling hold circuit is by the output signal of rear end integrating circuit as input signal, by the output signal v of pulse signal generation circuit _pthe rising edge triggered latch of (t).Due to v _pt the cycle of () is consistent with the cycle of signal v (t) is T, so when t=NT (N be greater than 0 positive integer), sampling hold circuit is by input signal be latched into output terminal, i.e. the output signal of sampling hold circuit due to when each cycle integrated starts, i.e. v _pt in () rising edge of a pulse moment, field effect transistor M4 and M5 conducting, guarantee when each cycle T starts, initial value be zero.So, (wherein T=KT _s); The output signal v of sampling hold circuit _h(NT) as the dividend input signal of division circuit below.

Division circuit is used for realizing v _h(NT) divided by v _t, obtain and as the input of root circuit.Root circuit is for realizing the signal to input carry out extracting operation, obtain

Principle of work and the process of AC signal effective value measurement device of the present invention are:

It is T that high frequency triangle wave circuit for generating produces the cycle _striangular wave v _c(t) as carrier wave, with the output signal of absolute value translation circuit | v (t) | input pwm signal modulation circuit and carry out pwm signal and modulate and obtain corresponding signal front end integrating circuit and rear end integrating circuit are by input carry out integration to obtain sampling hold circuit pair carry out sampling maintenance and obtain v _h.

AC signal v (t) is shaped as square wave v by timing circuit _q(t), and by v _qt the rising edge of () obtains pulse signal v as the trigger pip of pulse signal generation circuit _p(t); Timer circuit with latch function is for obtaining the cycle T of AC signal v (t), and its output quantity is v _t; Division circuit and root circuit are used for the signal v to input _hand v _tcarry out division and extracting operation obtains effective value

A kind of implementation of AC signal effective value measurement device of the present invention as shown in Figure 3, mainly comprise triangular signal generator based, absolute value circuit, comparer 1, comparer 2, pulse signal generation circuit, resistance R1, R2, R3, R4, R5, R6, electric capacity C1, C2, C3, C4, the timer of triode Q1, metal-oxide-semiconductor M1, M2, M3, M4, M5, multiplier, amplifier 1, amplifier 2, delay unit delay, sampling hold circuit, band output latch, division circuit and root circuit.The principle of work of this circuit is:

1. ac cycle signal v (t) to be measured obtains through absolute value circuit | v (t) |, and the high frequency triangle wave signal v produced with triangular-wave generator _ct () compares through comparer 2 and obtains PWM modulation signal

2. resistance R2, electric capacity C1, resistance R3, electric capacity C2 and amplifier 1 form front end integrating circuit, to signal carry out integration K switch periods, obtain $\begin{array}{cc}{v}_{o1}^K\left(\mathrm{\&tau;}\right)=V_{o1}^K\left(0\right)+{\&Integral;}_0^{\mathrm{\&tau;}}{\mathrm{\&alpha;}}_1\&times;V_{PWM}^{K}d\mathrm{\&upsi;}& \mathrm{\&tau;}\&Element;\&lsqb;0,T_s\&rsqb;\end{array};$ Resistance R1, triode Q1, resistance R4, N-channel MOS pipe M1, M2 form reset circuit, realize during for low level, electric capacity C1 and C2 discharges by M1 and M2 conducting, realizes $\begin{array}{cc}{v}_{o1}^K\left(\mathrm{\&tau;}\right)=V_{o1}^K\left(0\right)+{\&Integral;}_0^{\mathrm{\&tau;}}{\mathrm{\&alpha;}}_1\&times;V_{PWM}^{K}d\mathrm{\&upsi;}& \mathrm{\&tau;}\&Element;\&lsqb;0,T_s\&rsqb;\end{array}$ Initial value be zero;

3. resistance R5, resistance R6, electric capacity C3, electric capacity C4 and amplifier 2 form rear end integrating circuit, and it is right to realize carry out forward integration to obtain $\begin{array}{cc}{v}_{02}^K\left(t\right)=V_{o2}^K\left(0\right)+{\&Integral;}_0^t({\mathrm{\&alpha;}}_2\&times;{\&Integral;}_0^{\mathrm{\&tau;}}{\mathrm{\&alpha;}}_1\&times;V_{PWM}^{K}d\mathrm{\&upsi;})d\mathrm{\&tau;}& t\&Element;\&lsqb;0,T_s\&rsqb;\end{array}.$ N-channel MOS pipe M3, M4 form reset circuit and realize working as v _pt there is pulse and after the time delay that delay unit delay carries out very short time in (), by electric capacity C3 and C4 discharge reduction.Due to v _pt () recurrence interval is identical with signal v (t) cycle, when thus can ensure the effective value calculating in one-period T,

4. comparer 1 realizes ac cycle signal v (t) to be shaped as square-wave signal v _qt (), wherein δ is arbitrarily small positive voltage, is set by the user (such as δ=0.01V or δ=0.001V etc.).V _qt the rising edge of () is used for start pulse signal circuit for generating, produce pulse signal v _pt (), the cycle of this pulse signal is identical with the cycle of ac cycle signal v (t).V _pt () is mainly used in the following aspects: one, trigger sampling hold circuit, when real present time is t=nT, to the output signal of integrating circuit carry out sampling to keep, obtain v _h; Two, through time delay and the signal of very short time after carrying out sampling maintenance, trigger N-channel MOS pipe M3, M4 and M5 conducting, reset capacitance C3 and C4; Three, trigger the timer of band latch function, obtain periodic quantity and the v of ac cycle signal v (t) _t;

Division circuit is to input signal v _hand v _tcarry out computing to obtain effective value is obtained again through root circuit

It is apparent to one skilled in the art that the present invention can change into various ways, and such change is not thought and departed from the scope of the present invention.All like this to the apparent amendment of the technician in described field, by be included in this claim scope within.

Claims (1)

1. an AC signal effective value measurement device, it is characterized in that, comprise absolute value translation circuit, high frequency triangle wave circuit for generating, pwm signal modulation circuit, front end integrating circuit, rear end integrating circuit, reset circuit, sampling hold circuit, division circuit, root circuit and timing circuit;

The input end of absolute value translation circuit is connected with measured signal, and the output terminal of absolute value translation circuit is connected with the input end of pwm signal modulation circuit; Absolute value translation circuit is used for measured signal v (t) being carried out absolute value conversion and obtains | v (t) |; The output terminal of high frequency triangle wave circuit for generating is connected with the input end of pwm signal modulation circuit; High frequency triangle wave circuit for generating is for generation of high frequency triangular carrier v _c(t);

Pwm signal modulation circuit is used for input | v (t) | and v _ct () is carried out PWM and is obtained signal pwm signal modulation circuit, front end integrating circuit, rear end integrating circuit are connected successively with sampling hold circuit;

Front end integrating circuit is by signal as input signal, right carry out integration and obtain signal meet wherein α ₁for the integral coefficient of front end integrating circuit; Rear end integrating circuit is by the output signal of front end integrating circuit as input signal, right carry out integration and obtain signal meet wherein α ₂for the integral coefficient of rear end integrating circuit; for rear end integrating circuit is at the initial value of K signal period; The output signal of rear end integrating circuit as the input signal of the sampling hold circuit of rear end;

Reset circuit is all connected with rear end integrating circuit with front end integrating circuit, returns to original state for making front end integrating circuit and rear end integrating circuit;

Timing circuit comprises the timer of no-voltage comparator circuit, pulse signal generation circuit and band latch function; No-voltage comparator circuit is used for positive input and the reverse input end of measured signal v (t) and benchmark positive voltage δ being received respectively comparer, obtains comparison signal v _q(t); The output terminal of no-voltage comparator circuit is connected with pulse signal generation circuit, v _qt () start pulse signal circuit for generating obtains pulse signal v _p(t); v _pt timer that () triggers band latch function exports timing cycle v _t, be connected to the divisor input end of division circuit; v _pt () is also connected with sampling hold circuit, for triggering sampling hold circuit;

Sampling hold circuit is by the output signal of rear end integrating circuit as input signal, by the output signal v of pulse signal generation circuit _pthe rising edge triggered latch of (t); The output signal v of sampling hold circuit _h(NT) as the dividend input signal of division circuit below;

Division circuit is used for realizing v _h(NT) divided by v _t, obtain and as the input of root circuit; Root circuit is for realizing the signal to input carry out extracting operation, obtain