CN105530517B - A kind of decoder and the method for damaging decoding video images - Google Patents

A kind of decoder and the method for damaging decoding video images Download PDF

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CN105530517B
CN105530517B CN201410515706.1A CN201410515706A CN105530517B CN 105530517 B CN105530517 B CN 105530517B CN 201410515706 A CN201410515706 A CN 201410515706A CN 105530517 B CN105530517 B CN 105530517B
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bits
bit
value
current macro
reconstructed value
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CN105530517A (en
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胡家鹏
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Actions Technology Co Ltd
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Juxin (zhuhai) Science & Technology Co Ltd
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Abstract

A kind of method that the present invention provides decoder and damages decoding video images, wherein be divided into multiple macro blocks per frame video image, this method includes:The residual values of current macro are added to obtain the reconstructed value of the positions the d bit of current macro with intra prediction value or inter-prediction value and are cached in the first buffer area;Wherein, intra prediction is carried out by reading the reconstructed value of the positions the d bit of decoded adjacent macroblocks in frame from the first buffer area, obtains the intra prediction value of current macro;The reconstructed value of the positions the d bit of current macro is moved right n bits, it obtains the reconstructed value of the n bits of d of current macro and is filtered, or, the reconstructed value of the positions the d bit of current macro is filtered, the reconstructed value of filtered d bit is moved right n bits, the decoding result of n bits of d is obtained and exports, n is the positive integer less than d.The present invention can not only save read-write DDR bandwidth and hardware resource but also be not in colored screen, ensure picture quality.

Description

A kind of decoder and the method for damaging decoding video images
Technical field
The present invention relates to high-definition digital video compression coding and decoding technical field more particularly to a kind of decoder and damage decoding The method of video image.
Background technology
For video decoder, as shown in Figure 1, including mainly:Inverse quantization module (Q-1), inverse transform block (T-1), phase Add module, limit module Clip, deblocking filtering module dblk, adaptive sampling point compensating module SAO, with reference to frame buffer (Ref Buffer), intra-framed prediction module (Pintra) and Inter prediction module (Pinter), complete bit locating depth BitDepth=8 or 10 Video image decoding flow include mainly:
Each frame video image can be divided into many macro blocks, whether 8bit or 10bit video image macro-blocks code stream Will first entropy decoding obtain entropy decoding coefficient (Coefficients), then carry out inverse quantization, inverse transformed through inverse quantization module Module carries out inverse transformation and obtains residual values (d+1), and summation module is by obtained residual values intra prediction corresponding with the macro block Value or inter-prediction value are added to obtain reconstructed value;Reconstructed value is limited in (0,2 by limit moduled-1) in range, it is each in this way to rebuild Value can be indicated (d=8 or 10) with d bits;Deblocking filtering is used to carry out deblocking filtering to the reconstructed value after limit;Adaptive sample Point compensating module is used to carry out adaptive sampling point compensation calculation to the reconstructed value after deblocking filtering, obtains decoding result and exports.
Each macro block may use intra prediction that may also use inter-prediction, the reconstructed value of current macro that can be used as currently The intra prediction of frame following macroblocks, the interframe that macro block in next frame image is used in after the reconstruction value filtering of present frame macro block are pre- It surveys.The prediction mode that each macro block uses can be indicated in video code flow.
The reconstructed value of decoded adjacent macroblocks non-filtered (dblk&SAO) carries out frame in intra-framed prediction module reference frame Interior prediction, reconstructed value of the Inter prediction module with reference to the macro block adjacent with current macro filtered (dblk&SAO) of decoded frame Carry out inter-prediction.
Specifically, video decoder determines according to the prediction mode indicated in video code flow and needs to combine current macro Residual values and intra prediction value calculate current macro reconstructed value when, will be in the residual values of current macro and frame by summation module The intra prediction value of prediction module output is added to obtain the reconstructed value of current macro;Determine the residual values needed in conjunction with current macro And inter-prediction value is when calculating the reconstructed value of current macro, by summation module by the residual values and Inter prediction module of current macro The inter-prediction value of output is added to obtain the reconstructed value of current macro.
Each corresponding module decoding 10bit sequence ratio decoder 8bit sequences are required for consume firmly more in the above decoding process Part resource.
The 10bit sequential decodings of full specification are supported to need to consume more hardware cells and occupy more bandwidth, such as Fruit can only increase seldom hardware resource on existing 8bit decoders can reach decoding 10bit sequences and visually Difference is little, then is a good solution.
Existing method is all to start with considering 10bit data operations are converted to 8bit numbers in which step from above-mentioned flow chart According to operation, it is evident that due to output decoding result can only be stored in DDR (i.e. DDR SDRAM, Double Data Rate synchronous dynamic random Memory), for ensure bandwidth its data locating depth be preferably 8 rather than 10, therefore at least must be after filtering (dblk&SAO) Conversion.
The presently preferred decoding process for solving to save hardware resource is as shown in Figure 2:
WhereinIt means and 10 bit datas is converted into 8bit data, conversion method is to move to right 10 bit datas Two.It means and 8 bit datas is converted into 10bit data, conversion method is that 8 bit datas are moved to left two. In decoding process, the reconstructed value that limit module will add up module output moves to right two, and reconstructed value is limited in (0,28-1) range It is interior;Intra-framed prediction module carries out intra prediction again after the reconstructed value for limiting module output is moved to left two, Inter prediction module will Obtained inter-prediction value exports after moving to left two.
It can be observed from fig. 2 that the program is when decoding 10bit code streams, 3 inverse quantization, inverse transformation and intra prediction modules It is 10bit operations, and filters (deblocking filtering and adaptive sampling point compensation) and Inter prediction module is 8bit operations. The hardware cell for why doing so the 10bit operations consumption of mainly latter two module is more than first three.The technology can be preferably Close to original decoded effect, can be obtained preferably than coefficient is just directly converted to 8bit from 10bit from entropy decoding step PSNR (Peak Signalto Noise Ratio, Y-PSNR) (40DB or so) and better image quality.
But said program has one disadvantage in that, is exactly that HEVC does the prediction of intra in frame and the reconstructed value of surrounding macro blocks can be utilized to do The prediction of 35 kinds of patterns such as horizontal vertical, but after obtaining reconstructed value in above-mentioned flow chart can first data from 10bit limit to 8bit filters (dblk&SAO), and 10bit is expanded to from 8bit again when needing for doing intra predictions, this can lead in the process It causes the reference pixel around intra macro blocks to have error with original, causes decoding effect not fully up to expectations.Application condition is apparent Be when 32 × 32 luminance blocks do intra predictions can to the reference pixel (reference sample) around intra macro blocks into The operation of row smooth (smoothing), when the discontinuity of reference pixel is more than a threshold value (1<<(bitdepth-5)) meeting when All surrounding reference pixels are carried out with the smooth smoothing modes of bilinear interpolation bilinear interpolation It changes (smooth called strong intra smoothing in strong frame).And if original reference pixel is not above What the threshold value was not then done or done is [121] small smothing filtering, can cause the data predicted entirely different at this time, cause to decode It is incorrect, and the mistake is possible to diffuse to follow-up intra blocks in the frame and causes large area to the decoding of subsequent P frames Decoding error.Image Huaping phenomenon will appear using the image that the above method decodes.
Invention content
A kind of method that the present invention provides decoder and damages decoding video images, can both save read-write DDR bandwidth and Hardware resource is not in colored screen again, ensures picture quality.
The present invention provides a kind of method that decoder damages decoding video images, wherein is divided into per frame video image Multiple macro blocks, this method include:
The residual values of current macro are added with intra prediction value or inter-prediction value to obtain the positions the d bit of current macro Reconstructed value is simultaneously cached in the first buffer area;Wherein, pass through the d of the decoded adjacent macroblocks out of the first buffer area reading frame The reconstructed value of position bit carries out intra prediction, obtains the intra prediction value of current macro;
The reconstructed value of the positions the d bit of current macro is moved right n bits, the weight of the positions the d-n bit of current macro is obtained Built-in value is filtered the reconstructed value of the d-n bit, alternatively, being filtered to the reconstructed value of the positions the d bit of current macro The reconstructed value of filtered d bit is moved right n bits, obtains and export the decoding result of d-n bits, n is big by wave In the integer that 1 is less than d.
Preferably, this method further includes:
After the decoding result of the positions d-n bit for often obtaining a macro block, by the decoding result of the d-n bit second Buffer area is cached;
The inter-prediction value of current macro is obtained in the following way:
From the second buffer area read decoded frame the macro block adjacent with current macro the positions d-n bit decoding result into The result of inter-prediction is obtained the inter-prediction value of current macro by row inter-prediction to n bits are moved to left;
Or
The decoding result of the positions the d-n bit of the macro block adjacent with current macro of decoded frame is read from the second buffer area simultaneously To inter-prediction is carried out after moving to left n bits, the inter-prediction value of current macro is obtained.
Preferably, the d is 10, and the n is 2.
Preferably, the reconstructed value of d bits is moved right n bits before filtering, is specifically included:
The reconstructed value of d bits is moved right n bits before filtering, and reconstructed value is limited in 0~2d-n-1Range It is interior.
Preferably, the reconstructed value of filtered d bit is moved right n bits, is specifically included:
The reconstructed value of filtered d bit is moved right n bits after the filtering, and filtered reconstructed value is limited System is 0~2d-n-1In range.
Preferably, the reconstructed value of the d of current macro position bits or d-n bits is filtered, is specifically included:
The reconstructed value of d position bits or d-n bits to current macro carries out deblocking filtering and the compensation of adaptive sampling point.
The present invention also provides a kind of decoders damaging decoding video images, are divided into per frame video image multiple macro Block, the decoder include:
Summation module, it is current macro for being added the residual values of current macro with intra prediction value or inter-prediction value to obtain The reconstructed value of the positions the d bit of block;
First buffer area, the reconstructed value of the positions the d bit for caching the current macro that summation module obtains;
Intra-framed prediction module, for by reading the positions the d bit of decoded adjacent macroblocks in frame from the first buffer area Reconstructed value carries out intra prediction, obtains the intra prediction value of current macro;
Filter module, the reconstructed value for the positions the d-n bit to current macro are filtered, and obtain the solution of d-n bits Code obtains the filtered d bit of current macro as a result, alternatively, be filtered to the reconstructed value of the positions the d bit of current macro Reconstructed value, n are the integer for being less than d more than 1;
Module is limited, for the reconstructed value of the positions the d bit of the current macro n bits that move right to be obtained d-n bits The reconstructed value of the d-n bit is output to filter module by reconstructed value, alternatively, filter module is obtained filtered d ratio Special reconstructed value moves right n bits, obtains the decoding result of d-n bits;
Output module, the decoding result for the positions the d-n bit that output filter module or limit module obtain.
Preferably, further include:
Second buffer area, for caching filter module or limiting the solution for the positions the d-n bit of current macro that module obtains Code result;
Inter prediction module, the inter-prediction value for obtaining current macro in the following way:It is read from the second buffer area The decoding result of the positions the d-n bit of the macro block adjacent with current macro of decoded frame is taken to carry out inter-prediction, by inter-prediction Result obtain the inter-prediction value of current macro to n bits are moved to left, alternatively, from the second buffer area read decoded frame with The decoding result of the positions the d-n bit of the adjacent macro block of current macro and to inter-prediction is carried out after moving to left n bits obtains current The inter-prediction value of macro block.
Preferably, the limit module is specifically used for:
The reconstructed value of the positions the d bit of current macro is moved right n bits, and reconstructed value is limited in 0~2d-n-1Range It is interior, the reconstructed value of d-n bits is obtained, the reconstructed value of the d-n bit is output to filter module, alternatively, mould will be filtered The reconstructed value that block obtains filtered d bit moves right n bits, and reconstructed value is limited in 0~2d-n-1In range, obtain The decoding result of d-n bits.
Preferably, the filter module includes:
Deblocking filtering module, for carrying out deblocking filter for the reconstructed value of d position bits or d-n bits to current macro Wave;
Adaptive sampling point compensating module, for the reconstruction to d position bits or d-n bits after current macro deblocking filtering Value carries out adaptive sampling point compensation.
Using decoder provided by the invention and the method for damaging decoding video images, have the advantages that:
What wherein the prediction of intra blocks was used is original d bits reconstructed value, ensures that decoding is not in big error, and is compared Method originally can provide the PSNR (50DB or so) of better image better quality, it is often more important that be not in colored screen;By It is d-n in exporting the data depth of decoding result, therefore read-write DDR bandwidth can be saved, output result storage can also be saved Hardware resource DDR.
Description of the drawings
Fig. 1 is prior art decoder schematic diagram;
Fig. 2 is the prior art using the decoder schematic diagram for damaging decoding technique;
Fig. 3 is the method flow diagram that decoder of the embodiment of the present invention damages decoding video images;
Fig. 4 is that decoder damages decoding video images process schematic in the embodiment of the present invention 1;
Fig. 5 is that decoder damages decoding video images process schematic in the embodiment of the present invention 2;
Fig. 6 is that decoder damages decoding video images process schematic in the embodiment of the present invention 3;
Fig. 7 a are a kind of decoder architecture figure damaging decoding video images provided in an embodiment of the present invention;
Fig. 7 b another kinds provided in an embodiment of the present invention damage the decoder architecture figure of decoding video images.
Specific implementation mode
Decoder provided by the invention and the method for damaging decoding video images are carried out with reference to the accompanying drawings and examples It is described in more detail.
The present invention provides a kind of method that decoder damages decoding video images, wherein is divided into per frame video image Multiple macro blocks, i.e., when video decodes, decoder is handled as unit of macro block, as shown in figure 3, this method includes:
Step 301, the residual values of current macro are added to obtain the d of current macro with intra prediction value or inter-prediction value The reconstructed value of position bit is simultaneously cached in the first buffer area;Wherein, by reading decoded phase in frame from the first buffer area The reconstructed value of the positions the d bit of adjacent macro block carries out intra prediction, obtains the intra prediction value of current macro;
Existing way may be used in the calculation of the residual values of current macro, is such as carried out to the corresponding code stream of current macro Entropy decoding obtains entropy decoding coefficient, then carries out inverse quantization through inverse quantization module, inverse transformed obtains residual values (d+1).
Current macro residual values are added with intra prediction value or inter-prediction value specifically, there is corresponding mark in code stream, Can accordingly be indicated according in existing code stream, determination be by current macro residual values and intra prediction value or or with interframe it is pre- Measured value is added.
Step 302, the reconstructed value of the positions the d of current macro bit is moved right n bits, obtains the positions d-n of current macro The reconstructed value of bit is filtered the reconstructed value of the d-n bit, alternatively, the reconstructed value of the positions the d bit to current macro It is filtered, the reconstructed value of filtered d bit is moved right n bits, the decoding knot of d-n bits is obtained and export Fruit, n are the integer for being less than d more than 1.
Before filtering the reconstructed value of d bits is moved right n bits, i.e. the reconstructed value by removing d bits It is n minimum, the reconstructed value of d bits is converted to d-n, d-n bit values are filtered later, obtains and exports d-n The decoding result of position bit;Or be filtered the reconstructed value of d bits, the reconstructed value of filtered d bit is moved to right into n Position bit turns the reconstructed value of filtered d bit that is, by removing minimum n of the reconstructed value of filtered d bit D-n are changed to, to obtain and export the decoding result of d-n bits.
Decoder provided in an embodiment of the present invention damages in the method for decoding video images, obtains the d of current macro every time It when the reconstructed value of position bit, can all be cached in the first buffer area, therefore use is original d bits to the prediction of intra blocks Reconstructed value ensures that decoding is not in big error, and can provide the PSNR of better image better quality than original method (50DB or so), it is often more important that be not in colored screen;Since the decoding result of method provided in an embodiment of the present invention output is D-n bits, therefore the data depth for exporting decoding result is d-n, therefore read-write DDR bandwidth can be saved, it can also save Export result storage hardware resource DDR.
Preferably, when carrying out intra prediction, only if it were not for the macro block of image border, the first buffer area has in frame always The reconstructed value of the positions the d bit of decoded adjacent macroblocks, for the macro block of image border, in the first buffer area in uncached frame The reconstructed value of the positions the d bit of decoded adjacent macroblocks then may be used existing way progress intra prediction and obtain current macro d The intra prediction value of bit, I will not elaborate for concrete mode.
The embodiment of the present invention is not construed as limiting the mode of inter-prediction, and existing way progress interframe may be used can also Inter-prediction is carried out using following two preferred embodiment of the present invention.
Preferably, in the embodiment of the present invention, after the decoding result of the positions d-n bit for often obtaining a macro block, by d-n ratios Special decoding result is cached in the second buffer area.
A kind of preferred embodiment for inter-prediction is:The adjacent with current macro of decoded frame is read from the second buffer area Macro block the positions d-n bit decoding result carry out inter-prediction, the result of inter-prediction is obtained currently to n bits are moved to left The inter-prediction value of macro block.
In the embodiment, Inter prediction module carries out inter-prediction using the decoding result of d-n bits, can save The hardware resource that Inter prediction module occupies.
Another preferred embodiment for inter-prediction is:From the second buffer area reading decoded frame and current macro phase The decoding result of the positions the d-n bit of adjacent macro block and to inter-prediction is carried out after moving to left n bits, obtains the interframe of current macro Predicted value.
In the embodiment, Inter prediction module carries out inter-prediction using the decoding result of d bits, although will not save It saves hardware resource but Huaping phenomenon will not be caused.
Preferably, above-mentioned first buffer area is the SRAM inside decoder, and the second buffer area is DDR memories, is not belonging to solve Code device part, but decoder can read and write data therein, and the former speed of decoder accesses is far above access the latter.
Preferably, the d in the embodiment of the present invention is 10, n 2, i.e., damages decoding 10bit sequences using 8bit decoders.
The embodiment of the present invention can before filtering, by the limit module in decoder by the reconstructed value of d bits Move right n bits, can also after the filtering, by the limit module in decoder by the reconstruction of filtered d bit Value moves right n bits.
Go back to that intra reference pixels caused by 10bit are different to ask again in order to which the data before solving turn 8bit from 10bit Topic, the method for the embodiment of the present invention only need 10bit to rebuild the first buffer area SRAM that data deposit intra modules use (method deposit intra SRAM's before is 8bit data), need to only spend more some SRAM spaces of expense, but be the reduction of very much Data transformation operations but bring I frame decoding data and ensure and original identical, and P frame decodings data are due to will unavoidably use ginseng Examining frame data (8bit) predicted value can be slightly different, but is not in influence the big error of viewing, and reconstructed value is still protected 10bit data are deposited, so that this method will not be all different as a large amount of intra blocks reference pixel of the appearance of method before.
The method specific embodiment that inventive decoder damages decoding video images is given below.
Embodiment 1
Decoder damages the procedure schematic diagram of decoding video images in the embodiment of the present invention as shown in Figure 4, main to wrap It includes:
The corresponding code stream elder generation entropy decoding of current macro obtains entropy decoding coefficient, is carried out through the inverse quantization module in decoder anti- Quantization obtains residual values through the inverse transform block progress inverse transformation in decoder;
Obtained residual values are added by the summation module in decoder with the intra prediction value of the macro block or inter-prediction value The reconstructed value of 10 bits is obtained, the reconstructed value of obtain 10 bits is cached in the first buffer area;Wherein, decoder In intra-framed prediction module by from the first buffer area read frame in decoded adjacent macroblocks 10 bits reconstructed value into Row intra prediction obtains intra prediction value, the Inter prediction module in decoder from the second buffer area read decoded frame with work as The decoding results of 8 bits of the adjacent macro block of preceding macro block carries out inter-prediction, by the result of inter-prediction to moving to left 2 bits Obtain the inter-prediction value of current macro;
Limit module in decoder before filtering moves right the reconstructed value of 10 bits 2 bits, by reconstructed value It is limited in (0,28-1) in range, reconstructed value each in this way can be indicated with 8 bits;
Deblocking filtering module in decoder carries out deblocking filtering to 8 bit reconstructed values after limit;
SAO modules in decoder are used to carry out SAO calculating to 8 bit reconstructed values after deblocking filtering, obtain 8 and compare particular solution Code result simultaneously exports, and the decoding result of 8 bits is cached in the second buffer area (reference frame buffer).
Embodiment 2
Decoder damages the procedure schematic diagram of decoding video images in the embodiment of the present invention as shown in Figure 5, main to wrap It includes:
The corresponding code stream elder generation entropy decoding of current macro obtains entropy decoding coefficient, is carried out through the inverse quantization module in decoder anti- Quantization obtains residual values through the inverse transform block progress inverse transformation in decoder;
Obtained residual values are added by the summation module in decoder with the intra prediction value of the macro block or inter-prediction value The reconstructed value of 10 bits is obtained, the reconstructed value of obtain 10 bits is cached in the first buffer area;Wherein, decoder In intra-framed prediction module by from the first buffer area read frame in decoded adjacent macroblocks 10 bits reconstructed value into Row intra prediction obtains inter-prediction value, the Inter prediction module in decoder from the second buffer area read decoded frame with work as The decoding results of 8 bits of the adjacent macro block of preceding macro block carries out inter-prediction, by the result of inter-prediction to moving to left 2 bits Obtain the inter-prediction value of current macro;
10 bit reconstructed values of deblocking filtering module pair in decoder carry out deblocking filtering;
SAO in decoder is used to carry out SAO calculating to 10 bit reconstructed values after deblocking filtering;
Limit module in decoder moves right the reconstructed value of 10 bits 2 bits after SAO calculating, will rebuild Value is limited in (0,28-1) in range, reconstructed value each in this way can be indicated with 8 bits;
It obtains 8 bit decoding results and exports, and by the decoding result of 8 bits in the second buffer area (reference frame Buffer it) is cached.
Embodiment 3
Decoder damages the procedure schematic diagram of decoding video images in the embodiment of the present invention as shown in Figure 6, main to wrap It includes:
The corresponding code stream elder generation entropy decoding of current macro obtains entropy decoding coefficient, is carried out through the inverse quantization module in decoder anti- Quantization obtains residual values through the inverse transform block progress inverse transformation in decoder;
Obtained residual values are added by the summation module in decoder with the intra prediction value of the macro block or inter-prediction value The reconstructed value of 10 bits is obtained, the reconstructed value of obtain 10 bits is cached in the first buffer area;Wherein, decoder In intra-framed prediction module by from the first buffer area read frame in decoded adjacent macroblocks 10 bits reconstructed value into Row intra prediction obtains inter-prediction value, the Inter prediction module in decoder from the second buffer area read decoded frame with work as The decoding result of 8 bits of the adjacent macro block of preceding macro block and to inter-prediction is carried out after moving to left 2 bits, obtains current macro Inter-prediction value;
10 bit reconstructed values of deblocking filtering module pair in decoder carry out deblocking filtering;
SAO in decoder is used to carry out SAO calculating to 10 bit reconstructed values after deblocking filtering;
Limit module in decoder moves right the reconstructed value of 10 bits 2 bits after SAO calculating, will rebuild Value is limited in (0,28-1) in range, reconstructed value each in this way can be indicated with 8 bits;
It obtains 8 bit decoding results and exports, and by the decoding result of 8 bits in the second buffer area (reference frame Buffer it) is cached.
In above-mentioned decoding process provided by the invention, what the prediction of intra blocks was used is original 10bit reconstructed values, ensures solution Code is not in big error, and the PSNR (50DB or so) of better image better quality can be provided than original method, heavier Want be not in colored screen.
This method equally can utilization and extention in h.264, can equally bring and preferably regard closer to original 10bit is decoded Feel effect.
This method, which is not only suitable for software, can also use hardware realization.
The present invention also provides a kind of decoders damaging decoding video images, are divided into per frame video image multiple macro Block, as shown in Fig. 7 a, Fig. 7 b, which includes:
Summation module 701, for being added to obtain by the residual values of current macro with intra prediction value or with inter-prediction value The reconstructed value of the positions the d bit of current macro;
First buffer area 702, the reconstructed value of the positions the d bit for caching the current macro that summation module obtains;
Intra-framed prediction module 703, for the positions the d bit by reading decoded adjacent macroblocks in frame from the first buffer area Reconstructed value carry out intra prediction, obtain the intra prediction value of current macro;
Filter module 704, as shown in Figure 7a, the reconstructed value for the positions the d-n bit to current macro are filtered, and are obtained The decoding result of d-n bits, alternatively, as shown in Figure 7b, being filtered, obtaining to the reconstructed value of the positions the d bit of current macro The reconstructed value of the filtered d bit of current macro, n are the integer for being less than d more than 1;
Module 705 is limited, as shown in Figure 7a, for obtaining the reconstructed value of the positions the d bit of the current macro n bits that move right To the reconstructed value of d-n bits, the reconstructed value of the d-n bit is output to filter module, alternatively, as shown in Figure 7b, it will The reconstructed value that filter module obtains filtered d bit moves right n bits, obtains the decoding result of d-n bits;
Output module 706, the decoding result for the positions the d-n bit that output filter module or limit module obtain.
Preferably, which further includes:
Second buffer area 707, for caching filter module or limiting the decoding for the positions the d-n bit of macro block that module obtains As a result;
Inter prediction module 708, the inter-prediction value for obtaining current macro in the following way:From the second buffer area The decoding result for reading the positions the d-n bit of the macro block adjacent with current macro of decoded frame carries out inter-prediction, and interframe is pre- The result of survey obtains the inter-prediction value of current macro to n bits are moved to left, alternatively, reading decoded frame from the second buffer area The decoding result of the positions the d-n bit of the macro block adjacent with current macro and to inter-prediction is carried out after moving to left n bits, is worked as The inter-prediction value of preceding macro block.
Preferably, the limit module is specifically used for:
The reconstructed value of the positions the d bit of current macro is moved right n bits, and reconstructed value is limited in 0~2d-n-1Range It is interior, the reconstructed value of d-n bits is obtained, the reconstructed value of the d-n bit is output to filter module, alternatively, mould will be filtered The reconstructed value that block obtains filtered d bit moves right n bits, and reconstructed value is limited in 0~2d-n-1In range, obtain The decoding result of d-n bits.
Preferably, the filter module includes:
Deblocking filtering module, for carrying out deblocking filter for the reconstructed value of d position bits or d-n bits to current macro Wave;
Adaptive sampling point compensating module, for the reconstruction to d position bits or d-n bits after current macro deblocking filtering Value carries out adaptive sampling point compensation.
Further, which can also include inverse quantization module, the inverse transform block etc. in existing decoder, each mould Block concrete function no longer repeats here.
The present invention be with reference to according to the method for the embodiment of the present invention, the flow of equipment (system) and computer program product Figure and/or block diagram describe.It should be understood that can be realized by computer program instructions every first-class in flowchart and/or the block diagram The combination of flow and/or box in journey and/or box and flowchart and/or the block diagram.These computer programs can be provided Instruct the processor of all-purpose computer, special purpose computer, Embedded Processor or other programmable data processing devices to produce A raw machine so that the instruction executed by computer or the processor of other programmable data processing devices is generated for real The device for the function of being specified in present one flow of flow chart or one box of multiple flows and/or block diagram or multiple boxes.
These computer program instructions, which may also be stored in, can guide computer or other programmable data processing devices with spy Determine in the computer-readable memory that mode works so that instruction generation stored in the computer readable memory includes referring to Enable the manufacture of device, the command device realize in one flow of flow chart or multiple flows and/or one box of block diagram or The function of being specified in multiple boxes.
These computer program instructions also can be loaded onto a computer or other programmable data processing device so that count Series of operation steps are executed on calculation machine or other programmable devices to generate computer implemented processing, in computer or The instruction executed on other programmable devices is provided for realizing in one flow of flow chart or multiple flows and/or block diagram one The step of function of being specified in a box or multiple boxes.
Although preferred embodiments of the present invention have been described, it is created once a person skilled in the art knows basic Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as It selects embodiment and falls into all change and modification of the scope of the invention.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art God and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies Within, then the present invention is also intended to include these modifications and variations.

Claims (10)

1. a kind of method damaging decoding video images, wherein be divided into multiple macro blocks per frame video image, feature exists In this method includes:
The residual values of current macro are added with intra prediction value or inter-prediction value to obtain the reconstruction of the positions the d bit of current macro Value is simultaneously cached in the first buffer area;Wherein, pass through the positions the d ratio of the decoded adjacent macroblocks out of the first buffer area reading frame Special reconstructed value carries out intra prediction, obtains the intra prediction value of current macro;
The reconstructed value of the positions the d bit of current macro is moved right n bits, the reconstructed value of the positions the d-n bit of current macro is obtained, The reconstructed value of the d-n bit is filtered, alternatively, being filtered to the reconstructed value of the positions the d bit of current macro, will be filtered The reconstructed value of the positions d bit after wave moves right n bits, obtains and export the decoding result of d-n bits, and n is to be less than more than 1 The integer of d.
2. the method as described in claim 1, which is characterized in that further include:
After the decoding result of the positions d-n bit for often obtaining a macro block, by the decoding result of the d-n bit in the second caching Area is cached;
The inter-prediction value of current macro is obtained in the following way:
The decoding result that the positions the d-n bit of the macro block adjacent with current macro of decoded frame is read from the second buffer area carries out frame Between predict, the result of inter-prediction is obtained into the inter-prediction value of current macro to n bits are moved to left;
Or
The decoding result and to the left of the positions the d-n bit of the macro block adjacent with current macro of decoded frame is read from the second buffer area Inter-prediction is carried out after moving n bits, obtains the inter-prediction value of current macro.
3. the method as described in claim 1, which is characterized in that the d is 10, and the n is 2.
4. the method as described in claims 1 to 3 is any, which is characterized in that before filtering to the right by the reconstructed value of d bits N bits are moved, are specifically included:
The reconstructed value of d bits is moved right n bits before filtering, and reconstructed value is limited in 0~2d-n-1In range.
5. the method as described in claims 1 to 3 is any, which is characterized in that the reconstructed value of filtered d bit moves right N bits, specifically include:
The reconstructed value of filtered d bit is moved right n bits after the filtering, and filtered reconstructed value is limited in 0~2d-n-1In range.
6. the method as described in claim 1, which is characterized in that the d position bits of current macro or the reconstructed value of d-n bits It is filtered, specifically includes:
The reconstructed value of d position bits or d-n bits to current macro carries out deblocking filtering and the compensation of adaptive sampling point.
7. a kind of decoder damaging decoding video images is divided into multiple macro blocks, which is characterized in that institute per frame video image Stating decoder includes:
Summation module, for being added to obtain current macro with intra prediction value or inter-prediction value by the residual values of current macro The reconstructed value of d bits;
First buffer area, the reconstructed value of the positions the d bit for caching the current macro that summation module obtains;
Intra-framed prediction module, for the reconstruction by reading the positions the d bit of decoded adjacent macroblocks in frame from the first buffer area Value carries out intra prediction, obtains the intra prediction value of current macro;
Filter module, the reconstructed value for the positions the d-n bit to current macro are filtered, and obtain the decoding knot of d-n bits Fruit obtains the reconstruction of the filtered d bit of current macro alternatively, being filtered to the reconstructed value of the positions the d bit of current macro Value, n are the integer for being less than d more than 1;
Module is limited, for the reconstructed value of the positions the d bit of the current macro n bits that move right to be obtained the reconstruction of d-n bits Value, is output to filter module, alternatively, filter module is obtained filtered d bit by the reconstructed value of the d-n bit Reconstructed value moves right n bits, obtains the decoding result of d-n bits;
Output module, the decoding result for the positions the d-n bit that output filter module or limit module obtain.
8. decoder as claimed in claim 7, which is characterized in that further include:
Second buffer area, for caching filter module or limiting the decoding knot for the positions the d-n bit of current macro that module obtains Fruit;
Inter prediction module, the inter-prediction value for obtaining current macro in the following way:It is read from the second buffer area The decoding result of the positions the d-n bit of the macro block adjacent with current macro of decoding frame carries out inter-prediction, by the knot of inter-prediction Fruit obtains the inter-prediction value of current macro to n bits are moved to left, alternatively, from the second buffer area read decoded frame with it is current The decoding result of the positions the d-n bit of the adjacent macro block of macro block and to inter-prediction is carried out after moving to left n bits, obtains current macro Inter-prediction value.
9. decoder as claimed in claim 7 or 8, which is characterized in that the limit module is specifically used for:
The reconstructed value of the positions the d bit of current macro is moved right n bits, and reconstructed value is limited in 0~2d-n-1In range, obtain To the reconstructed value of d-n bits, the reconstructed value of the d-n bit is output to filter module, alternatively, filter module is obtained The reconstructed value of filtered d bit moves right n bits, and reconstructed value is limited in 0~2d-n-1In range, d-n are obtained The decoding result of bit.
10. decoder as claimed in claim 7 or 8, which is characterized in that the filter module includes:
Deblocking filtering module, the reconstructed value for d position bits or d-n bits to current macro carry out deblocking filtering;
Adaptive sampling point compensating module, for the reconstructed value to d position bits or d-n bits after current macro deblocking filtering into The adaptive sampling point compensation of row.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0059794A2 (en) * 1981-03-06 1982-09-15 International Business Machines Corporation Data processing system
CN102769753A (en) * 2012-08-02 2012-11-07 豪威科技(上海)有限公司 H.264 coder and coding method
CN103141097A (en) * 2010-09-30 2013-06-05 苹果公司 Optimized deblocking filters
US8559512B2 (en) * 2010-05-05 2013-10-15 Ceva D.S.P. Ltd. Device, system, and method for predicting residual data for intra and inter frame encoding of image or video data

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0059794A2 (en) * 1981-03-06 1982-09-15 International Business Machines Corporation Data processing system
US8559512B2 (en) * 2010-05-05 2013-10-15 Ceva D.S.P. Ltd. Device, system, and method for predicting residual data for intra and inter frame encoding of image or video data
CN103141097A (en) * 2010-09-30 2013-06-05 苹果公司 Optimized deblocking filters
CN102769753A (en) * 2012-08-02 2012-11-07 豪威科技(上海)有限公司 H.264 coder and coding method

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