CN105516776A - Automatic signal detection and display method, detection circuit and display terminal - Google Patents
Automatic signal detection and display method, detection circuit and display terminal Download PDFInfo
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- CN105516776A CN105516776A CN201610052977.7A CN201610052977A CN105516776A CN 105516776 A CN105516776 A CN 105516776A CN 201610052977 A CN201610052977 A CN 201610052977A CN 105516776 A CN105516776 A CN 105516776A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
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- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
Abstract
The embodiment of the invention discloses an automatic signal detection and display method, a detection circuit and a display terminal. The method comprises the steps that firstly, switching signals at an HDMI input end, a DVI input end, a VGA input end and an AV input end are detected; secondly, image signals corresponding to one of the HDMI input end, the DVI input end, the VGA input end and the AV input end are selected according to the switching signals and preset priorities; thirdly, the image signals are displayed. According to the technical scheme, the automatic signal detection and display method, the detection circuit and the display terminal solve the problem that manual operation is not convenient in signal source selection.
Description
Technical field
The present invention relates to image display technology field, particularly relate to a kind of automatic signal detection display packing, testing circuit and display terminal.
Background technology
The display terminal product functions such as the LCD monitor of current use are powerful, and possess very abundant signal input port, can compatible display input signal miscellaneous.For a prevailing LCD monitor on the market, its signal input port generally possesses two-way HDMI (High Definition Multimedia Interface) (HighDefinitionMultimediaInterface, HDMI) signal input port, one road Video Graphics Array (VideoGraphicsArray, VGA) signal input port, one tunnel audio frequency and video (AudioVideo, AV) signal input port, one railway digital video interface (DigitalVisualInterface, DVI) signal port etc.But, while bringing powerful compatibility, bring inconvenience also to the use of user.User in use, generally only has a road signal source input, in this case, if user is unfamiliar with the type of input signal, not knows and will select any signal input port.Thus user can only adopt the simplest way, signal source is selected, is attempted one by one, and finally namely the normal display frame of energy is the required signal source passage arranged of user.This measure, gives in operation and brings great trouble.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of automatic signal detection display packing, testing circuit and display terminal, to solve the problem of manual operation inconvenience in signal source selection.
The embodiment of the present invention is by the following technical solutions:
First aspect, the embodiment of the present invention provides a kind of automatic signal detection display packing, comprises the following steps:
A: the switching signal detecting HDMI, DVI, VGA and AV input;
B: according to switching signal, by pre-set priority, selects the picture signal that an input in HDMI, DVI, VGA and AV input is corresponding;
C: display image signals.
Second aspect, the embodiment of the present invention provides a kind of testing circuit, and testing circuit employing model is the chip U11 of TSUMV59XUS, and this testing circuit comprises HDMI testing circuit, DVI testing circuit, VGA testing circuit and an AV testing circuit.
HDMI testing circuit comprises HDMI input connector P4 and P4 is 23pin, resistance R494, R503, R508, R532, diode D112, triode Q35, 92 pin of U11 are connected with one end of R532, the other end of R532, one end of R494, one end of R508, 18 pin of P4 are connected with power output end, the other end of R508, one end of R503 is connected with 117 pin of U11, the other end of R503 is connected with the base stage of Q35, the other end of R494, the collector electrode of Q35 is connected with 19 pin of P4, 19 pin of P4 by D112 with reference to be connected, 1 of P4, 3, 4, 6, 7, 9, 10, 12, 15, 16 pin are correspondence and 127 of U11 respectively, 126, 124, 123, 121, 120, 119, 118, 125, 122 pin connect, 13 of P4, 14 pin are unsettled, the emitter of Q35, all the other pin of P4 all with reference to ground are connected.
DVI testing circuit comprises DVI input connector CN10 and CN10 is 31pin, resistance R128, R130, R505, R67, R489, diode D109, triode Q34, 91 pin of U11 are connected with one end of R489, the other end of R489, one end of R128, one end of R130, one end of R67, 14 pin of CN10 are connected with power output end, the other end of R67, one end of R505 is connected with 128 pin of U11, the other end of R505 is connected with the base stage of Q34, the other end of R128, the collector electrode of Q34 is connected with 16 pin of CN10, 16 pin of CN10 by D109 with reference to be connected, 1 of CN10, 2, 6, 7, 9, 10, 17, 18, 23, 24 pin are correspondence and 9 of U11 respectively, 10, 11, 8, 6, 7, 3, 4, 2, 1 pin connects, 3 of CN10, 11, 15, 19, 22, 30, 31 pin, the other end of R130 and the emitter of Q34 all with reference to ground are connected.
VGA testing circuit comprises VGA input connector P3 and P3 is 17pin, resistance R137, R138, R238, R535, R538, electric capacity C87, C91, C93, C100, C101, C102, C136, diode D7, D8, 107 pin of U11 are connected by 12 pin of R538 and P3, be connected with power output end by R137, 107 pin and D8 and C100 in parallel between reference ground of U11, 108 pin of U11 are connected by 15 pin of R535 and P3, be connected with power output end by R138, 108 pin and D7 and C101 in parallel between reference ground of U11, 1 pin of P3 is connected by 19 pin of C87 and U11, 2 pin of P3 are connected by 16 pin of C91 and U11, 2 pin of P3 are connected by 17 pin of C93 and U11, 3 pin of P3 are connected by 15 pin of C102 and U11, 13 of P3, 14 pin are correspondence and 14 of U11 respectively, 20 pin connect, 18 pin of U11 are connected by one end of C136 and R238, the other end of R238 is connected with reference to ground, 4 of P3, 9, 11 pin are unsettled, all the other pin of P3 all with reference to ground are connected.
One AV testing circuit comprises an AV input connector BNC1 and BNC1 is 4pin, resistance R125, R126, R127, R129, R131, R132, R134, R136, R140, R244, R559, R563, electric capacity C126, C134, C135, C150, C103, C204, C430, diode D37, D131, triode Q17, Q18, 114 pin of U11 are connected by the collector electrode of R127 and Q17, the collector electrode of Q17, one end of R129 is connected with one end of C126, and the emitter of Q17 is connected with one end of R131, the other end of R131, one end of R132, one end of R140, the emitter of Q18, one end of C135 is connected with power output end, the other end of R132, 3 pin of D37, the base stage of Q18 is connected with one end of C150, the other end of R140, the base stage of Q17 is connected with one end of R125, and the collector electrode of Q18 is connected with one end of R136, the other end of C150, one end of R134 and 1 of D37, 2 pin connect, and C134 and R134 is in parallel, and the other end of R134 is connected by 2 pin of R126 and BNC1, and 2 pin of BNC1 pass through R559 successively, 30 pin of C103 and U11 connect, 2 pin and the D131 in parallel between reference ground of BNC1, 32 pin of R563 and C430, U11 are connected by one end of C204 and R244, the other end of R244, the other end of R125, the other end of R129, the other end of R136, the other end of C126, the other end of C135 and 1 of BNC1, 3, 4 pin all with reference to ground are connected, U11 by 92 pin and 117 pin detect HDMI input switching signal, detected by 91 pin and 128 pin DVI input switching signal, to be detected the switching signal of VGA input by 107 pin and 108 pin, detected the switching signal of AV inputs by 114 pin, by pre-set priority, select and export picture signal corresponding to an input in HDMI, DVI, VGA and an AV input.
The third aspect, the embodiment of the present invention provides a kind of display terminal, comprises driving panel, display panels and power panel; Drive panel to be provided with above-mentioned testing circuit, drive panel to be connected with display panels, power panel respectively, display panels is connected with power panel.
In sum, in the technical scheme of the embodiment of the present invention, automatic signal detection display packing comprises step, a: the switching signal detecting HDMI, DVI, VGA and AV input; B: according to switching signal, by pre-set priority, selects the picture signal that an input in HDMI, DVI, VGA and AV input is corresponding; C: display image signals.Testing circuit employing model is the chip U11 of TSUMV59XUS, and testing circuit comprises HDMI testing circuit, DVI testing circuit, VGA testing circuit and an AV testing circuit.Display terminal comprises driving panel, display panels and power panel; Drive panel to be provided with above-mentioned testing circuit, drive panel to be connected with display panels, power panel respectively, display panels is connected with power panel.By automatically detecting switching signal, by pre-set priority, the picture signal selecting input corresponding shows, and by signal source by manually selecting to become automatic selection, makes the operation of user more convenient.
Accompanying drawing explanation
Fig. 1 is the method flow diagram of a kind of automatic signal detection display that the embodiment of the present invention one provides.
Fig. 2 is the method flow diagram of a kind of automatic signal detection display that the embodiment of the present invention two provides.
Fig. 3 a is the master chip part pin connection diagram of a kind of testing circuit that the embodiment of the present invention three provides.
Fig. 3 b is the circuit diagram of the HDMI testing circuit that the embodiment of the present invention three provides.
Fig. 3 c is the circuit diagram of the DVI testing circuit that the embodiment of the present invention three provides.
Fig. 3 d is the circuit diagram of the VGA testing circuit that the embodiment of the present invention three provides.
Fig. 3 e is the circuit diagram of the AV testing circuit that the embodiment of the present invention three provides.
Fig. 4 is the structural representation of a kind of display terminal that the embodiment of the present invention four provides.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the invention is explained in detail.Be understandable that, specific embodiment described herein is only for explaining the present invention, but not limitation of the invention.In addition, for convenience of description, illustrate only part related to the present invention in accompanying drawing but not full content.
Embodiment one
The embodiment of the present invention provides a kind of automatic signal detection display packing.The method can be applied on the display terminal products such as LCD monitor.As shown in Figure 1, the method can comprise the following steps:
S110, detect the switching signal of HDMI, DVI, VGA and AV input.
In the display terminal products such as LCD monitor, the signal type of signal source can comprise HDMI signal, DVI signal, VGA signal and AV signal.In the specific implementation process of this step, can by HDMI testing circuit, DVI testing circuit, the electronic circuits such as VGA testing circuit and AV testing circuit form testing circuit.The input signal of HDMI, DVI, VGA and AV input is detected by this testing circuit; This input signal comprises the data-signals such as picture signal, audio signal, clock signal, synchronizing signal; Also comprise switching signal, switching signal is used for representing that HDMI, DVI, VGA and AV input has no signal to access.In testing circuit, whether switching signal can have signal to access according to the low and high level state representation input of signal, and such as high level represents that input has signal to access, and low level represents that input no signal accesses.When the display terminal products such as LCD monitor switch on power, by testing circuit, automatic scan is carried out to HDMI, DVI, VGA and AV input, when detecting that some inputs have signal to access, such as HDMI input has signal to access, then the master chip that switching signal corresponding for HDMI input can be passed to testing circuit by HDMI testing circuit carries out follow-up signal process.
S120, according to switching signal, by pre-set priority, select the picture signal that an input in HDMI, DVI, VGA and AV input is corresponding.
S130, display image signals.
According to the switching signal that step S110 detects, the master chip of testing circuit by pre-set priority, can select the input signal of an input in the input having signal to access.This pre-set priority can set gradually from high to low as HDMI, DVI, VGA, AV input.It should be noted that, pre-set priority also can set gradually from high to low as HDMI, AV, VGA, DVI input, and the set-up mode of the embodiment of the present invention to pre-set priority is not limited in any way.Exemplary, if when detecting that HDMI and DVI input has signal to access, by the high to Low pre-set priority set gradually as HDMI, DVI, VGA, AV input, the master chip of testing circuit can select the picture signal in the input signal corresponding to HDMI input.This picture signal is exported, and automatically shows by the picture of display terminal by HDMI input, no longer need user manually to select signal source.
In the present embodiment, automatic signal detection display packing comprises step, a: the switching signal detecting HDMI, DVI, VGA and AV input; B: according to switching signal, by pre-set priority, selects the picture signal that an input in HDMI, DVI, VGA and AV input is corresponding; C: display image signals.By automatically detecting switching signal, by pre-set priority, the picture signal selecting input corresponding shows, and by signal source by manually selecting to become automatic selection, makes the operation of user more convenient.
Embodiment two
On the basis of the embodiment of the present invention one, the embodiment of the present invention provides another kind of automatic signal detection display packing.As shown in Figure 2, the method after the step S130 of embodiment one, can repeat step S110, S120 and S130.Carry out cycle detection to go out switching signal, select picture signal and display image signals.In the present embodiment, pre-set priority sets gradually as HDMI, DVI, VGA, AV input from high to low; Wherein, AV input can comprise an AV input and the 2nd AV input, and the pre-set priority of an AV input can be set to the pre-set priority higher than the 2nd AV input.In the present embodiment, being back to step S110 carries out in the process circulated, if when detecting that the input higher than the input priority corresponding to current display frame has signal to access, then press pre-set priority, picture signal corresponding to input high for priority can be exported, to show the picture of the high input of this priority.Exemplary, the picture of the current VGA Display input of display terminal, if cycle detection has signal to access to HDMI input, then the master chip of testing circuit can according to the switching signal of HDMI input, by pre-set priority, select and export picture signal corresponding to HDMI input, by the picture of the display screen display HDMI input of display terminal.
As shown in Figure 2, after step s 130, also following steps can be increased:
S210, acquisition shutdown signal, close the selection to picture signal.
In above-mentioned cyclic process, close the automatic function selecting to signal source by remote controller.After display terminal obtains the shutdown signal of remote controller, even if when detecting that the input higher than the input priority corresponding to current display frame has signal to access, can not step S120 be performed, namely switching is not carried out to the picture signal of input and select.Display terminal can fix the picture showing current input, can not false tripping display remaining input terminal picture.
In the present embodiment, carry out cycle detection switching signal, select picture signal and display image signals, the display that improve display terminal is intelligent; Obtain shutdown signal, close the selection to picture signal, avoid the false tripping display of display terminal.
Embodiment three
The embodiment of the present invention provides a kind of testing circuit, and as shown in Fig. 3 a ~ Fig. 3 e, this testing circuit employing model is the chip U11 of TSUMV59XUS, and this testing circuit comprises HDMI testing circuit, DVI testing circuit, VGA testing circuit and an AV testing circuit.
HDMI testing circuit comprises HDMI input connector P4 and P4 is 23pin, resistance R494, R503, R508, R532, diode D112, triode Q35, 92 pin of U11 are connected with one end of R532, the other end of R532, one end of R494, one end of R508, 18 pin of P4 are connected with power output end, the other end of R508, one end of R503 is connected with 117 pin of U11, the other end of R503 is connected with the base stage of Q35, the other end of R494, the collector electrode of Q35 is connected with 19 pin of P4, 19 pin of P4 by D112 with reference to be connected, 1 of P4, 3, 4, 6, 7, 9, 10, 12, 15, 16 pin are correspondence and 127 of U11 respectively, 126, 124, 123, 121, 120, 119, 118, 125, 122 pin connect, 13 of P4, 14 pin are unsettled, the emitter of Q35, all the other pin of P4 all with reference to ground are connected.Can be this reference signal ground or power supply etc.
DVI testing circuit comprises DVI input connector CN10 and CN10 is 31pin, resistance R128, R130, R505, R67, R489, diode D109, triode Q34, 91 pin of U11 are connected with one end of R489, the other end of R489, one end of R128, one end of R130, one end of R67, 14 pin of CN10 are connected with power output end, the other end of R67, one end of R505 is connected with 128 pin of U11, the other end of R505 is connected with the base stage of Q34, the other end of R128, the collector electrode of Q34 is connected with 16 pin of CN10, 16 pin of CN10 by D109 with reference to be connected, 1 of CN10, 2, 6, 7, 9, 10, 17, 18, 23, 24 pin are correspondence and 9 of U11 respectively, 10, 11, 8, 6, 7, 3, 4, 2, 1 pin connects, 3 of CN10, 11, 15, 19, 22, 30, 31 pin, the other end of R130 and the emitter of Q34 all with reference to ground are connected.
VGA testing circuit comprises VGA input connector P3 and P3 is 17pin, resistance R137, R138, R238, R535, R538, electric capacity C87, C91, C93, C100, C101, C102, C136, diode D7, D8, 107 pin of U11 are connected by 12 pin of R538 and P3, be connected with power output end by R137, 107 pin and D8 and C100 in parallel between reference ground of U11, 108 pin of U11 are connected by 15 pin of R535 and P3, be connected with power output end by R138, 108 pin and D7 and C101 in parallel between reference ground of U11, 1 pin of P3 is connected by 19 pin of C87 and U11, 2 pin of P3 are connected by 16 pin of C91 and U11, 2 pin of P3 are connected by 17 pin of C93 and U11, 3 pin of P3 are connected by 15 pin of C102 and U11, 13 of P3, 14 pin are correspondence and 14 of U11 respectively, 20 pin connect, 18 pin of U11 are connected by one end of C136 and R238, the other end of R238 is connected with reference to ground, 4 of P3, 9, 11 pin are unsettled, all the other pin of P3 all with reference to ground are connected.
One AV testing circuit comprises an AV input connector BNC1 and BNC1 is 4pin, resistance R125, R126, R127, R129, R131, R132, R134, R136, R140, R244, R559, R563, electric capacity C126, C134, C135, C150, C103, C204, C430, diode D37, D131, triode Q17, Q18, 114 pin of U11 are connected by the collector electrode of R127 and Q17, the collector electrode of Q17, one end of R129 is connected with one end of C126, and the emitter of Q17 is connected with one end of R131, the other end of R131, one end of R132, one end of R140, the emitter of Q18, one end of C135 is connected with power output end, the other end of R132, 3 pin of D37, the base stage of Q18 is connected with one end of C150, the other end of R140, the base stage of Q17 is connected with one end of R125, and the collector electrode of Q18 is connected with one end of R136, the other end of C150, one end of R134 and 1 of D37, 2 pin connect, and C134 and R134 is in parallel, and the other end of R134 is connected by 2 pin of R126 and BNC1, and 2 pin of BNC1 pass through R559 successively, 30 pin of C103 and U11 connect, 2 pin and the D131 in parallel between reference ground of BNC1, 32 pin of R563 and C430, U11 are connected by one end of C204 and R244, the other end of R244, the other end of R125, the other end of R129, the other end of R136, the other end of C126, the other end of C135 and 1 of BNC1, 3, 4 pin all with reference to ground are connected.U11 by 92 pin and 117 pin detect HDMI input switching signal, detected by 91 pin and 128 pin DVI input switching signal, to be detected the switching signal of VGA input by 107 pin and 108 pin, detected the switching signal of AV inputs by 114 pin, by pre-set priority, select and export picture signal corresponding to an input in HDMI, DVI, VGA and an AV input.Switching signal is used for representing that HDMI, DVI, VGA and an AV input have no signal to access.In testing circuit, whether switching signal can have signal to access according to the low and high level state representation input of signal.Exemplary, when the switching signal that testing circuit detects input is high level, can represent that this input has signal to access, when the switching signal that testing circuit detects input is low level, can represent that this input does not have signal to access.
Wherein, R136, R535 and R538 is 10 Ω, R559 is 33 Ω, R238 and R244 is 68 Ω, R563 is 75 Ω, R126, R127, R128, R131, R494, R505 and R503 is 1K Ω, R137 is 2.7K Ω, R138 is 4.7K Ω, R67, R129, R140, R489, R508 and R532 is 10K Ω, R130 is 47K Ω, R125, R132 and R134 is 100K Ω, C87, C91, C93, C102, C103, C136 and C204 is 47nF, C100 and C101 is 22pF, C430 is 100pF, C150 is 0.1 μ F, C126 and C135 is 2.2 μ F, C134 is 10 μ F, D109 and D112 is 5V/0.15pF antistatic diode, D7 and D8 is 18V/3pF antistatic diode, D131 is 5V/3pF antistatic diode, the model of D37 is BAT54A, the model of Q34 and Q35 is 3904, the model of Q17 and Q18 is 3906, pre-set priority can set gradually from high to low as HDMI, DVI, VGA, one AV input.When testing circuit switches on power, testing circuit can carry out automatic scan to HDMI, DVI, VGA and an AV input.When detecting that some inputs have signal to access, such as HDMI input has signal to access, then switching signal corresponding for HDMI input can be passed to the master chip U11 of testing circuit by HDMI testing circuit.U11, can by pre-set priority according to this switching signal, selects and the picture signal exporting HDMI input corresponding shows to display terminal.
This testing circuit also comprises the 2nd AV testing circuit, 2nd AV testing circuit comprises the 2nd AV input connector BNC2 and BNC2 is 4pin, resistance R141, R142, R149, R150, R151, R153, R152, R156, R155, R561, R564, electric capacity C151, C152, C153, C167, C64, C431, diode D32, D125, triode Q19, Q20, 110 pin of U11 are connected by the collector electrode of R149 and Q19, the collector electrode of Q19 and one end of R150, one end of C151 connects, the emitter of Q19 is connected with one end of R151, the other end of R151, one end of R153, one end of R155, the emitter of Q20, one end of C153 is connected with power output end, the other end of R153, 3 pin of D32, the base stage of Q20 is connected with one end of C167, the other end of R155, the base stage of Q19 is connected with one end of R141, the collector electrode of Q20 is connected with one end of R156, the other end of C167, one end of R152 and 1 of D32, 2 pin connect, C152 and R152 is in parallel, the other end of R152 is connected by 2 pin of R142 and BNC2, 2 pin of BNC2 pass through R561 successively, 31 pin of C64 and U11 connect, 2 pin and the D125 in parallel between reference ground of BNC2, R564 and C431, the other end of R141, the other end of R150, the other end of R156, the other end of C151, the other end of C153 and 1 of BNC2, 3, 4 pin all with reference to ground are connected.
Wherein, R156 is 10 Ω, R561 is 33 Ω, R564 is 75 Ω, R142, R149 and R151 are 1K Ω, R150 and R155 is 10K Ω, and R141, R152 and R153 are 100K Ω, and C64 is 47nF, C431 is 100pF, C167 is that 0.1 μ F, C151 and C153 are 2.2 μ F, and C152 is 10 μ F, D125 is 5V/3pF antistatic diode, the model of D32 is that the model of BAT54A, Q19 and Q20 is 3906, and the pre-set priority of an AV input can be set to the pre-set priority higher than the 2nd AV input.
It should be noted that the components and parts of above testing circuit and parameter thereof are only the technical program preferred embodiment, the technical program can also select other components and parts and parameter thereof; According to common practise, those skilled in the art, for the application scenarios that the technical program is different, do not need to play creativity, just can adjust components and parts and parameter thereof.
In the present embodiment, testing circuit employing model is the chip U11 of TSUMV59XUS, and testing circuit comprises HDMI testing circuit, DVI testing circuit, VGA testing circuit and an AV testing circuit.U11, by detecting the switching signal of HDMI, DVI, VGA, an AV input, by pre-set priority, to select and the picture signal exporting input corresponding shows, and signal source is become automatic selection by manual selection, makes the operation of user more convenient.
Embodiment four
The embodiment of the present invention provides a kind of display terminal.As shown in Figure 4, this display terminal comprises driving panel 410, display panels 420 and power panel 430; Drive panel 410 to be provided with above-mentioned testing circuit, drive panel 410 to be connected with display panels 420, power panel 430 respectively, display panels 420 is connected with power panel 430.
Wherein, panel 410 is driven to comprise mainboard, keypad, the parts such as keyset.By mainboard, keypad, the parts such as keyset be interconnected and load module box in, form an overall driving panel 410, drive panel 410 for detecting the switching signal of HDMI, DVI, VGA and AV input, by pre-set priority, select and export picture signal corresponding to input to display panels 420.Display panels 420 comprises liquid crystal display screen, and ox horn connects keyset, the parts such as hardboard.Driven by the point of liquid crystal display screen screen mouth to shield line with point to be connected keyset with ox horn and to be connected, hardboard electric wire to be connected keyset with ox horn and to be connected and to proceed in modular cartridge, form an overall display panels 420.The picture signal that display panels 420 exports for display driver panel 410.Power panel 430 drives panel 410 and display panels 420 to provide stable operating voltage for giving.Driving panel 410, display panels 420 and power panel 430 are all adopted drawing and pulling type mode to be connected between any two, form display terminal.The driving panel 410 of display terminal can detect the switching signal of HDMI, DVI, VGA and AV input automatically, by pre-set priority, selects and export picture signal corresponding to input to the display panels 420 of display terminal to show.
In the present embodiment, display terminal comprises driving panel, display panels and power panel; Drive panel to be provided with above-mentioned testing circuit, drive panel to be connected with display panels, power panel respectively, display panels is connected with power panel.Display terminal detects the switching signal of HDMI, DVI, VGA and AV input automatically, by pre-set priority, selecting and the picture signal exporting input corresponding shows, by signal source by manually selecting to become automatic selection, making the operation of user more convenient.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, to those skilled in the art, the present invention can have various change and change in embodiment.All any amendments, equivalent replacement, obvious modification etc. done within spirit of the present invention and principle, all should be included within protection scope of the present invention.
Claims (10)
1. an automatic signal detection display packing, is characterized in that, comprises the following steps:
A: the switching signal detecting HDMI, DVI, VGA and AV input;
B: according to described switching signal, by pre-set priority, selects the picture signal that an input in described HDMI, DVI, VGA and AV input is corresponding;
C: show described picture signal.
2. automatic signal detection display packing as claimed in claim 1, it is characterized in that, described pre-set priority is followed successively by HDMI, DVI, VGA, AV input from high to low.
3. automatic signal detection display packing as claimed in claim 2, it is characterized in that, described AV input comprises an AV input and the 2nd AV input, and the pre-set priority of a described AV input is higher than the pre-set priority of described 2nd AV input.
4. automatic signal detection display packing as claimed in claim 1, is characterized in that, after the described picture signal of described display, comprising:
Repeat step a, b and c.
5. automatic signal detection display packing as claimed in claim 4, is characterized in that, after the described picture signal of described display, also comprise:
Obtain shutdown signal, close the selection to described picture signal.
6. a testing circuit, is characterized in that, described testing circuit employing model is the chip U11 of TSUMV59XUS, and described testing circuit comprises HDMI testing circuit, DVI testing circuit, VGA testing circuit and an AV testing circuit;
Described HDMI testing circuit comprises HDMI input connector P4 and P4 is 23pin, resistance R494, R503, R508, R532, diode D112, triode Q35, 92 pin of U11 are connected with one end of R532, the other end of R532, one end of R494, one end of R508, 18 pin of P4 are connected with power output end, the other end of R508, one end of R503 is connected with 117 pin of U11, the other end of R503 is connected with the base stage of Q35, the other end of R494, the collector electrode of Q35 is connected with 19 pin of P4, 19 pin of P4 by D112 with reference to be connected, 1 of P4, 3, 4, 6, 7, 9, 10, 12, 15, 16 pin are correspondence and 127 of U11 respectively, 126, 124, 123, 121, 120, 119, 118, 125, 122 pin connect, 13 of P4, 14 pin are unsettled, the emitter of Q35, all the other pin of P4 all with reference to ground are connected,
Described DVI testing circuit comprises DVI input connector CN10 and CN10 is 31pin, resistance R128, R130, R505, R67, R489, diode D109, triode Q34, 91 pin of U11 are connected with one end of R489, the other end of R489, one end of R128, one end of R130, one end of R67, 14 pin of CN10 are connected with power output end, the other end of R67, one end of R505 is connected with 128 pin of U11, the other end of R505 is connected with the base stage of Q34, the other end of R128, the collector electrode of Q34 is connected with 16 pin of CN10, 16 pin of CN10 by D109 with reference to be connected, 1 of CN10, 2, 6, 7, 9, 10, 17, 18, 23, 24 pin are correspondence and 9 of U11 respectively, 10, 11, 8, 6, 7, 3, 4, 2, 1 pin connects, 3 of CN10, 11, 15, 19, 22, 30, 31 pin, the other end of R130 and the emitter of Q34 all with reference to ground are connected,
Described VGA testing circuit comprises VGA input connector P3 and P3 is 17pin, resistance R137, R138, R238, R535, R538, electric capacity C87, C91, C93, C100, C101, C102, C136, diode D7, D8, 107 pin of U11 are connected by 12 pin of R538 and P3, be connected with power output end by R137, 107 pin and D8 and C100 in parallel between reference ground of U11, 108 pin of U11 are connected by 15 pin of R535 and P3, be connected with power output end by R138, 108 pin and D7 and C101 in parallel between reference ground of U11, 1 pin of P3 is connected by 19 pin of C87 and U11, 2 pin of P3 are connected by 16 pin of C91 and U11, 2 pin of P3 are connected by 17 pin of C93 and U11, 3 pin of P3 are connected by 15 pin of C102 and U11, 13 of P3, 14 pin are correspondence and 14 of U11 respectively, 20 pin connect, 18 pin of U11 are connected by one end of C136 and R238, the other end of R238 is connected with reference to ground, 4 of P3, 9, 11 pin are unsettled, all the other pin of P3 all with reference to ground are connected,
A described AV testing circuit comprises an AV input connector BNC1 and BNC1 is 4pin, resistance R125, R126, R127, R129, R131, R132, R134, R136, R140, R244, R559, R563, electric capacity C126, C134, C135, C150, C103, C204, C430, diode D37, D131, triode Q17, Q18, 114 pin of U11 are connected by the collector electrode of R127 and Q17, the collector electrode of Q17, one end of R129 is connected with one end of C126, and the emitter of Q17 is connected with one end of R131, the other end of R131, one end of R132, one end of R140, the emitter of Q18, one end of C135 is connected with power output end, the other end of R132, 3 pin of D37, the base stage of Q18 is connected with one end of C150, the other end of R140, the base stage of Q17 is connected with one end of R125, and the collector electrode of Q18 is connected with one end of R136, the other end of C150, one end of R134 and 1 of D37, 2 pin connect, and C134 and R134 is in parallel, and the other end of R134 is connected by 2 pin of R126 and BNC1, and 2 pin of BNC1 pass through R559 successively, 30 pin of C103 and U11 connect, 2 pin and the D131 in parallel between reference ground of BNC1, 32 pin of R563 and C430, U11 are connected by one end of C204 and R244, the other end of R244, the other end of R125, the other end of R129, the other end of R136, the other end of C126, the other end of C135 and 1 of BNC1, 3, 4 pin all with reference to ground are connected, U11 by 92 pin and 117 pin detect HDMI input switching signal, detected by 91 pin and 128 pin DVI input switching signal, to be detected the switching signal of VGA input by 107 pin and 108 pin, detected the switching signal of AV inputs by 114 pin, by pre-set priority, select and export picture signal corresponding to an input in described HDMI, DVI, VGA and an AV input.
7. testing circuit as claimed in claim 6, is characterized in that, described R136, R535 and R538 is 10 Ω, and R559 is that 33 Ω, R238 and R244 are 68 Ω, and R563 is 75 Ω, R126, R127, R128, R131, R494, R505 and R503 is 1K Ω, and R137 is 2.7K Ω, R138 is 4.7K Ω, R67, R129, R140, R489, R508 and R532 is 10K Ω, and R130 is 47K Ω, R125, R132 and R134 is 100K Ω, C87, C91, C93, C102, C103, C136 and C204 is 47nF, C100 and C101 is 22pF, and C430 is 100pF, C150 is 0.1 μ F, C126 and C135 is 2.2 μ F, and C134 is that 10 μ F, D109 and D112 are 5V/0.15pF antistatic diode, D7 and D8 is 18V/3pF antistatic diode, D131 is 5V/3pF antistatic diode, and the model of D37 is that the model of BAT54A, Q34 and Q35 is 3904, the model of Q17 and Q18 is 3906, and described pre-set priority is followed successively by HDMI from high to low, DVI, VGA, one AV input.
8. testing circuit as claimed in claim 6, it is characterized in that, described testing circuit also comprises the 2nd AV testing circuit, described 2nd AV testing circuit comprises the 2nd AV input connector BNC2 and BNC2 is 4pin, resistance R141, R142, R149, R150, R151, R153, R152, R156, R155, R561, R564, electric capacity C151, C152, C153, C167, C64, C431, diode D32, D125, triode Q19, Q20, 110 pin of U11 are connected by the collector electrode of R149 and Q19, the collector electrode of Q19 and one end of R150, one end of C151 connects, the emitter of Q19 is connected with one end of R151, the other end of R151, one end of R153, one end of R155, the emitter of Q20, one end of C153 is connected with power output end, the other end of R153, 3 pin of D32, the base stage of Q20 is connected with one end of C167, the other end of R155, the base stage of Q19 is connected with one end of R141, the collector electrode of Q20 is connected with one end of R156, the other end of C167, one end of R152 and 1 of D32, 2 pin connect, C152 and R152 is in parallel, the other end of R152 is connected by 2 pin of R142 and BNC2, 2 pin of BNC2 pass through R561 successively, 31 pin of C64 and U11 connect, 2 pin and the D125 in parallel between reference ground of BNC2, R564 and C431, the other end of R141, the other end of R150, the other end of R156, the other end of C151, the other end of C153 and 1 of BNC2, 3, 4 pin all with reference to ground are connected.
9. testing circuit as claimed in claim 8, it is characterized in that, described R156 is 10 Ω, R561 is 33 Ω, R564 is 75 Ω, R142, R149 and R151 is 1K Ω, R150 and R155 is 10K Ω, R141, R152 and R153 is 100K Ω, C64 is 47nF, C431 is 100pF, C167 is 0.1 μ F, C151 and C153 is 2.2 μ F, C152 is 10 μ F, D125 is 5V/3pF antistatic diode, the model of D32 is BAT54A, the model of Q19 and Q20 is 3906, the pre-set priority of a described AV input is higher than the pre-set priority of described 2nd AV input.
10. a display terminal, is characterized in that, comprises driving panel, display panels and power panel; Described driving panel is provided with the testing circuit described in any one of claim 6 ~ 9, and described driving panel is connected with described display panels, described power panel respectively, and described display panels is connected with described power panel.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105810032A (en) * | 2016-05-27 | 2016-07-27 | 山东力明科技职业学院 | Teaching equipment intelligent control device and application thereof |
| CN105931589A (en) * | 2016-04-25 | 2016-09-07 | 京东方科技集团股份有限公司 | Signal source detection device and method, and display device |
| CN112087583A (en) * | 2020-09-16 | 2020-12-15 | 深圳Tcl新技术有限公司 | Display method, display device, multimedia equipment and storage medium |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040078342A (en) * | 2003-03-04 | 2004-09-10 | 현대 이미지퀘스트(주) | Method and apparatus for display input mode by automatically detecting input devices |
| CN101309354A (en) * | 2008-06-24 | 2008-11-19 | 四川长虹电器股份有限公司 | Channel automatic switch system and method of display equipment signal source |
| CN103685984A (en) * | 2013-12-30 | 2014-03-26 | 天津三星电子有限公司 | Video signal source automatic switching method and television |
| CN103747369A (en) * | 2013-11-27 | 2014-04-23 | 乐视致新电子科技（天津）有限公司 | Intelligent household control method and apparatus, and intelligent household system |
| CN205336471U (en) * | 2016-01-26 | 2016-06-22 | 深圳市维冠视界科技股份有限公司 | Detection circuitry and display terminal |
-
2016
- 2016-01-26 CN CN201610052977.7A patent/CN105516776B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040078342A (en) * | 2003-03-04 | 2004-09-10 | 현대 이미지퀘스트(주) | Method and apparatus for display input mode by automatically detecting input devices |
| CN101309354A (en) * | 2008-06-24 | 2008-11-19 | 四川长虹电器股份有限公司 | Channel automatic switch system and method of display equipment signal source |
| CN103747369A (en) * | 2013-11-27 | 2014-04-23 | 乐视致新电子科技（天津）有限公司 | Intelligent household control method and apparatus, and intelligent household system |
| CN103685984A (en) * | 2013-12-30 | 2014-03-26 | 天津三星电子有限公司 | Video signal source automatic switching method and television |
| CN205336471U (en) * | 2016-01-26 | 2016-06-22 | 深圳市维冠视界科技股份有限公司 | Detection circuitry and display terminal |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105931589A (en) * | 2016-04-25 | 2016-09-07 | 京东方科技集团股份有限公司 | Signal source detection device and method, and display device |
| WO2017185570A1 (en) * | 2016-04-25 | 2017-11-02 | Boe Technology Group Co., Ltd. | Signal source detection and selection system, electronic system having the same, and method of detecting and selecting a signal source for a display apparatus |
| US10255877B2 (en) | 2016-04-25 | 2019-04-09 | Boe Technology Group Co., Ltd. | Signal source detection and selection system, electronic system having the same, and method of detecting and selecting a signal source for a display apparatus |
| CN105810032A (en) * | 2016-05-27 | 2016-07-27 | 山东力明科技职业学院 | Teaching equipment intelligent control device and application thereof |
| CN112087583A (en) * | 2020-09-16 | 2020-12-15 | 深圳Tcl新技术有限公司 | Display method, display device, multimedia equipment and storage medium |
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|---|---|
| CN105516776B (en) | 2018-12-18 |
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Address after: 518000 3 / F, building A8 and building A9, silicon valley power intelligent terminal Industrial Park, No. 20, Dafu Industrial Zone, Aobei community, Guanlan street, Longhua District, Shenzhen City, Guangdong Province Patentee after: SHENZHEN WEIGUAN VIEWS TECHNOLOGY Co.,Ltd. Address before: Building A8, silicon valley power intelligent terminal Industrial Park, No. 20, Dafu Industrial Zone, Aobei community, Guanlan street, Longhua New District, Shenzhen, Guangdong 518000 Patentee before: SHENZHEN WEIGUAN VIEWS TECHNOLOGY Co.,Ltd. |