CN1055094A - The method and apparatus of calibrated electronic timing circuit - Google Patents
The method and apparatus of calibrated electronic timing circuit Download PDFInfo
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- CN1055094A CN1055094A CN 90101284 CN90101284A CN1055094A CN 1055094 A CN1055094 A CN 1055094A CN 90101284 CN90101284 CN 90101284 CN 90101284 A CN90101284 A CN 90101284A CN 1055094 A CN1055094 A CN 1055094A
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Abstract
The present invention relates to the method and apparatus of calibrated electronic timing circuit, can be used for calibrating the timing circuit of delayed exploding explosive.Wherein timing circuit is applied in one or more accurate calibration pulses, thereby to the output of variable-frequency oscillator counting, and will export and the benchmark be scheduled to compares.Result relatively produces an error signal, and this error signal is used for changing the voltage of variable-frequency oscillator again, and makes the frequency of oscillator more approach the frequency of being scheduled to.
Description
The present invention is relevant with the calibration of an electronic timing circuit in general particularly relevant with the application of constant time lag circuit through calibration of delayed exploding explosive
When the applying electronic timing circuit, consider economically with volume on reason, often be necessary to adopt a kind of cheap timing oscillator.Yet, timing circuit prerequisite precision than the precision height of cheap oscillator.Like this, just must take some measures, by utilizing more accurate timing base to calibrate this oscillator.This benchmark can be used to calibrate a large amount of low accuracy oscillator repeatedly.
Need adopt this calibration especially aspect the electronics ignition.In the blast process, importantly effectively utilize the explosion energy of explosive, so that under the condition of the explosive of specified rate, stone as much as possible is burst into desired size.In addition, reduce the peak-to-peak value amplitude of the earth shock that caused by blast and frequency and make blast influence minimum to what near building produced, it is important also to become day by day.For reaching the main method that this purpose takes is that a plurality of blast devices of placing selectively in certain boundary of works area are carried out time fire.These demolition points were ignited with the time interval of a weak point.Spaced apart this way has been utilized the energy of explosive preferably and stone is burst during with ignition, has also reduced the peak amplitude of earth shock simultaneously.When the time that postpones to ignite is accurately controlled, just can obtain best result.Yet under the necessary again appropriate situation of price, it is very difficult reaching such precision when explosive is only used once and widely applied.
Previous electricity and hangfire detonator and circuit non-electricity have been developed.Non-electric installation is typically based on duration of ignition of firework mixture.Yet accurately caused a series of restriction to it such duration of ignition.This accuracy limitations can not obtain the best ignition time.
People have proposed many electric initiation device circuit so that pyrotechnical has higher precision.Representative sort circuit sees following United States Patent (USP):
The patent No. is 4,674,047, and name is called " integrated delay circuit and firing console "; The patent No. is 3,851,589, and name is called " electronic delay trigger "; The patent No. is 4,136,617, and name is called " electronic delay trigger "; People's such as Kirby the patent No. is 4,324,182, and name is called " with the predetermined apparatus and method that trigger a plurality of electronic loads correlation time selectively "; The patent No. is 4,445,435, and name is called " electronic delay detonation circuit "; The patent No. is 4,395,950, and name is called " electronic delay detonation circuit "; The patent No. is 4,328,751, and name is called " electronic delay detonation circuit "; The patent No. is 4,145,970, and name is called " electric detonator "; The patent No. is 4,136,617, and name is called " electronic delay trigger "; The patent No. is 4,095,527, and name is called " special detonator ignition circuit "; The patent No. is 4,730,558, and name is called " electronic delay blast initiation device "; The patent No. is 4,712,477, and name is called " electronic delay trigger "; The patent No. is 4,646,640, and name is called " process and the device by the time interval ignition that are used for the electronic explosive igniter "; The patent No. is 4,623,779, and name is called " timing device of detonator "; The patent No. is 4,632,031, and name is called " programmable electronic delay detonator "; The patent No. is 4,601,243, and name is called " method and apparatus that electronics is ignited blast igniting primer "; The patent No. is 4,586,437, and name is called " electronic delay trigger "; The patent No. is 4,487,125, and name is called " timing circuit "; The patent No. is 4,454,815, and name is called " but electric detonator of overprogram "; The patent No. is 3,851,589, and name is called " electronic delay trigger "; The patent No. is 3,646,371, and name is called " the integrated timer that has permanent memory "; And the patent No. is 3,500,746, and name is called " armament systems that have electronic delay detonator ".
The subject matter that applying electronic delayed exploding device is run into is the precision of the timing mechanism that exists of delay circuit self (clock signal, RC time constant, or the like), adopts local oscillator can be subjected to many constraints in delay circuit.This oscillator can also change its frequency because of pressure changes, and pressure variation meeting is experienced when a demolition point receives that another demolition point is ignited formed pressure wave.In addition, the fluctuation of ambient temperature, humidity and air pressure also can cause the change of oscillator frequency.
This shows that it is crucial finding the method for the local oscillator in a kind of calibration timing circuit (igniting the circuit that adopts in the delay circuit as electronics), so that, can also guarantee to ignite the precision of time-delay reliably, at a low price, simultaneously fast.
The method of most preferred embodiment of the present invention is that the signal frequency that the timing circuit that adopts independent timing base produces is calibrated.The first step of calibration is to give timing circuit with the calibration pulse that obtains from the timing base circuit, and a variable-frequency oscillator is arranged in the timing circuit, and the oscillator output frequency in the oscillator is determined by added control signal.Output to oscillator during calibration pulse is counted, so that produce a rate signal, the cycle of the output signal that produces during this signal and the calibration pulse is proportional.Next rate signal that produces and the reference signal of being scheduled to are compared, thereby produce an error signal.Size according to error signal changes control signal, thereby produce a new control signal, it makes oscillator produce the output signal with new frequency, the timing value relevant with time reference that the previous output signal frequency of this frequency ratio more approaches to be scheduled to.
In another embodiment of the present invention, adopted above-mentioned timing circuit in the delayed exploding circuit of flare system, this flare system has a plurality of this circuit that are connected to the central control unit that comprises time reference.Each oscillator in the delayed exploding circuit adopts the said method calibration.The count signal of will delaying time is then delivered to each independent delayed exploding circuit, when when control unit obtains ignition order, each delay circuit all begins the output counting to its calibrated local oscillator, becomes predetermined relationship until the time-delay count signal that reaches and before received.When reaching this predetermined relationship (such as a kind of comparison), each delay circuit produces ignition signal, and it is detonated the explosive element relevant with delay circuit.
In order more completely to understand the present invention and advantage thereof, described below in conjunction with accompanying drawing, in the accompanying drawing:
Fig. 1 is the block diagram of a flare system of expression, and this system has a control unit that is connected to a plurality of triggers;
Fig. 2 is the calcspar of a delayed exploding circuit of the present invention;
Fig. 3 is the sketch map of an embodiment of simulative generator/correcting circuit shown in Figure 2;
Fig. 4 is the sequential chart to the commutator pulse of timing pulse generator shown in Figure 3;
Fig. 5 is the calcspar of a digitized embodiment of oscillator/correcting circuit shown in Figure 2;
Fig. 6 is the oscillogram to the signal of timing pulse generator shown in Figure 5;
Fig. 7 is the calcspar of instruction decoder shown in Figure 2;
Fig. 8 is the sketch map of an embodiment of delay counter shown in Figure 2;
Fig. 9 is the oscillogram with the timing signal of method demonstration of the present invention;
Figure 10 represents data command of the present invention and calibration pulse;
Sequential between the sampling count value that Figure 11 obtains after representing calibration pulse and reducing oscillator frequency.
The disclosed technology that timing circuit is calibrated can have this timing circuit of many-sided application to adopt a kind of calibration steps of uniqueness, make price comparison is cheap, structure is compact local oscillator after calibration, compare with more accurate timing base, have high relatively precision.A concrete application of the present invention is that timing circuit is used for delayed exploding circuit as the part of flare system.With reference to Fig. 1, it shows a total block diagram of this system.12 1 the stable crystal oscillators 15 of control unit that adopted flare system 10 of the present invention to comprise to have display 14 and keyboard 16 have two lead-in wires 18 as a part of control unit 12 of control unit 12, and are attached to the input of detonation circuit 20,22 and 24.In fact, detonation circuit that can also be again that several are such and be attached to double lead 18.
In brief, in operating process, the operator by keyboard 16 to control unit 12 input instructions, to determine the time of delay of each trigger (for example 20,22 and 24).To each trigger can be independent is set a specific time of delay.Control unit 12 can send a calibration pulse or a plurality of calibration pulse to each trigger circuit simultaneously, to calibrate the local oscillator in each circuit.After calibration, the operator sends a sign on to each trigger circuit, and the time started postpones, and next is the explosive of igniting self.Accompanying drawing below the following reference is done more detailed description to the present invention.
The detailed diagram of most preferred embodiment of the present invention is shown in Fig. 2.Trigger circuit 32 links to each other with lead-in wire 18 as shown in Figure 1.Lead-in wire 18 links to each other with a bridge rectifier 34, and the output node of this rectifier is 36 and 38.34 pairs of input signals of rectifier carry out rectification, for trigger provides the power supply of required polarity and 18 separates fully with lead-in wire.Node 36 links to each other with voltage regulator 40, and it provides first and second voltages through adjusting, so that energy-storage travelling wave tube 42 (preferably capacitor) is charged.Second voltage regulator 44 links to each other with energy-storage travelling wave tube 42 and partly provides supply voltage through regulating for the logic of the integrated circuit of trigger circuit 32, energy-storage travelling wave tube 42 also links to each other with firing switch 46, next this switch links to each other with resistive blasting fuse 48 again, and it is an explosive.In blast igniting primer was used, blasting fuse 48 was near detonating agent, and detonating agent is ignited by blasting fuse, then is directed at gunpowder explosion.
The input signal that the connected mode of node 36 also provides double lead 18 is passed to Manchester (Manchester) decoder 54, and it 18 passes the signal come and carry out demodulation going between, to be produced as the used instruction and data of detonation circuit 32.Be that Che Site decoder 54 is the circuit that use in digital communication usually.The director data that decoder 54 produces reaches instruction decoder 58 decoders 54 by lead 56 and also isolates a clock signal from the data that double lead 18 is introduced, and this clock signal reaches instruction decoder 58 by lead 60.Instruction decoder 58 is described with reference to Fig. 7.
Instruction decoder 58 produces a plurality of control signals.An oscillator correction instruction is passed to oscillator/correcting circuit 64 by lead 62.The output node 36 of bridge rectifier 34 also links to each other with the input of circuit 64.
Instruction decoder 58 produces a firing command signal, and it reaches delay counter 68 by lead 66.The clock output of circuit 64 reaches the input of delay counter 68 through lead 70.Delay counter 68 produces an ignition signal, and it reaches switch 46 by lead 72.Instruction decoder produces one and prepares burst command, and it reaches voltage regulator 40 through lead 75.When receiving this instruction, voltage regulator 40 improves its output voltage, and more electric charge is stored up among energy-storage travelling wave tube 42.
Instruction decoder 58 also reaches delay counter 68 with a time-delay count signal through lead 74.The time-delay count signal that receives is a number, and these data are from control unit 12 and through double lead 18.
Trigger circuit 32 also comprises an identification code memory 80, and it links to each other by lead 82 and instruction decoders 58.Identification code memory 80 generally is a programmable read-only memory (prom), and its storage all is unique address for each specific trigger circuit 32.
The course of work of trigger circuit 32 is once now briefly described.Circuit 32 comprises a regularly part, and it is calibrated the local oscillator in the circuit 64.Below its course of work is made a more detailed description.Trigger circuit 32 is not only received electric energy but also is received instruction by double lead 18, instruction generally transmits in the pulse code modulated mode, when instruction does not also have when double lead 18 is transmitted, there is a DC level, it obtains after by bridge rectifier 38 rectifications, and is used for storing the energy among the energy-storage travelling wave tube 42.Yet the present invention is not limited to the direct current working method, and alternating current can provide electric energy and information to trigger circuit 32 too.Though pulse code modulated is the best mode of communication, other mechanics of communication can adopt too, such as frequency modulation, frequency shift keying, amplitude modulation or phase modulation.When double lead 18 with after control unit 12 is communicated with a period of time, the capacitor in the energy-storage units 42 can be filled with certain voltage, such as 10 volts, is in what is called " pre-preparation blast state ".Voltage regulator 44 is reduced to about 5 volts with this voltage, for the remainder of trigger circuit 32 provides electric energy.In the later step that causes igniting.Current potential on the double lead 18 will increase, so that the capacitor in the energy-storage units 42 is charged to about 20 volts, everything all is to take place receiving behind the 75 preparation burst commands that send that go between.
Trigger circuit 32 comprises that also a voltage improves reseting generator 84, and it links to each other with the output of voltage regulator 44.The purpose of this circuit is to produce a voltage to improve reset instruction on lead 86, and this instruction offers instruction decoding device 58 and delay counter 68.When voltage regulation once raises and is reached for when making the acceptable value that circuit 32 can work, this circuit just produces reset instruction.To point out that below this instruction is arranged on the different piece of circuit under the initial condition that needs.
When receiving one when preparing burst command by double lead 18 from control unit 12, voltage regulator 40 makes the capacitor in the energy-storage units 42 charge to about 20 volts.When ignition signal is produced by delay counter 68 at last, firing switch 46 will be connected, and energy-storage units 42 and blasting fuse 48 are linked together.There are enough energy to go to light a fuse 48 and next ignite contiguous explosive in the energy-storage units 42.
Be sent to oscillator/correcting circuit 64 by one or more calibration pulses that control unit 12 is sent through double lead 18 and finish timing alignment of the present invention.This calibrating signal makes that by the forward position that accurate reference element (such as the crystal oscillator 15 that places control unit 12) produces calibration pulse this signal of output signal of local oscillator generation of circuit 64 is earlier measured, and being corrected its method again will be described below.Control unit 12 also transmits a time-delay count signal by double lead 18, and it arrives instruction decoder 58 by manchester decoder device 54.Then, this count signal offers delay counter 68 by decoder 58.When receiving the firing command that control unit 12 sends, the clock output signal that instruction decoder sends the oscillator in delay counter 68 receiving circuits 64, and this output signal compares with the time-delay count signal of having stored, and until reaching a kind of predetermined relation, generally is equal.When reaching this predetermined relationship, produce ignition signal and reach firing switch 46 through lead 72.Such as noted above, this makes that blasting fuse 48 is ignited.
The analog circuit embodiment of oscillator/correcting circuit 64 as shown in Figure 3, and digital circuit embodiment is as shown in Figure 5.Referring now to Fig. 3 analog circuit embodiment is described.Receive calibration pulse, warp 62 reception oscillators/correction instruction with door 90 through lead 36.Be connected to the input of counter 92 with the output of door 90, the output of counter 92 links to each other with D/A 94.The simulation output of transducer 94 is connected to the inverting input of differential amplifier 96.The in-phase input end of differential amplifier 96 links to each other with pedestal generator 98.The output of differential amplifier 96 is connected to sampling and synchronous circuit 100 through lead 97.An input of summing amplifier 102 is delivered in the output of sampling and synchronous circuit 100, and its another input links to each other with the output of sampling with synchronous circuit 104.The output of amplifier 102 links to each other with the input of sampling with synchronous circuit 104.Sampling is also carried the control input end of swinging device 106 with voltage control with the output of synchronous circuit 104 and is linked to each other.The signal frequency of oscillator 106 outputs can be handed over, and transmits by lead 70.The output of oscillator 106 is square-wave signal preferably, but is not a necessary condition for purposes of the invention
Oscillator/correcting circuit 64 also comprises a timing pulse generator 108, it receives the clock signal that transmits from lead 70, also receive the calibration pulse that transfers from lead 36, calibration pulse is started working generator 108, and the working condition of timing pulse generator is further illustrated with reference to Fig. 4.As shown in Figure 4, the clock signal of input is the one-period signal.The back edge of calibration pulse is started working generator 108.When receive this pulse back along the time, it produces as shown in Figure 4 timing signal A, B, C and D.These timing signals A, B, C and D transmit signal A by lead 110,112,114 and 116 respectively and deliver to D/A 94 through lead 110, make it that once conversion take place.Signal B delivers to sampling and synchronous circuit 100 through lead 112, makes its output sampling to differential amplifier 96.Signal C delivers to sampling and synchronous circuit 104 through lead 114, equally its input signal is taken a sample.Signal D makes counter 92 zero clearings through lead 116.The effect of signal A, B, C and D is to make by the unlike signal of the each several part circuit in the circuit 64 to discharge shape preface successively.
Referring now to Fig. 3 and Fig. 9 the working condition of circuit 64 is described in detail.Fig. 9 not only represents the output of oscillator 106, and the expression calibration pulse.
When receiving the oscillator that the instruction decoder 58 that transmits through lead 62 sends/correction instruction, open with door 90 with door 90.This correction instruction is shown among Fig. 8 and through lead 62 and transmits.Calibration pulse is also delivered to and door 90 as input signal.Equally, the output of oscillator 106 is also delivered to and door 90 as input signal.A nethermost waveform is the output waveform with door among Fig. 9.Like this, calibration pulse be high potential during, be the output of voltage-controlled oscillator 106 with the output of door 90.Deliver to counter 92 with the output signal of door 90, it is counted and preserves the pulse that oscillator 106 produces.The number of being counted is given D/A 94, when it receives a-signal by lead 110, just produces a corresponding aanalogvoltage.The reference voltage that this aanalogvoltage of transducer 94 outputs and generator 98 produce is delivered to differential amplifier 96 simultaneously.The difference of two input signals of amplifier 96 is error signals, and it passes to sampling and synchronous circuit 100 through lead 97.When sampling and synchronous circuit 100 are received the B signal that the generator 108 that transmits through lead 12 sends, just started by sequence.The output signal of sampling and synchronous circuit 100 is delivered to first input of summing amplifier 102.This signal with the sampling and synchronous circuit 104 in by synchronous control signal addition.Please note: this control signal is the input signal of voltage-controlled oscillator 106, and this control signal has determined the output frequency of oscillator 106 just.When the control signal addition of error signal and front, just produced a new control signal, its is reached sampling and synchronous circuit 104.Then, this new control signal is input to voltage-controlled oscillator 106, so that produce an output signal with new frequency.The purpose of this circuit is to produce a new frequency, and this frequency is compared more approaching predetermined timing relationship with the frequency that precision oscillator 15 in the control unit 12 produces.This process can repeat repeatedly, so that the output of calibration voltage control generator 106 more accurately.Purpose is that to make error signal on the lead 97 be zero, and at this moment, the output frequency of voltage-controlled oscillator 106 is a value that is calibrated basically.The frequency that finally obtains is the function of the reference voltage that produces with the calibration pulse of door 90 inputs and generator 98.The frequency that produces when oscillator 106 is desired frequency, and the reference voltage that generator 98 produces should equal the voltage that transducer 94 produces.
The digital circuit embodiment of oscillator/correcting circuit 64 shown in Figure 2 sees Fig. 5.Circuit 64 comprises that have three inputs and a door 130.First input end connects is calibration pulse on the lead 36.The oscillator correction instruction that the instruction decoder 58 that the reception of second input is come through lead 62 biographies sends.The 3rd input termination be clock signal on the lead 70.Described when not only receiving calibration pulse but also receive the oscillator correction instruction with reference to Fig. 9 with the working condition of door 130, one group of clock pulse that lead 70 transmits is passed through and door 130, arrives the input end of clock of counter 132.The number that the pulse of receiving between alignment epoch is counted is stored among the counter 132, the A input of subtractor unit 136 is delivered in this step-by-step counting through lead 134, the B input of subtractor unit 136 links to each other with reference count register 138, and this register provides a reference count to unit 136.Subtractor unit 136 produces an error count, and it is the difference of the counting of A, B input, is B-A in the present embodiment.This error count is sent to the A input of adder unit 142 through lead 140.The output of adder unit 142 is control countings, and it is transferred into the input of a delay time register 148.Control is counted the process delay time register and is returned the B input of adder unit 142 through lead 144.Lead 144 also links to each other with the input of D/A 146.D/A 146 produces a control signal, and this control signal is sent to the voltage-controlled oscillator 160 that produces a clock output on lead 70.
Do detailed description referring now to Fig. 5,6 and 9 pairs of trigger circuit 64.The purpose of this circuit is to make the frequency of oscillator 160 compare into a kind of predetermined relation with calibration pulse 36, and calibration pulse 36 is to be produced by the crystal oscillator in the control unit 12 15.For example, the operating frequency of the crystal oscillator in the control unit 12 can be 10MHz.This crystal oscillator has very high stability, and the order of magnitude is 10
-10The calibration pulse that transmits through lead 36 for example can have 1/10 in 1 second time
6Second precision, or error ± 1 millisecond.The clock signal decision that the cycle of calibration pulse and precision are produced by oscillator 15.In addition, in most preferred embodiment, voltage-controlled oscillator 160 can produce the output signal that frequency is 100KHz.Like this, exist 100: 1 timing relationship between the frequency of the voltage to frequency control generator 160 of crystal oscillator 15.In the ideal case, the output signal frequency that oscillator 160 produces just in time is 100KHz, and precision is 1/10
6Yet, in actual applications, can not produce and have so high-precision oscillator 160.In most cases, frequency change may reach 10～20%, and this depends on the factor of many variations, as manufacturing tolerance, temperature, humidity and pressure, or the like.Yet importantly oscillator 160 has a short time stability of (being approximately 10 seconds), and precision is 1/10
6In this most preferred embodiment, timing relationship predetermined between time reference source (oscillator 15) and the voltage-controlled oscillator 160 is 100: 1.Yet the method according to this invention equally also can adopt other relation to calibrate.Actual frequency and relation depend primarily on the precision that required time postpones.The present invention will reach a kind of like this target, that is: maximum delay time is 10 seconds, and time of delay, error was 10 milliseconds, that is to say that precision is 1/10
6
In the course of the work, calibration pulse is sent to and door 130 through lead 36, and instruction decoder 58 is received a calibration command before this, so that the beginning calibration process.Decoder 58 produces the oscillator correction instruction on lead 62.It makes with door 130 and opens.When receiving oscillator correction instruction and calibration pulse, the output of voltage-controlled oscillator 160 is through arriving counter 132 with door 130.As a result, counter is counted the pulse of being sent by oscillator 160 in a period of time that occurs in calibration pulse.If voltage-controlled oscillator 160 is operated under the accurate preset frequency, just produces this counting of desirable counting so during this period and be stored in the reference count register 138.This reference count in subtractor unit 136 with lead 134 on step-by-step counting compare.Error count should be zero if the operating frequency of oscillator 160 is very accurate.Yet in fact this error count has certain value.The size of error count depends on the bias of voltage-controlled oscillator frequency and its optimum frequency.Error count on the lead 140 is sent to the A input of unit 142.Be stored in the current control counting in the delay time register 148, be sent to the B input of unit 142 through lead 144.When receiving the clock signal B that timing pulse generator 162 sends, error signal on the lead 140 and the addition of previous control counting produce a new control signal, and this new control signal is passed to delay time register 148.When receiving time sequential pulse D, D/A carries out another conversion to the counting of input, produces a control signal, and this signal is sent to voltage-controlled oscillator 160.When non-vanishing, this new control signal changes the frequency of oscillator 160 if error count has certain numerical value.
The output frequency that process described above (promptly just under the situation of single calibration pulse) can make voltage-controlled oscillator 160 is near desired frequency, as long as fully individual counter and register have enough sizes to go to handle the side-play amount of maximum possible.Yet, for more economical operational mode, be that used element is few, smaller, may make oscillator 160 reach final desired calibration, and make the approaching desired frequency of output frequency of oscillator 160 by the calibration pulse sequence is provided through lead 36.When receiving other calibration pulse, its course of work is same as described above.
Also may need a plurality of calibration pulses,,, can utilize a plurality of calibration pulses to go to obtain final desired oscillator precision with being inaccurate even each circuit all has enough amplifying powers because know the gain in whole loop.This process is shown in Figure 11.During first calibration pulse 200, measuring oscillator 160 produces 100,100 pulses and proofreaies and correct.Trimming process has changed the frequency of oscillator, so that during second calibration pulse 202, produce 100,010 pulses.Carry out trimming process again.Like this, after through calibration, near desired frequency 100,000Hz.Must be pointed out that pulse 200,202 is the same with time of 204, but the frequency of oscillator 160 changes.Concrete hereto example, loop gain is approximately 0.9.The ifs circuit gain is 1.0, so just might proofread and correct with a calibration pulse, as long as individual count device, register and arithmetic operation unit can be handled the size and the error count of counting.
Instruction decoder 58 sees for details in Fig. 7.Data-signal on the lead 56 is delivered to the data input pin of serial shift register 220.This shift register has two sections.First section is identification code position section, and second section is command code position section.The output of identification code position section is sent to identification code comparator 224 through lead 222.The output of command code position section is sent to instruction decoder 228 through lead 226, and identification code memory 80 provides identification code concerning a specific detonation circuit, and this identification code is delivered to second input of identification code comparator 224 through lead 82.Data on the lead 56 are also delivered to the data input pin of second serial shift register 230.
Clock signal on the lead 60 is sent to the first input end with door 232, also be sent to the input end of clock of delivering to serial shift register 220 with door 234 the first input end and the output of door 232 simultaneously, and deliver to the input end of clock of serial shift register 230 with the output of door 234.D type flip flop 236 its termination that resets become the voltage that imports into from lead 86 improve reset instruction receives voltage signal VDD trigger 236 at its D end one-output terminal through lead 240 with link to each other with another input of door 234." 0 " output of trigger 236 through lead 238 with link to each other with another input of door 232.
Serial shift register 230 has a full output signal, and it sends " S " input of trigger 236 to through lead 242.In the present embodiment, the time-delay counting always has one first, and it is configured to a kind of state, and when all the time-delay counting was received, it was by the full output output from serial shift register.
One group of output that not only receives instruction decoder with door 250,252,254 and 256, and receive the output of identification code comparator, thus producing various instructions, these instructions are instructions that instruction decoder 58 sends.The output signal of identification code comparator is delivered to each and a door input of 250～256.This makes instruction decoder have only the identification code that is fit to when receiving just output can be arranged.When receiving suitable instruction in the decoder 228, just produce one and output signal to and door 250, should on lead 62, produce an oscillator correction instruction again with door.Next instruction appear at door 252 second input on, make it on lead 66, produce a firing command.Next instruction produces a high potential and is sent to second input with door 254 again, makes it produce a preparation burst command on lead 75.Decoder 228 also sends an instruction, makes with door 256 and produce an output order on lead 258.This instruction is named and is stored the instruction of time-delay counting, and it is sent to the input end of clock of trigger 236.
Working condition referring now to Fig. 7 declarative instruction decoder 58.When receiving voltage raising reset instruction, the one-output terminal of trigger 236 is an electronegative potential, closes and door 232, and " 0 " output is a high potential, opens and door 234.Like this, data only enter serial shift register 220 and can not enter serial shift register 230 during the clock signal on receiving lead 60.But can be in high potential state when storing the instruction of time-delay counting on the lead 258 and make the output of trigger 236 change to change thus and the closing and open mode of door 232 and 234 when receiving.
Like this, when receiving an indication will receive the instruction of time-delay counting the time, next data can enter shift register 230, because at this moment trigger is received a clock signal.Then, the time-delay counting is stored among the shift register 230 and through lead 74 and sends delay counter 68 to.When register 230 had a full output, trigger 236 returned its initial condition.
Be shown among Figure 10 through decoded instruction data and calibration pulse sequence.
Describe delay counter in detail below with reference to Fig. 8.The input end of clock of d type flip flop 270 is delivered in firing command on the lead 66.Voltage on the lead 68 improves the RESET input that trigger 270 is delivered in reset instruction.The D input termination voltage VDD of trigger 270.The one-output terminal of trigger 270 connects and door 272 first input end, and the clock signal sent here through lead 70 of voltage-controlled oscillator 160 is supplied with second input with door 272.Deliver to the input end of clock of counter 274 with the output of door 272.
Count the B input of delivering to comparator 276 through lead 74 from the time-delay that instruction decoder 58 transmits.The output of counter 274 is connected to the A input of comparator 276.When two numbers on A, the B input satisfied comparison condition, comparator 276 produced ignition signal on lead 72.
Referring to Fig. 8, voltage on the lead 86 improves the known condition of initial condition that reset instruction is provided with trigger 270 number.When receive through lead 66 control unit 12 that provide, during from the firing command that obtains through decoded instruction, the state of trigger 270 changes, and makes with door 272 to open the clock output of reception oscillator 160.This clock output is through delivering to counter 274 with door 272.Counting in the counter 274 is supplied with the A input of comparator 276, and compares with the time-delay counting of receiving earlier, deliver to the B input of comparator 276 through lead 74.When satisfying the comparison condition of two countings, comparator 276 produces an ignition signal, and this signal is connected switch 46 through lead 72, and switch sends the energy in the energy-storage units 42 to blasting fuse 48 again, and blasting fuse is ignited.
In a word, what the present invention relates to is the method and apparatus of calibrated electronic timing circuit, and wherein timing circuit is applied in one or more accurate calibration pulses, thereby to the output of variable-frequency oscillator counting, and will export and the benchmark be scheduled to compares.Result relatively produces an error signal, and this error signal is used for changing the voltage of variable-frequency oscillator again, and makes the frequency of oscillator more approach the frequency of being scheduled to.
Though the several embodiments of the present invention of having drawn in the accompanying drawings also are described in detail this in front, but should understand, the present invention is not limited to disclosed embodiment, can also rearrange, revise and replace them, but all not break away from category of the present invention.
Claims (12)
1. one kind is carried out Calibration Method by the signal frequency that adopts timing base independently, timing circuit is produced, and it is characterized in that may further comprise the steps:
A calibration pulse that obtains from above-mentioned timing base is sent to above-mentioned timing circuit,
Output to the variable-frequency oscillator in the above-mentioned timing circuit during above-mentioned calibration pulse is counted, thereby produces one first counting, and wherein the output signal frequency of above-mentioned oscillator is determined by the control counting of supplying with it,
Above-mentioned first counting is compared with the reference count of being scheduled to, thereby produce an error count, and
Change above-mentioned control counting according to ratio with above-mentioned error count, thereby produce a new control counting, it makes the output signal of above-mentioned oscillator have a new frequency, the scheduled timing relationship of the more approaching and above-mentioned timing base of the previous output signal frequency of this frequency ratio.
2. one kind is carried out Calibration Method by the signal frequency that adopts timing base independently, timing circuit is produced, and it is characterized in that may further comprise the steps:
A calibration pulse that obtains from above-mentioned timing base is sent to above-mentioned timing circuit,
Produce a proportional rate signal of output umber of pulse that produces with above-mentioned oscillator during above-mentioned calibration pulse, wherein the output signal frequency of above-mentioned oscillator is determined by the control signal of supplying with it,
Above-mentioned rate signal and the reference signal of being scheduled to are compared, thereby produce an error signal, and
Change above-mentioned control signal according to ratio with above-mentioned error signal, thereby produce a new control signal, it makes the output signal of above-mentioned oscillator have a new frequency, the scheduled timing relationship of the more approaching and above-mentioned timing base of the previous output signal frequency of this frequency ratio.
3. a kind of signal frequency that timing circuit is produced described in the claim 2 is carried out Calibration Method, and wherein above-mentioned rate signal, reference signal and control signal are digital signals.
4. a kind of signal frequency that timing circuit is produced described in the claim 2 is carried out Calibration Method, and wherein above-mentioned rate signal, reference signal and control signal are analog signals.
5. one kind is carried out Calibration Method by the signal frequency that adopts timing base independently, timing circuit is produced, and it is characterized in that may further comprise the steps:
A calibration pulse that obtains from above-mentioned timing base is sent to above-mentioned timing circuit,
Produce a proportional rate signal of output umber of pulse that produces with above-mentioned oscillator during above-mentioned calibration pulse, wherein the output signal frequency of above-mentioned oscillator is determined by the control signal of supplying with it,
Above-mentioned rate signal and the reference signal of being scheduled to are compared, thereby produce an error signal,
Change above-mentioned control signal according to the ratio with above-mentioned error signal, thereby produce a new control signal, it makes the output signal of above-mentioned oscillator have a new frequency, and
Repeat steps such as above-mentioned transmission, generation, comparison and change, thereby produce above-mentioned new frequency sequence, it is to close with the scheduled timing relationship of above-mentioned timing base.
6. a kind of signal frequency that timing circuit is produced described in the claim 5 is carried out Calibration Method, and wherein above-mentioned rate signal, reference signal and control signal are digital signals.
7. a kind of signal frequency that timing circuit is produced described in the claim 5 is carried out Calibration Method, and wherein above-mentioned rate signal, reference signal and control signal are analog signals.
8. method of operation that is used to comprise the time delay flare system with time delay detonation circuit that a plurality of and inner control unit that timing base arranged joins is characterized in that may further comprise the steps:
Transmit a calibration pulse that obtains from above-mentioned timing base from above-mentioned control unit simultaneously to a plurality of above-mentioned time delay detonation circuits,
In above-mentioned each delayed exploding circuit, during above-mentioned calibration pulse, produce a proportional rate signal of output umber of pulse that produces with above-mentioned oscillator, wherein the output signal frequency of above-mentioned oscillator is determined by the control signal of supplying with it,
In each delay circuit, above-mentioned rate signal and the reference signal of being scheduled to are compared, thereby produce an error signal,
In each delay circuit, change above-mentioned control signal according to ratio with above-mentioned error signal, thereby produce a new control signal, it makes the output signal of above-mentioned oscillator have a new frequency, the scheduled timing relationship of the more approaching and above-mentioned timing base of the previous output signal frequency of this frequency ratio
To send each above-mentioned delay circuit respectively to from the time delay counting that above-mentioned control unit obtains,
After transmitting above-mentioned calibration pulse, transmit from a next commencing signal of above-mentioned control unit to above-mentioned delayed exploding circuit simultaneously,
In each delay circuit, the output of corresponding oscillator generation and the predetermined relationship of above-mentioned time delay counting are compared, when satisfying above-mentioned predetermined relationship, produce an ignition signal,
In each delay circuit,, ignite corresponding explosive according to the ignition signal that produces in each delay circuit.
9. a kind of method of operation described in the claim 8, above-mentioned steps wherein, as transmit a calibration pulse, produce a speed pulse and change above-mentioned control signal, repeat, thereby produce above-mentioned output signal sequence, the frequency of this signal is to close with the scheduled timing relationship of above-mentioned timing base.
10. its frequency be is characterized in that comprising by the timing circuit of timing base calibration independently:
Variable-frequency oscillator with control signal input, this control signal determines the output signal frequency of above-mentioned oscillator,
Connect and to be used for providing a control signal memory of above-mentioned control signal to above-mentioned oscillator,
A reference signal memory,
An accumulator, be used to be stored in one selected during in produce one the proportional rate signal of output umber of pulse with above-mentioned oscillator,
A difference channel that links to each other with accumulator with the said reference signal storage is used for producing a proportional difference signal of the difference with said reference signal and rate signal, and
A summing circuit that links to each other with difference channel with above-mentioned control signal memory is used for above-mentioned error signal and control signal addition, thereby produces a new control signal, replaces the previous control signal that is stored in the above-mentioned control signal memory.
11. a kind of timing circuit described in the claim 10, wherein the variable oscillator of said frequencies comprises a D/A that is connected between above-mentioned control signal memory and the voltage-controlled oscillator.
12. the delayed exploding circuit of a detonation of explosives after preset time postpones is characterized in that comprising:
An energy-storage travelling wave tube that links to each other with the input of above-mentioned timing circuit,
The switch that above-mentioned energy-storage travelling wave tube is linked to each other with above-mentioned explosive,
A connection is used for receiving the time-delay counting memory of counting by the time-delay of above-mentioned input, the above-mentioned time delay of wherein above-mentioned time-delay counting decision,
Variable-frequency oscillator with control signal input, this control signal determines the output signal frequency of above-mentioned oscillator,
Connect and to be used for providing a control signal memory of above-mentioned control signal to above-mentioned oscillator,
A reference signal memory,
An accumulator, be used to be stored in one selected during in produce one the proportional rate signal of output umber of pulse with above-mentioned oscillator,
A difference channel that links to each other with accumulator with the said reference signal storage is used for producing a proportional difference signal of the difference with said reference signal and rate signal,
A summing circuit that links to each other with difference channel with above-mentioned control signal memory is used for above-mentioned error signal and control signal addition, thereby produces a new control signal, replaces the previous control signal that is stored in the above-mentioned control signal memory, and
A comparator is used for the output and the above-mentioned time-delay counting of above-mentioned oscillator are compared, when satisfying concerning of being scheduled to, produce an ignition signal, this ignition signal makes above-mentioned switch motion, and above-mentioned energy stored and above-mentioned explosive are connected, and ignites above-mentioned explosive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 90101284 CN1055094A (en) | 1990-03-10 | 1990-03-10 | The method and apparatus of calibrated electronic timing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 90101284 CN1055094A (en) | 1990-03-10 | 1990-03-10 | The method and apparatus of calibrated electronic timing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1055094A true CN1055094A (en) | 1991-10-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 90101284 Pending CN1055094A (en) | 1990-03-10 | 1990-03-10 | The method and apparatus of calibrated electronic timing circuit |
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| Country | Link |
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| CN (1) | CN1055094A (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101729067B (en) * | 2008-10-22 | 2012-10-24 | 财团法人工业技术研究院 | Calibration device and method thereof for pipelined analog-to-digital converter |
| CN103292647A (en) * | 2012-02-23 | 2013-09-11 | 无锡力芯微电子股份有限公司 | Clock calibration method of electronic detonator control circuit and electronic initiation system |
| CN103868416A (en) * | 2012-12-18 | 2014-06-18 | 北京全安密灵科技股份公司 | Method for correcting original oscillation frequency clock of chip |
| CN103955257B (en) * | 2014-03-27 | 2017-08-08 | 美的集团股份有限公司 | Calibration method and device, the air-conditioner control system of single-chip system clock |
| CN109976139A (en) * | 2017-12-27 | 2019-07-05 | 精工爱普生株式会社 | The control method of electronic watch and electronic watch |
| CN110411293A (en) * | 2019-08-27 | 2019-11-05 | 广西中爆电子科技有限公司 | The extension time calibration circuit and electric detonator of anti-high and low-temp for electric detonator |
| CN111928743A (en) * | 2020-08-11 | 2020-11-13 | 上海赞芯电子科技有限公司 | Time delay calibration method for electronic fuse |
| CN111947528A (en) * | 2020-08-07 | 2020-11-17 | 上海芯跳科技有限公司 | Clock rapid self-correcting method for electronic detonator |
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- 1990-03-10 CN CN 90101284 patent/CN1055094A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101729067B (en) * | 2008-10-22 | 2012-10-24 | 财团法人工业技术研究院 | Calibration device and method thereof for pipelined analog-to-digital converter |
| CN103292647A (en) * | 2012-02-23 | 2013-09-11 | 无锡力芯微电子股份有限公司 | Clock calibration method of electronic detonator control circuit and electronic initiation system |
| CN103292647B (en) * | 2012-02-23 | 2015-05-27 | 无锡力芯微电子股份有限公司 | Clock calibration method of electronic detonator control circuit and electronic initiation system |
| CN103868416A (en) * | 2012-12-18 | 2014-06-18 | 北京全安密灵科技股份公司 | Method for correcting original oscillation frequency clock of chip |
| CN103868416B (en) * | 2012-12-18 | 2015-09-16 | 北京全安密灵科技股份公司 | A kind of method that the original frequency of oscillation clock of chip is corrected |
| CN103955257B (en) * | 2014-03-27 | 2017-08-08 | 美的集团股份有限公司 | Calibration method and device, the air-conditioner control system of single-chip system clock |
| CN109976139A (en) * | 2017-12-27 | 2019-07-05 | 精工爱普生株式会社 | The control method of electronic watch and electronic watch |
| CN110411293A (en) * | 2019-08-27 | 2019-11-05 | 广西中爆电子科技有限公司 | The extension time calibration circuit and electric detonator of anti-high and low-temp for electric detonator |
| CN110411293B (en) * | 2019-08-27 | 2021-07-13 | 广西中爆电子科技有限公司 | High and low temperature resistant delay time calibration circuit for electronic detonator and electronic detonator |
| CN111947528A (en) * | 2020-08-07 | 2020-11-17 | 上海芯跳科技有限公司 | Clock rapid self-correcting method for electronic detonator |
| CN111947528B (en) * | 2020-08-07 | 2022-09-30 | 上海芯跳科技有限公司 | Clock rapid self-correcting method for electronic detonator |
| CN111928743A (en) * | 2020-08-11 | 2020-11-13 | 上海赞芯电子科技有限公司 | Time delay calibration method for electronic fuse |
| CN111928743B (en) * | 2020-08-11 | 2022-04-29 | 上海赞芯电子科技有限公司 | Time delay calibration method for electronic fuse |
| CN113033022A (en) * | 2021-04-22 | 2021-06-25 | 杭州国芯科技股份有限公司 | Delay compensation method of field bus network |
| CN113033022B (en) * | 2021-04-22 | 2022-06-17 | 杭州国芯科技股份有限公司 | Delay compensation method of field bus network |
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