CN105487958B - Processor internal act monitoring method - Google Patents
Processor internal act monitoring method Download PDFInfo
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- CN105487958B CN105487958B CN201510830351.XA CN201510830351A CN105487958B CN 105487958 B CN105487958 B CN 105487958B CN 201510830351 A CN201510830351 A CN 201510830351A CN 105487958 B CN105487958 B CN 105487958B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3024—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
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Abstract
The invention provides a kind of processor internal act monitoring method, including：Perform reservation recovery processing of the processor for performance event counter；Wherein, in processor process scheduling and handoff procedure, before operating system layer switches over process, the content of processor performance counter is retained using software mode and dump, complete to reset completion to performance counter register in processor and then recover the content of above-mentioned counter；Operation support processor performance event counter retains the operating system for recovering processing；Realize the performance count monitoring of the single performance event of processor；Realize the performance count monitoring of processor batch performance event.
Description
Technical field
The present invention relates to field of computer technology, and in particular to a kind of processor internal act monitoring side of accurate metering
Method.
Background technology
With the increasingly increase of the scale and complexity of integrated circuit, processor design becomes increasingly complex, function is more more
Sample, the test and validation work difficulty of processor is increasing, the also more and more higher of the requirement to test case.In order to improve place
The quality of device test case is managed, and test checking personnel need the quality of test case to be assessed using various means, to surveying
Examination effect is fed back and analyzed, and further instructs writing for test case.Intel series processors are support performance prison at present
Survey, there is provided performance monitoring counter PMC (performance monitoring counters), user can pass through read-write
IO (input and output) registers pass through RPMC (Remote Performance Monitoring and Control, long distance
From performance monitoring and control) mode of instruction obtains the value of performance counter, obtain the note performance that tester or user are closed
The statistical conditions of event.
Intel series processors etc. support user to obtain performance event (performance by way of setting PMC
Event), means are provided for user and the further snoop transactions device behavior of tester.Derivative based on PMC is a lot,
Such as related processor performance monitoring device of performance etc. is accessed in the monitoring L2Cache for being placed in L2 cache external members, this
A little devices are capable of the frequency of accurate measurements performance event, but more or less add hardware spending；These other works
Tool is much all based on some performance event exploitations paid close attention to, restricted application.
The content of the invention
The technical problems to be solved by the invention are for drawbacks described above in the prior art be present, there is provided a kind of accurate metering
Processor internal act monitoring method, it can be real in a manner of using software completely in the case of existing hardware resource
The monitoring of existing performance event, the PMC count values of all properties event are provided for user and tester.
According to the present invention, there is provided a kind of processor internal act monitoring method, including：
First step：Perform reservation recovery processing of the processor for performance event counter；Wherein, in processor process
In scheduling and handoff procedure, before operating system layer switches over process, using software mode to processor performance counter
Content retained and dump, complete to reset performance counter register in processor and complete and then recover above-mentioned meter
The content of number device；
Second step：Operation support processor performance event counter retains the operating system for recovering processing；
Third step：Realize the performance count monitoring of the single performance event of processor；
Four steps：Realize the performance count monitoring of processor batch performance event.
Preferably, described processor internal act monitoring method also includes：5th step, according to third step and the 4th
Performance event count results in step, analyze count results.
Preferably, the performance count monitoring process of single performance event includes：
First single performance event sub-step：Selected particular characteristic event is monitored, and concurrently sets performance event monitoring
Total time；
Second single performance event sub-step：Determine that the result log file designation of the performance count of the performance event is former
Then；
3rd single performance event sub-step：The monitoring process of the performance event is opened, startability counter is to property
The count value of energy event is counted, and starts to continue timing；
4th single performance event sub-step：Run processor test case set；
5th single performance event sub-step：The count value of performance event is obtained, while by count value with certain fixed grating
Formula is updated to specified journal file in the form of additional；
6th single performance event sub-step：Judge whether the timing time of performance event monitoring has arrived, if timing
It has been arrived that, then the behavior of termination performance event counter counts；If timing is not arrived, after process dormancy specified time, redirect
Continued to run with to the 5th single performance event sub-step.
Preferably, the performance count monitoring process of batch performance event includes：
First batch performance event sub-step：Multiple performance events are enumerated according to predetermined format；
Second batch performance event sub-step：Target CPU check figure is determined, and the different IPs for being tied to target CPU are set
The order of the heart；
3rd batch performance event sub-step：Acquisition can use core cpu quantity, while judge performance event sum with always may be used
With the relation between CPU core number, and perform following processing：
Without performance count if total available CPU core number is less than performance event sum, the 4th bulk what one is particularly good at is gone to
Part sub-step；
If always available CPU core number exceedes the prearranged multiple of performance event sum, prearranged multiple above is taken in performance
The available CPU core number of total number of events carries out performance counting statistics, and jumps to the 5th batch performance event sub-step and continue to transport
OK；
If always available CPU core number selects between the prearranged multiple of performance event sum and performance event sum
Select always available CPU core number and carry out performance count, hereafter jump to the 5th batch performance event sub-step and continue to run with；
4th batch performance event sub-step：Judge whether the maximum of the performance event number of single performance counter is big
In available CPU core number, stop monitoring if obtaining judging certainly, otherwise according to traversal different processor performance counter
Mode, by the different performance event binding inside same performance counter to different processor core；
5th batch performance event sub-step：In the way of searching loop performance event list, performance event is bound
To the core cpu of selection, the 6th batch performance event sub-step is then performed；
6th batch performance event sub-step：The relation between performance event and the specific core numberings of CPU is determined, is pressed afterwards
Deploy the performance of batch processing device performance event according to the mode of the performance count monitoring process of the single performance event of third step
Count monitoring.
Preferably, the prearranged multiple is 3 times.
Thus, the present invention provides a kind of processor performance event automated watch-keeping facility of accurate metering, realizes in user
Layer is counted and fed back to the performance event that processor defines, and then the offer of writing to test case targetedly refers to
Lead.
Brief description of the drawings
With reference to accompanying drawing, and by reference to following detailed description, it will more easily have more complete understanding to the present invention
And be more easily understood its with the advantages of and feature, wherein：
Fig. 1 schematically shows the single property of processor internal act monitoring method according to the preferred embodiment of the invention
The flow chart of energy event monitoring process example.
Fig. 2 schematically shows the bulk of processor internal act monitoring method according to the preferred embodiment of the invention
The flow chart of energy event monitoring process example.
It should be noted that accompanying drawing is used to illustrate the present invention, it is not intended to limit the present invention.Pay attention to, represent that the accompanying drawing of structure can
It can be not necessarily drawn to scale.Also, in accompanying drawing, same or similar element indicates same or similar label.
Embodiment
In order that present disclosure is more clear and understandable, with reference to specific embodiments and the drawings in the present invention
Appearance is described in detail.
Fig. 1 schematically shows the single property of processor internal act monitoring method according to the preferred embodiment of the invention
The flow chart of energy event monitoring process.Fig. 2 schematically shows processor internal act according to the preferred embodiment of the invention
The flow chart of the batch performance event monitoring process example of monitoring method.
As depicted in figs. 1 and 2, according to a kind of processor performance event automatic monitoring method bag of accurate metering of the present invention
Include：
First step：Perform reservation recovery processing of the processor for performance event counter；Wherein, in processor process
In scheduling and handoff procedure, before operating system layer switches over process, using software mode to processor performance counter
Content retained and dump, complete to reset performance counter register in processor and complete and then recover above-mentioned meter
The content of number device；In this way, tester can accurately acquire the performance event of multiple test case runnings
Counting statistics information.
Second step：Operation support processor performance event counter recovers the operating system of processing to retain, and thus props up
Hold the accurate metering of performance event；
Third step：The performance count monitoring process of the single performance event of processor is realized, processor core is with backstage side
Formula submits the monitoring process of single performance event；Specifically, for example, as shown in figure 1, the monitoring process operation of single performance event
Mechanism is described as follows：
First single performance event sub-step：Select some performance event to be monitored, concurrently set performance event monitoring
Total time；
Second single performance event sub-step：Determine the result log file designation principle of the performance count of performance event；
3rd single performance event sub-step：The monitoring process of selected performance event is opened, startability counter is to property
The count value of energy event is counted, and starts timing；
4th single performance event sub-step：Run processor test case set；
5th single performance event sub-step：The count value of performance event is obtained, while by count value with certain fixed grating
Formula is updated to specified journal file in the form of additional；
6th single performance event sub-step：Judge whether the timing time of performance event monitoring has arrived, if timing
It has been arrived that, then the behavior of termination performance event counter counts；Otherwise after process dormancy specified time, the 5th single property is jumped to
Energy event sub-step continues to run with.
Four steps：Realize the performance count monitoring of processor batch performance event.Specifically, for example, as shown in Fig. 2
The monitoring operating mechanism that batch performance event counts is as follows：
First batch performance event sub-step：Can not according to multiple different performance events of the single performance counter of processor
The principle of repeat count in single processor core, multiple performance events are according to fixed format enumerated；
Second batch performance event sub-step：Target CPU check figure is determined, and the life for being tied to CPU different cores is set
Order；
3rd batch performance event sub-step：Acquisition can use core cpu quantity, while judge performance event sum with always may be used
With the relation between CPU core number, and perform following processing：
Without performance count if total available CPU core number is less than performance event sum, the 4th bulk what one is particularly good at is gone to
Part sub-step；
If always available CPU core number exceedes the prearranged multiple (such as preferably, 3 times) of performance event sum, then take before
3 times of performance events sum available CPU core number carry out performance counting statistics, and jump to the 5th batch performance event
Step continues to run with；That is, counted using light load monitoring pattern.
If always available CPU core number is between above-mentioned both 3 times of performance event sum (performance event sums and),
Then always available CPU core number carries out performance count for selection, hereafter jumps to the 5th batch performance event sub-step and continues to run with；That is,
Performance event is distributed on different core and is monitored.
4th batch performance event sub-step：Can if the maximum of the performance event number of single performance counter is more than
CPU core number, then stop monitoring, exit the monitoring of performance event.Otherwise, it is former according to traversal different processor performance counter
Then, the different performance event inside same performance counter is tied to different processor core according to specified strategy
The heart.
5th batch performance event sub-step：According to the principle of searching loop performance event list, performance event is bound
To the core cpu of selection, the 6th batch performance event sub-step is then performed；
6th batch performance event sub-step：It is determined that after relation between performance event and CPU specific cores numbering,
According to third step, the performance count monitoring of expansion batch processing device performance event.
5th step：Counting event analysis and test is fed back, and knot is counted according to performance event in third step, four steps
Fruit file, analyze count results；For the situation for thering is single performance event to be monitored on multiple processor cores, analysis knot
The count value of maximum is fed back to tester by fruit；Performance event count value is finally less than specified quantity and performance count
The performance event that value is zero feeds back to tester, is easy to instruct tester's optimal inspection program, improves test case.
A kind of key point of the processor performance event automated watch-keeping facility of accurate metering of the present invention has at two：It is first, real
The reservation recovery technology of existing processor performance event counter, mainly realizes processor for performance here in first step
The reservation recovery technology of event counter, the performance count value being cleared originally during processor process switching is protected
Stay, and the recovery of counter is carried out when next program is run, meet the needs of tester carries out accurate metering；
Second, the accurate metering of the performance event of batch is realized, here including in four steps, performance event is used as using CPU check figure
Accurate metering cost, realize comprehensive assessment to test case set quality and monitoring.
Can be seen that the present invention according to above technical scheme has advantages below：First be can be to the quality of test bag
There is reliable monitoring effect, both supported the accurate metering of single performance event, and can is enough to multiple corresponding to multiple test cases
Process carries out continual, monitor, for tester analyze with improve test case provide it is a kind of it is convenient reliably
Means.Second is that the present invention considers the quantity of equalization processor available core, the relation of its main operational load, in core cpu
In the case of enough, the device only monitors the performance count of single performance event in single core, to processor core
The pressure that load-strap is come is few；In the case of core cpu lazy weight, lead to too small amount of core cpu, to sacrifice core
Computational load is cost, realizes the prison of batch performance event, realizes and test problem bag is comprehensively monitored.3rd is, this
What invention was realized in software view completely, any hardware spending will not be brought；Finally, it is not meant to be not important to, this
Fault tolerance of the device in terms of reliability, in the case of core cpu is enough, single performance event is assigned to 3 cores
Detected in the heart, so as to add the reliability of device.
Furthermore, it is necessary to explanation, unless otherwise indicated, the otherwise term in specification " first ", " second ", " the 3rd "
Be used only for distinguishing each component in specification, element, step etc. Deng description, without be intended to indicate that each component, element,
Logical relation or ordinal relation between step etc..
It is understood that although the present invention is disclosed as above with preferred embodiment, but above-described embodiment and it is not used to
Limit the present invention.For any those skilled in the art, without departing from the scope of the technical proposal of the invention,
Many possible changes and modifications are all made to technical solution of the present invention using the technology contents of the disclosure above, or are revised as
With the equivalent embodiment of change.Therefore, every content without departing from technical solution of the present invention, the technical spirit pair according to the present invention
Any simple modifications, equivalents, and modifications made for any of the above embodiments, still fall within the scope of technical solution of the present invention protection
It is interior.
Claims (3)
- A kind of 1. processor internal act monitoring method, it is characterised in that including：First step：Perform reservation recovery processing of the processor for performance event counter；Wherein, in processor process scheduling With in handoff procedure, before operating system layer switches over process, using software mode in processor performance counter Appearance is retained and dump, completes to reset performance counter register in processor and completes and then recover above-mentioned counter Content；Second step：Operation support processor performance event counter retains the operating system for recovering processing；Third step：Realize the performance count monitoring of the single performance event of processor；Four steps：Realize the performance count monitoring of processor batch performance event；Wherein, the performance count monitoring process of single performance event includes：First single performance event sub-step：Selected particular characteristic event is monitored, and concurrently sets the total of performance event monitoring Time；Second single performance event sub-step：Determine the result log file designation principle of the performance count of the performance event；3rd single performance event sub-step：The monitoring process of the performance event is opened, startability counter is to performance thing The count value of part is counted, and starts to continue timing；4th single performance event sub-step：Run processor test case set；5th single performance event sub-step：Obtain performance event count value, while by count value with certain set form with Additional form is updated to specified journal file；6th single performance event sub-step：Judge whether the timing time of performance event monitoring has arrived, if timing has been arrived, Then termination performance event counter counts behavior；If timing is not arrived, after process dormancy specified time, the 5th is jumped to Single performance event sub-step continues to run with；Wherein, the performance count monitoring process of batch performance event includes：First batch performance event sub-step：Multiple performance events are enumerated according to predetermined format；Second batch performance event sub-step：Target CPU check figure is determined, and the different core for being tied to target CPU is set Order；3rd batch performance event sub-step：Acquisition can use core cpu quantity, while judge that performance event is total and can use with total Relation between CPU core number, and perform following processing：Without performance count if total available CPU core number is less than performance event sum, the 4th batch performance event is gone to Step；If always available CPU core number exceedes the prearranged multiple of performance event sum, prearranged multiple above is taken in performance event The available CPU core number of sum carries out performance counting statistics, and jumps to the 5th batch performance event sub-step and continue to run with；If always for available CPU core number between the prearranged multiple of performance event sum and performance event sum, selection is total Performance count can be carried out with CPU core number, hereafter jump to the 5th batch performance event sub-step and continue to run with；4th batch performance event sub-step：Judge the performance event number of single performance counter maximum whether be more than can CPU core number, stop monitoring if obtaining judging certainly, otherwise according to the side of traversal different processor performance counter Formula, by the different performance event binding inside same performance counter to different processor core；5th batch performance event sub-step：In the way of searching loop performance event list, performance event is tied to choosing The core cpu selected, then perform the 6th batch performance event sub-step；6th batch performance event sub-step：The relation between performance event and CPU specific cores numbering is determined, afterwards according to the The mode of the performance count monitoring process of the single performance event of three steps deploys the performance count of batch processing device performance event Monitoring.
- 2. processor internal act monitoring method according to claim 1, it is characterised in that also include：5th step：According to performance event count results in third step and four steps, count results are analyzed.
- 3. processor internal act monitoring method according to claim 1, it is characterised in that the prearranged multiple is 3 times.
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| CN107451038B (en) * | 2016-05-30 | 2020-05-19 | 龙芯中科技术有限公司 | Hardware event acquisition method, processor and computing system |
| CN106155827A (en) * | 2016-06-28 | 2016-11-23 | 浪潮(北京)电子信息产业有限公司 | A kind of cpu fault its diagnosis processing method based on Linux system and system |
| CN111209155B (en) * | 2018-11-21 | 2022-09-23 | 华夏芯（北京）通用处理器技术有限公司 | Performance detection method convenient for expansion and configuration |
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| CN1500248A (en) * | 2000-12-29 | 2004-05-26 | ض� | Qualification of event detection by thread ID and thread privilege level |
| CN101192188A (en) * | 2006-11-30 | 2008-06-04 | 国际商业机器公司 | Weighted event counting system and method for processor performance measurements |
| CN101859268A (en) * | 2009-04-08 | 2010-10-13 | 英特尔公司 | Context switch sampling |
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| US7895382B2 (en) * | 2004-01-14 | 2011-02-22 | International Business Machines Corporation | Method and apparatus for qualifying collection of performance monitoring events by types of interrupt when interrupt occurs |
| US7200522B2 (en) * | 2005-01-27 | 2007-04-03 | International Business Machines Corporation | Method, apparatus, and computer program product in a performance monitor for sampling all performance events generated by a processor |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1500248A (en) * | 2000-12-29 | 2004-05-26 | ض� | Qualification of event detection by thread ID and thread privilege level |
| CN101192188A (en) * | 2006-11-30 | 2008-06-04 | 国际商业机器公司 | Weighted event counting system and method for processor performance measurements |
| CN101859268A (en) * | 2009-04-08 | 2010-10-13 | 英特尔公司 | Context switch sampling |
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