CN105486372A - Intelligent electronic water meter control system based on drive logic gate protection circuit - Google Patents
Intelligent electronic water meter control system based on drive logic gate protection circuit Download PDFInfo
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- CN105486372A CN105486372A CN201510844249.5A CN201510844249A CN105486372A CN 105486372 A CN105486372 A CN 105486372A CN 201510844249 A CN201510844249 A CN 201510844249A CN 105486372 A CN105486372 A CN 105486372A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01F—MEASURING VOLUME, VOLUME FLOW, MASS FLOW OR LIQUID LEVEL; METERING BY VOLUME
- G01F15/00—Details of, or accessories for, apparatus of groups G01F1/00 - G01F13/00 insofar as such details or appliances are not adapted to particular types of such apparatus
- G01F15/07—Integration to give total flow, e.g. using mechanically-operated integrating mechanism
- G01F15/075—Integration to give total flow, e.g. using mechanically-operated integrating mechanism using electrically-operated integrating means
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Abstract
The invention discloses an intelligent electronic water meter control system based on a drive logic gate protection circuit. The intelligent electronic water meter control system is mainly composed of a Hall element, a signal processing unit, a single-chip microcomputer and a displayer and is characterized in that a trilinear buffer and drive circuit is connected between the signal processing unit and the single-chip microcomputer and between the signal processing unit and the displayer in series, the logic gate protection circuit is further connected between the trilinear buffer and drive circuit and the single-chip microcomputer, the trilinear buffer and drive circuit is composed of a buffer circuit and an integrated drive circuit connected with the output end of the buffer circuit, and the Hall element is composed of a Hall sensor a and a Hall sensor b which are connected with the signal processing unit. The flow of water flowing through a water pipe can be accurately measured through the control system, so that the metering accuracy and metering display clearness of an intelligent water meter are effectively ensured, and the meter reading accuracy of a meter reader is effectively improved.
Description
Technical field
The present invention relates to a kind of electromechanical equipment technical field, specifically refer to a kind of smart electronics water meter control system based on drive-type logic gate protection circuit.
Background technology
In life, water meter is mainly used to the instrument recording tap water water consumption, and traditional mechanical water meter is contained on water pipe, shows by the rotation showing upper pointer or character wheel the discharge passed through.Existing rotary wind type mechanical count water meter, has a disadvantage, is exactly that meter reading is inconvenient, not intuitively; The water meter of pointer type often has the phenomenon of pointer dislocation, thus causes and misread numerical value.And although direct-reading improves to some extent, also have the situation occurring half word when rising space to occur, after the water inlet of the card of mechanical water meter is got rusty or had water smoke, metering display is unclear, the person's of checking meter meter reading difficulty.Therefore, produce a kind of water meter that can solve the problems such as metering is inaccurate, metering display is unclear, just become the present task of top priority.
Summary of the invention
The object of the invention is to overcome the problems such as water meter measurement in prior art is inaccurate, metering display is unclear, cause the defect of meter reading difficulty to the person of checking meter, the invention provides a kind of smart electronics water meter control system based on drive-type logic gate protection circuit.
The present invention is achieved through the following technical solutions: a kind of smart electronics water meter control system based on drive-type logic gate protection circuit; primarily of Hall element; the signal processing unit be connected with Hall element; the single-chip microcomputer be connected with signal processing unit; the display be connected with single-chip microcomputer is serially connected in three linear buffer driving circuits between signal processing unit and single-chip microcomputer, and the logic gate protection circuit be connected between three linear buffer driving circuits and single-chip microcomputer forms.
Described three linear buffer driving circuits, by buffer circuit, are connected with the output terminal of buffer circuit with input end, integrated drive electronics that its output terminal is connected with logic gate protection circuit form; The output terminal of described logic gate protection circuit is connected with single-chip microcomputer; Described Hall element is by the Hall element a be all connected with signal processing unit and Hall element b group; Described signal processing unit, by the three end signal amplifying circuits be connected respectively with Hall element a and Hall element b, forms with the low-pass filter circuit be connected with logic gate protection circuit with three end signal amplifying circuits respectively; Described three end signal amplifying circuits, by signal receiving circuit, are connected with the output terminal of signal receiving circuit with input end, signal amplification circuit that output terminal is connected with low-pass filter circuit form.
Described logic gate protection circuit is by amplifier P4, Sheffer stroke gate IC1, Sheffer stroke gate IC2, Sheffer stroke gate IC3, triode VT8, positive pole as logic gate protection circuit input end and be connected with integrated drive electronics, the polar capacitor C18 that negative pole is connected with the positive pole of amplifier P4 after resistance R32, positive pole is connected with the emitter of triode VT8, the polar capacitor C17 that negative pole is connected with the positive pole of Sheffer stroke gate IC2, negative pole is connected with the base stage of triode VT8 after resistance R29 through diode D13 in turn, positive pole is in turn through polar capacitor C16 that resistance R30 is connected with the positive pole of Sheffer stroke gate IC1 after resistance R31 and diode D14, P pole is connected with the output terminal of amplifier P4, the diode D15 that N pole is connected with the negative pole of Sheffer stroke gate IC3 after resistance R34, positive pole is connected with the output terminal of Sheffer stroke gate IC2 after resistance R33, the polar capacitor C19 that negative pole is connected with the positive pole of Sheffer stroke gate IC3, and P pole is connected with the output terminal of Sheffer stroke gate IC1, the diode D16 that N pole is connected with the output terminal of Sheffer stroke gate IC3 after resistance R35 forms, the grounded collector of described triode VT8, the described positive pole of amplifier P4 is connected with the negative pole of Sheffer stroke gate IC2, its minus earth, the negative pole of described Sheffer stroke gate IC1 is connected with the positive pole of polar capacitor C19, and the N pole of described diode D16 is as the output terminal of logic gate protection circuit.
Described buffer circuit is by triode VT6, triode VT7, the diode D9 that P pole is connected with the emitter of triode VT7 after resistance R19, N pole is connected with the emitter of triode VT6 after resistance R22, the diode D10 that P pole is connected with the collector of triode VT7 after polar capacitor C11 through resistance R28 in turn, N pole is connected with the base stage of triode VT6 after resistance R21, and the polar capacitor C12 that positive pole is connected with the P pole of diode D10, negative pole is connected with the N pole of diode D9 after resistance R20 forms; The base stage of described triode VT7 as buffer circuit input end and be connected with low-pass filter circuit, the collector of described triode VT6 and the N of diode D10 form the output terminal of buffer circuit extremely jointly.
Described integrated drive electronics by time base chip U, telefault L, negative pole with time base chip U IN pin be connected, positive pole after resistance R23 with time base chip U the polar capacitor C13 that is connected of SE pin, positive pole is connected with the positive pole of polar capacitor C13 after resistance R24, negative pole in turn through resistance R25 after resistance R26 with time base chip U the polar capacitor C14 that is connected of LX pin, positive pole with time base chip U DAJ pin be connected, the polar capacitor C15 that negative pole is connected with the positive pole of polar capacitor C18, and P pole with time base chip U SE pin be connected, the diode D11 that N pole is connected with the negative pole of polar capacitor C15 after diode D12 and inductance L through resistance R27 in turn forms, time described the GND pin of base chip U be connected with the collector of triode CVT6 after and ground connection, the positive pole of described polar capacitor C13 is connected with the N pole of diode D10.
Described signal receiving circuit is by triode VT1, triode VT4, P pole is connected with the collector of triode VT1, N pole jointly forms the diode D1 of the input end of signal receiving circuit with the base stage of triode VT1 after resistance R2, positive pole is connected with the base stage of triode VT4 after diode D2 and resistance R8 through resistance R4 in turn, the polar capacitor C3 that negative pole is connected with the base stage of triode VT1, negative pole is connected with the positive pole of polar capacitor C3, positive pole is in turn through polar capacitor C2 that resistance R1 is connected with the base stage of triode VT1 after polar capacitor C1, and P pole is connected with the emitter of triode VT1 after resistance R5, the diode D3 that N pole is connected with the collector of triode VT4 after polar capacitor C4 forms, the emitter of described triode VT1 and the emitter of triode VT4 form the output terminal of signal receiving circuit jointly, and the input end of described signal receiving circuit is connected with Hall element b with Hall element a respectively as the input end of three end signal amplifying circuits.
Described signal amplification circuit is by amplifier P1, triode VT2, triode VT3, one end is connected with the emitter of triode VT4, the resistance R9 that the other end is connected with the positive pole of amplifier P1, P pole is connected with the emitter of triode VT2, the diode D4 that N pole is connected with the base stage of triode VT3 after resistance R3, positive pole is connected with the negative pole of amplifier P1, the polar capacitor C5 that negative pole is connected with the emitter of triode VT3, P pole is connected with the collector of triode VT3 after resistance R6, the diode D5 that N pole is connected with the output terminal of amplifier P1, and one end is connected with the output terminal of amplifier P1, the other end forms as the resistance R7 of the output terminal of signal amplification circuit, the base stage of described triode VT2 is connected with the emitter of triode VT1, its grounded collector, the grounded collector of described triode VT3.
Described low-pass filter circuit is by amplifier P2, amplifier P3, triode VT5, P pole is connected with the positive pole of amplifier P2 after resistance R11, N pole is in turn through diode D6 that resistance R10 is connected with the output terminal of amplifier P1 after resistance R7, positive pole is connected with the P pole of diode D6, the polar capacitor C6 of negative pole ground connection after resistance R12, N pole is connected with the positive pole of amplifier P2 after resistance R13, the diode D7 that P pole is connected with the collector of triode VT5, negative pole is connected with the emitter of triode VT5, the polar capacitor C8 that positive pole is connected with the positive pole of amplifier P3, N pole is connected with the base stage of triode VT5 after resistance R15, P pole is in turn through diode D8 that resistance R16 is connected with the output terminal of amplifier P3 after polar capacitor C9, positive pole is connected with the N pole of diode D8 in turn after resistance R14, the polar capacitor C7 that negative pole is connected with the N pole of diode D7, one end is connected with the negative pole of amplifier P2, the resistance R17 of other end ground connection, and negative pole is connected with the negative pole of amplifier P3, the polar capacitor C10 of positive pole ground connection after resistance R18 forms, the positive pole of described amplifier P3 is connected with the output terminal of amplifier P2, its output terminal is connected with the base stage of triode VT7.
Further, described display is high-definition liquid crystal display.
The present invention compared with prior art has the following advantages and beneficial effect:
(1) the large output impedance of input impedance of logic gate protection circuit of the present invention is little, and driving force is strong, and input ability is high, therefore, effectively can guarantee the accuracy of measurement of the present invention.
(2) integrated drive electronics of three linear buffer driving circuits of the present invention can reduce leakage inductance, and buffer circuit can also absorb high voltage spike, therefore, the current signal of this three linear buffers driving circuit energy stable output, ensure that Hall element can accurately be transferred to single-chip microcomputer to the information measured by the flow of water meter, thus improve the accuracy of this smart electronics water meter measurement.
(3) signal processing unit of the present invention is made up of three end signal amplifying circuits and low-pass filter circuit, and wherein three end signal amplifying circuits effectively can amplify the information that Hall element gathers, and this information is converted to current signal; Current signal after this amplification is then carried out anti-low frequency duty process by low-pass filter circuit, thus can effectively raise the accuracy of this smart electronics water meter measurement.
(4) the present invention is by employing two Hall element multiple repairing weld, the more accurate measuring water flow to flowing through water pipe, thus ensure that the accuracy of the measurement of this control system.
(5) display of the present invention adopts liquid crystal display, and display effect is better, the conveniently person's of checking meter meter reading.
Accompanying drawing explanation
Fig. 1 is one-piece construction block diagram of the present invention.
Fig. 2 is the electrical block diagram of three end signal amplifying circuits of the present invention.
Fig. 3 is the electrical block diagram of low-pass filter circuit of the present invention.
Fig. 4 is the electrical block diagram of the present invention three linear buffer driving circuit.
Fig. 5 is the electrical block diagram of logic gate protection circuit of the present invention.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
As shown in Figure 1; the present invention is primarily of Hall element; the signal processing unit be connected with Hall element; the single-chip microcomputer be connected with signal processing unit; the display be connected with single-chip microcomputer; be serially connected in three linear buffer driving circuits between signal processing unit and single-chip microcomputer, and the logic gate protection circuit be connected between three linear buffer driving circuits and single-chip microcomputer forms.Described three linear buffer driving circuits are made up of interconnective buffer circuit and integrated drive electronics; Described signal processing unit is made up of interconnective three end signal amplifying circuits and low-pass filter circuit; described Hall element a and Hall element b are connected with three end signal amplifying circuits respectively; described low-pass filter circuit is then connected with buffer circuit, and described logic gate protection circuit is then connected with single-chip microcomputer.
During enforcement, Hall element a and Hall element b is arranged on the top diverse location of electronic water meter impeller, for gathering the rotating speed of impeller and exporting corresponding pulse signal to signal processing unit.Its signal processing unit and single-chip microcomputer are arranged on same circuit board, and when implementing, the present invention can adopt lithium battery to power to each components and parts.Pallet is provided with above the impeller of electronic water meter, circuit board is fixed on the top of pallet, and pallet is provided with the buckle for coordinating with outer cover, and circuit board covers thus prevents circuit board from intaking by outer cover, outer cover top adopts transparent plastic to make, and facilitates meter reading personnel to check display.And the display in the present invention is high-definition liquid crystal display, ensure that the convenience and accurately of meter reading personnel's reading.
As shown in Figure 2, described three end signal amplifying circuits are made up of signal receiving circuit and signal amplification circuit; Described signal receiving circuit by triode VT1, triode VT4, resistance R1, resistance R2, resistance R4, resistance R5, resistance R8, polar capacitor C2, polar capacitor C3, polar capacitor C4, diode D1, diode D2, and diode D3 forms.
During connection, the P pole of diode D1 is connected with the collector of triode VT1, N pole after resistance R2 and the base stage of triode VT1 jointly form the input end of signal receiving circuit.The positive pole of polar capacitor C3 is connected with the base stage of triode VT4 after diode D2 and resistance R8 through resistance R4 in turn, negative pole is connected with the base stage of triode VT1.The negative pole of polar capacitor C2 is connected with the positive pole of polar capacitor C3, positive pole is connected with the base stage of triode VT1 after polar capacitor C1 through resistance R1 in turn.The P pole of diode D3 is connected with the emitter of triode VT1 after resistance R5, N pole is connected with the collector of triode VT4 after polar capacitor C4.The output terminal that the emitter of described triode VT1 forms signal receiving circuit jointly with the emitter of triode VT4 is connected with signal amplification circuit.
When described signal receiving circuit is implemented, circuit design and technique employ the resistance R1 and resistance R2 and triode VT1 with positive temperature coefficient (PTC) and the triode VT4 with negative temperature coefficient and diode D1 and diode D2 compensate mutually, thus ensure signal by the impact of input voltage fluctuation.
Meanwhile, described signal amplification circuit by amplifier P1, triode VT2, triode VT3, resistance R3, resistance R6, resistance R7, resistance R9, diode D4, diode D5, and polar capacitor C5 forms.
During connection, one end of resistance R9 is connected with the emitter of triode VT4, the other end is connected with the positive pole of amplifier P1.The P pole of diode D4 is connected with the emitter of triode VT2, N pole is connected with the base stage of triode VT3 after resistance R3.The positive pole of polar capacitor C5 is connected with the negative pole of amplifier P1, negative pole is connected with the emitter of triode VT3.The P pole of diode D5 is connected with the collector of triode VT3 after resistance R6, N pole is connected with the output terminal of amplifier P1.Resistance R7 one end is connected with the output terminal of amplifier P1, the other end as signal amplification circuit output terminal and be connected with low-pass filter circuit, the input end of described signal receiving circuit is connected with Hall element b with Hall element a respectively as the input end of three end signal amplifying circuits.The base stage of described triode VT2 is connected with the emitter of triode VT1, its grounded collector; The grounded collector of described triode VT3.
As shown in Figure 3, described low-pass filter circuit by amplifier P2, amplifier P3, triode VT5, resistance R10, resistance R11, resistance R12, resistance R13, resistance R14, resistance R15, resistance R16, resistance R17, resistance R18, diode D6, diode D7, diode D8, polar capacitor C6, polar capacitor C7, polar capacitor C8, polar capacitor C9, and polar capacitor C10 forms.
During connection, the P pole of diode D6 is connected with the positive pole of amplifier P2 after resistance R11, N pole is connected with the output terminal of amplifier P1 after resistance R7 through resistance R10 in turn.Polar capacitor C6 positive pole is connected with the P pole of diode D6, negative pole ground connection after resistance R12.The N pole of diode D7 is connected with the positive pole of amplifier P2 after resistance R13, P pole is connected with the collector of triode VT5.The negative pole of polar capacitor C8 is connected with the emitter of triode VT5, positive pole is connected with the positive pole of amplifier P3.
Wherein, the N pole of diode D8 is connected with the base stage of triode VT5 after resistance R15, P pole is connected with the output terminal of amplifier P3 after polar capacitor C9 through resistance R16 in turn.The positive pole of polar capacitor C7 is connected with the N pole of diode D8 in turn after resistance R14, negative pole is connected with the N pole of diode D7.One end of resistance R17 is connected with the negative pole of amplifier P2, other end ground connection.The negative pole of polar capacitor C10 is connected with the negative pole of amplifier P3, positive pole ground connection after resistance R18.The positive pole of described amplifier P3 is connected with the output terminal of amplifier P2, its output terminal is connected with the base stage of triode VT7.
As shown in Figure 4, described three linear buffer driving circuits are made up of buffer circuit and integrated drive electronics; Further, described buffer circuit by triode VT6, triode VT7, resistance R19, resistance R20, resistance R21, resistance R22, resistance R28, diode D9, diode D10, polar capacitor C11, and polar capacitor C12 forms.
During connection, the P pole of diode D9 is connected with the emitter of triode VT7 after resistance R19, N pole is connected with the emitter of triode VT6 after resistance R22.The P pole of diode D10 is connected with the collector of triode VT7 after polar capacitor C11 through resistance R18 in turn, N pole is connected with the base stage of triode VT6 after resistance R21.The positive pole of polar capacitor C12 is connected with the P pole of diode D10, negative pole is connected with the N pole of diode D9 after resistance R20.The base stage of described triode VT7 as buffer circuit input end and be connected with low-pass filter circuit, the collector of described triode VT6 and the N of diode D10 form the output terminal of buffer circuit extremely jointly.
Meanwhile, described integrated drive electronics by time base chip U, resistance R23, resistance R24, resistance R25, resistance R26, resistance R27, polar capacitor C13, polar capacitor C14, polar capacitor C15, diode D11, and diode D12 forms.
During connection, the negative pole of polar capacitor C13 with time base chip U IN pin be connected, positive pole after resistance R23 with time base chip U SE pin be connected.The positive pole of polar capacitor C14 is connected with the positive pole of polar capacitor C13 after resistance R24, negative pole in turn through resistance R25 after resistance R26 with time base chip U LX pin be connected.The positive pole of property electric capacity C15 with time base chip U DAJ pin is connected, negative pole is connected with the positive pole of polar capacitor C18.The P pole of pole diode D11 with time base chip U SE pin is connected, N pole is connected with the negative pole of polar capacitor C15 after diode D12 and inductance L through resistance R27 in turn.Time described the GND pin of base chip U be connected with the collector of triode CVT6 after and ground connection, the positive pole of described polar capacitor C13 is connected with the N pole of diode D10.
During enforcement, triode VT7 in this three linear buffers driving circuit is used for the signal that Received signal strength processing unit transmits, then after the collector and emitter of triode VT7 exports, the buffer circuit be made up of elements such as triode VT6, diode D10, diode D9 and polar capacitor C12, this signal is converted to controllable signal, be transferred to the integrated chip U of integrated drive electronics, carry out after signal noise elimination through integrated chip U, the SE pin of this integrated chip U and the drive singal of LX pin stable output are in single-chip microcomputer.Thus ensure that the accuracy of measuring of this control system.
As shown in Figure 5, described logic gate protection circuit is by amplifier P4, Sheffer stroke gate IC1, Sheffer stroke gate IC2; Sheffer stroke gate IC3, triode VT8, resistance R29, resistance R30; resistance R31, resistance R32, resistance R33, resistance R34; resistance R35, polar capacitor C16, polar capacitor C17; polar capacitor C18, polar capacitor C19, diode D13; diode D14, diode D15, and diode D16 forms.
During connection, the positive pole of polar capacitor C18 as logic gate protection circuit input end and be connected with integrated drive electronics, negative pole is connected with the positive pole of amplifier P4 after resistance R32.The positive pole of polar capacitor C17 is connected with the emitter of triode VT8, negative pole is connected with the positive pole of Sheffer stroke gate IC2.Polar capacitor C16 negative pole is connected with the base stage of triode VT8 after resistance R29 through diode D13 in turn, positive pole is connected with the positive pole of Sheffer stroke gate IC1 after resistance R31 and diode D14 through resistance R30 in turn.
Wherein, the P pole of diode D15 is connected with the output terminal of amplifier P4, N pole is connected with the negative pole of Sheffer stroke gate IC3 after resistance R34.The positive pole of polar capacitor C19 is connected with the output terminal of Sheffer stroke gate IC2 after resistance R33, negative pole is connected with the positive pole of Sheffer stroke gate IC3.The P pole of diode D16 is connected with the output terminal of Sheffer stroke gate IC1, N pole is connected with the output terminal of Sheffer stroke gate IC3 after resistance R35.
The grounded collector of described triode VT8; the described positive pole of amplifier P4 is connected with the negative pole of Sheffer stroke gate IC2, its minus earth; the negative pole of described Sheffer stroke gate IC1 is connected with the positive pole of polar capacitor C19, the N pole of described diode D16 as logic gate protection circuit output terminal and be connected with single-chip microcomputer.
The principle of work of this smart electronics water meter control system is as follows: water meter is accessed water pipe, flow out through water pipe with water during water, current are through electronic water meter, wheel rotation in electronic water meter, be arranged on Hall element a above impeller and Hall element b collect the rotating speed of impeller and export corresponding pulse signal, pulse signal carries out being transferred to low-pass filter circuit after process is amplified in rectification through three end signal amplifying circuits and carries out filtering process.Pulse signal transmission after filtering process is given three linear buffer driving circuits by its low-pass filter circuit, and this circuit can by the output of this current signal stable.Described logic gate protection circuit is transferred to single-chip microcomputer after current signal is carried out anti-common mode interference process.To guarantee that Hall element can accurately by current signal transfer to single-chip microcomputer to the information measured by the flow of water meter; the signal received is carried out number and converts by this single-chip microcomputer, and the number value converted out is shown the discharge flowing through electronic water meter by liquid crystal display.The present invention adopts two Hall elements to carry out multiple repairing weld, will flow through the measuring water flow of water pipe out more accurately, ensure that the accuracy of this smart electronics water meter.
As mentioned above, just the present invention can well be realized.
Claims (8)
1. the smart electronics water meter control system based on drive-type logic gate protection circuit, primarily of Hall element, the signal processing unit be connected with Hall element, the single-chip microcomputer be connected with signal processing unit, and the display be connected with single-chip microcomputer forms; Described Hall element is made up of the Hall element a be all connected with signal processing unit and Hall element b; It is characterized in that: between signal processing unit and single-chip microcomputer display, be serially connected with three linear buffer driving circuits, between three linear buffer driving circuits and single-chip microcomputer, be also connected with logic gate protection circuit; Described three linear buffer driving circuits, by buffer circuit, are connected with the output terminal of buffer circuit with input end, integrated drive electronics that its output terminal is connected with logic gate protection circuit form; The output terminal of described logic gate protection circuit is connected with single-chip microcomputer; Described signal processing unit, by the three end signal amplifying circuits be connected respectively with Hall element a and Hall element b, forms with the low-pass filter circuit be connected with logic gate protection circuit with three end signal amplifying circuits respectively; Described three end signal amplifying circuits, by signal receiving circuit, are connected with the output terminal of signal receiving circuit with input end, signal amplification circuit that output terminal is connected with low-pass filter circuit form.
2. the electronic water meter control system of logic-based door protection three-terminal voltage-stabilizing according to claim 1, it is characterized in that, described logic gate protection circuit is by amplifier P4, Sheffer stroke gate IC1, Sheffer stroke gate IC2, Sheffer stroke gate IC3, triode VT8, positive pole as logic gate protection circuit input end and be connected with integrated drive electronics, the polar capacitor C18 that negative pole is connected with the positive pole of amplifier P4 after resistance R32, positive pole is connected with the emitter of triode VT8, the polar capacitor C17 that negative pole is connected with the positive pole of Sheffer stroke gate IC2, negative pole is connected with the base stage of triode VT8 after resistance R29 through diode D13 in turn, positive pole is in turn through polar capacitor C16 that resistance R30 is connected with the positive pole of Sheffer stroke gate IC1 after resistance R31 and diode D14, P pole is connected with the output terminal of amplifier P4, the diode D15 that N pole is connected with the negative pole of Sheffer stroke gate IC3 after resistance R34, positive pole is connected with the output terminal of Sheffer stroke gate IC2 after resistance R33, the polar capacitor C19 that negative pole is connected with the positive pole of Sheffer stroke gate IC3, and P pole is connected with the output terminal of Sheffer stroke gate IC1, the diode D16 that N pole is connected with the output terminal of Sheffer stroke gate IC3 after resistance R35 forms, the grounded collector of described triode VT8, the described positive pole of amplifier P4 is connected with the negative pole of Sheffer stroke gate IC2, its minus earth, the negative pole of described Sheffer stroke gate IC1 is connected with the positive pole of polar capacitor C19, and the N pole of described diode D16 is as the output terminal of logic gate protection circuit.
3. a kind of smart electronics water meter control system based on drive-type logic gate protection circuit according to claim 2, it is characterized in that, described buffer circuit is by triode VT6, triode VT7, P pole is connected with the emitter of triode VT7 after resistance R19, the diode D9 that N pole is connected with the emitter of triode VT6 after resistance R22, P pole is connected with the collector of triode VT7 after polar capacitor C11 through resistance R28 in turn, the diode D10 that N pole is connected with the base stage of triode VT6 after resistance R21, and positive pole is connected with the P pole of diode D10, the polar capacitor C12 that negative pole is connected with the N pole of diode D9 after resistance R20 forms, the base stage of described triode VT7 as buffer circuit input end and be connected with low-pass filter circuit, the collector of described triode VT6 and the N of diode D10 form the output terminal of buffer circuit extremely jointly.
4. a kind of smart electronics water meter control system based on drive-type logic gate protection circuit according to claim 3, it is characterized in that, described integrated drive electronics by time base chip U, negative pole with time base chip U IN pin be connected, positive pole after resistance R23 with time base chip U the polar capacitor C13 that is connected of SE pin, positive pole is connected with the positive pole of polar capacitor C13 after resistance R24, negative pole in turn through resistance R25 after resistance R26 with time base chip U the polar capacitor C14 that is connected of LX pin, positive pole with time base chip U DAJ pin be connected, the polar capacitor C15 that negative pole is connected with the positive pole of polar capacitor C18, and P pole with time base chip U SE pin be connected, the diode D11 that N pole is connected with the negative pole of polar capacitor C15 after diode D12 and inductance L through resistance R27 in turn forms, time described the GND pin of base chip U be connected with the collector of triode CVT6 after and ground connection, the positive pole of described polar capacitor C13 is connected with the N pole of diode D10.
5. a kind of smart electronics water meter control system based on drive-type logic gate protection circuit according to claim 4, it is characterized in that, described signal receiving circuit is by triode VT1, triode VT4, P pole is connected with the collector of triode VT1, N pole jointly forms the diode D1 of the input end of signal receiving circuit with the base stage of triode VT1 after resistance R2, positive pole is connected with the base stage of triode VT4 after diode D2 and resistance R8 through resistance R4 in turn, the polar capacitor C3 that negative pole is connected with the base stage of triode VT1, negative pole is connected with the positive pole of polar capacitor C3, positive pole is in turn through polar capacitor C2 that resistance R1 is connected with the base stage of triode VT1 after polar capacitor C1, and P pole is connected with the emitter of triode VT1 after resistance R5, the diode D3 that N pole is connected with the collector of triode VT4 after polar capacitor C4 forms, the emitter of described triode VT1 and the emitter of triode VT4 form the output terminal of signal receiving circuit jointly, and the input end of described signal receiving circuit is connected with Hall element b with Hall element a respectively as the input end of three end signal amplifying circuits.
6. a kind of smart electronics water meter control system based on drive-type logic gate protection circuit according to claim 5, it is characterized in that, described signal amplification circuit is by amplifier P1, triode VT2, triode VT3, one end is connected with the emitter of triode VT4, the resistance R9 that the other end is connected with the positive pole of amplifier P1, P pole is connected with the emitter of triode VT2, the diode D4 that N pole is connected with the base stage of triode VT3 after resistance R3, positive pole is connected with the negative pole of amplifier P1, the polar capacitor C5 that negative pole is connected with the emitter of triode VT3, P pole is connected with the collector of triode VT3 after resistance R6, the diode D5 that N pole is connected with the output terminal of amplifier P1, and one end is connected with the output terminal of amplifier P1, the other end forms as the resistance R7 of the output terminal of signal amplification circuit, the base stage of described triode VT2 is connected with the emitter of triode VT1, its grounded collector, the grounded collector of described triode VT3.
7. a kind of smart electronics water meter control system based on drive-type logic gate protection circuit according to claim 6, it is characterized in that, described low-pass filter circuit is by amplifier P2, amplifier P3, triode VT5, P pole is connected with the positive pole of amplifier P2 after resistance R11, N pole is in turn through diode D6 that resistance R10 is connected with the output terminal of amplifier P1 after resistance R7, positive pole is connected with the P pole of diode D6, the polar capacitor C6 of negative pole ground connection after resistance R12, N pole is connected with the positive pole of amplifier P2 after resistance R13, the diode D7 that P pole is connected with the collector of triode VT5, negative pole is connected with the emitter of triode VT5, the polar capacitor C8 that positive pole is connected with the positive pole of amplifier P3, N pole is connected with the base stage of triode VT5 after resistance R15, P pole is in turn through diode D8 that resistance R16 is connected with the output terminal of amplifier P3 after polar capacitor C9, positive pole is connected with the N pole of diode D8 after resistance R14, the polar capacitor C7 that negative pole is connected with the N pole of diode D7, one end is connected with the negative pole of amplifier P2, the resistance R17 of other end ground connection, and negative pole is connected with the negative pole of amplifier P3, the polar capacitor C10 of positive pole ground connection after resistance R18 forms, the positive pole of described amplifier P3 is connected with the output terminal of amplifier P2, its output terminal is connected with the base stage of triode VT7.
8. a kind of smart electronics water meter control system based on drive-type logic gate protection circuit according to claim 7, it is characterized in that, described display is high-definition liquid crystal display.
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| CN201510844249.5A CN105486372A (en) | 2015-11-26 | 2015-11-26 | Intelligent electronic water meter control system based on drive logic gate protection circuit |
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| CN201510844249.5A CN105486372A (en) | 2015-11-26 | 2015-11-26 | Intelligent electronic water meter control system based on drive logic gate protection circuit |
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