CN105469758B - A kind of liquid crystal display drive circuit - Google Patents
A kind of liquid crystal display drive circuit Download PDFInfo
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- CN105469758B CN105469758B CN201510922453.4A CN201510922453A CN105469758B CN 105469758 B CN105469758 B CN 105469758B CN 201510922453 A CN201510922453 A CN 201510922453A CN 105469758 B CN105469758 B CN 105469758B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
Abstract
The invention discloses a kind of liquid crystal display drive circuit, including sequential control circuit and drive circuit；The voltage input end receiving voltage signal of the sequential control circuit, the voltage output end of the sequential control circuit are connected with the voltage input end of the drive circuit；The enabled input of the sequential control circuit receives enable signal, and the enabled output end of the sequential control circuit is connected with the enabled input of the drive circuit；The frequency modulation input of the sequential control circuit receives FM signal, and the frequency modulation output end of the sequential control circuit is connected with the frequency modulation input of the drive circuit.The present invention is adjusted by increased sequential control circuit to the input timing of voltage signal, enable signal and FM signal, so that the input timing of the voltage signal inputted at drive circuit, enable signal and FM signal meets the requirements, avoid due to the extremely caused IC operation irregularities of the input timing of voltage signal, enable signal and FM signal.
Description
Technical field
The present invention relates to liquid crystal driving technology, more particularly to a kind of liquid crystal display drive circuit.
Background technology
Liquid crystal display drive circuit (Drive Circuit), between main circuit and the control circuit of liquid crystal display,
For the requirement by the signal that information electronic circuit transmits according to its control targe, be converted to and be added in power electronic devices control terminal
Between common port, the signal that can turn it on or turn off.Drive circuit be integrated circuit (integrated circuit,
IC important component).
Fig. 1 a are a kind of schematic diagram for liquid crystal display drive circuit that prior art provides.As shown in Figure 1a, drive circuit
01 receiving voltage of voltage input end 011 (VIN) signal, enable input 012 and receive enabled (EN) signal, frequency modulation input
013 receives frequency modulation (Pulse Width Modulation, PWM) signal.
Fig. 1 b are the input timing figure of the liquid crystal display drive circuit shown in Fig. 1 a.As shown in Figure 1 b, under normal circumstances
VIN signals, which need to establish in EN signals, pwm signal, completes preceding foundation, and for the strict IC of timing requirements, VIN signals exist
When being established after EN signals, pwm signal, it is impossible to meet its specification requirement, cause IC can not normal work.That is, at present due to user
Strictly control VIN signals, EN signals, pwm signal establish caused by sequential IC can not normal work be very universal
Problem.
The content of the invention
A kind of liquid crystal display drive circuit provided by the invention, to avoid due to VIN signals, EN signals and pwm signal
IC operation irregularities caused by input timing is undesirable.
A kind of liquid crystal display drive circuit provided by the invention, including sequential control circuit and drive circuit；
The voltage input end receiving voltage signal of the sequential control circuit, the voltage output end of the sequential control circuit
It is connected with the voltage input end of the drive circuit；
The enabled input of the sequential control circuit receives enable signal, the enabled output end of the sequential control circuit
It is connected with the enabled input of the drive circuit；
The frequency modulation input of the sequential control circuit receives FM signal, the frequency modulation output end of the sequential control circuit
It is connected with the frequency modulation input of the drive circuit.
Further, the sequential control circuit include voltage comparator circuit, voltage switcher circuit, enabled on-off circuit,
Enabled delay circuit, frequency modulation switch circuit and frequency modulation delay circuit；
The input of the voltage comparator circuit is connected with the voltage input end of the sequential control circuit, the voltage ratio
Compared with the output end of circuit and the control terminal of the voltage switcher circuit and control terminal and the tune of the enabled on-off circuit
The control terminal of frequency switching circuit connects together；
The input of the enabled on-off circuit is connected with the enabled input of the sequential control circuit, and described enable is opened
The output end on powered-down road is connected with one end of the enabled delay circuit, the other end of the enabled delay circuit as it is described when
The enabled output end of sequence control circuit；
The input of the frequency modulation switch circuit is connected with the frequency modulation input of the sequential control circuit, and the frequency modulation is opened
The output end on powered-down road is connected with one end of the frequency modulation delay circuit, the other end of the frequency modulation delay circuit as it is described when
The frequency modulation output end of sequence control circuit.
Further, the voltage comparator circuit includes first resistor, second resistance, reference voltage regulator and compared
Device；
One end of the first resistor is connected with the voltage input end of the sequential control circuit, the first resistor it is another
One end is connected with one end of the second resistance and the first input end of the comparator, another termination of the second resistance
Ground, the second input of the comparator is connected with the output end of the reference voltage regulator, the output end of the comparator
As the output end of the voltage comparator circuit, the input of the reference voltage regulator makes with the sequential control circuit
The connection of energy input, earth terminal are turned on ground to discharge.
Further, the voltage switcher circuit, the enabled on-off circuit and the frequency modulation switch circuit simultaneously turn on
Or simultaneously switch off.
Further, the voltage switcher circuit, the enabled on-off circuit and the frequency modulation switch circuit are field effect
Answer transistor；
Control terminal of the grid of the field-effect transistor as on-off circuit, drain as on-off circuit input,
Output end of the source electrode as on-off circuit.
Further, the first input end of the comparator be normal phase input end, the second input of the comparator be
Inverting input, and the voltage switcher circuit, the enabled on-off circuit and the frequency modulation switch circuit are N-type channel field
Effect transistor.
Further, the first input end of the comparator be inverting input, the second input of the comparator be
Normal phase input end, and the voltage switcher circuit, the enabled on-off circuit and the frequency modulation switch circuit are P-type channel field
Effect transistor.
Further, the 3rd electricity that the enabled delay circuit includes the first electric capacity and connected with first electric capacity
Resistance, the frequency modulation delay circuit include the second electric capacity and the 4th resistance connected with second electric capacity.
A kind of liquid crystal display drive circuit provided by the invention, adds sequential control circuit, and drive circuit passes through sequential
Control circuit obtains voltage signal, enable signal and the FM signal of input.Compared with prior art, invention increases sequential
After control circuit, the sequential control circuit can be adjusted to the input timing of voltage signal, enable signal and FM signal,
So that the input timing of the voltage signal inputted at drive circuit, enable signal and FM signal meets the requirements, so as to avoid
Due to the extremely caused IC operation irregularities of the sequential of voltage signal, enable signal and FM signal.
Brief description of the drawings
In order to illustrate more clearly of the technical scheme in the present invention, in being described below to embodiment it is required use it is attached
Figure does one and simply introduced, it should be apparent that, drawings in the following description are some embodiments of the present invention, general for this area
For logical technical staff, on the premise of not paying creative work, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 a are a kind of schematic diagram for liquid crystal display drive circuit that prior art provides；
Fig. 1 b are the input timing figure of the liquid crystal display drive circuit shown in Fig. 1 a；
Fig. 2 a are a kind of structure chart of the liquid crystal display drive circuit provided in the embodiment of the present invention one；
Fig. 2 b are the structure chart of another liquid crystal display drive circuit provided in the embodiment of the present invention one；
Fig. 3 a are the circuit diagram of another liquid crystal display drive circuit provided in the embodiment of the present invention two；
Fig. 3 b are a kind of circuit diagram of sequential control circuit in Fig. 3 a；
Fig. 3 c are the circuit diagram of another sequential control circuit in Fig. 3 a.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, hereinafter with reference to the accompanying drawing in the present invention, pass through
Embodiment clearly and completely describes technical scheme, it is clear that described embodiment is that a part of the invention is implemented
Example, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art are not making creativeness
The every other embodiment obtained under the premise of work, belongs to the scope of protection of the invention.
Embodiment one
Fig. 2 a are a kind of structure chart of the liquid crystal display drive circuit provided in the embodiment of the present invention one.The skill of the embodiment
Art scheme be applied to voltage (VIN) signal, enabled (EN) signal and frequency modulation (PWM) signal input timing it is undesirable when,
Control the situation of liquid crystal display drive circuit normal work.As shown in Figure 2 a, the liquid crystal display drive circuit specifically includes sequential
Control circuit 12 and drive circuit 11.
Wherein, the voltage input end 121 of sequential control circuit 12 receives VIN signals, voltage output end 121' and driving electricity
The voltage input end 111 on road 11 connects；The enabled input 122 of sequential control circuit 12 receives EN signals, enables output end
122' is connected with the enabled input 112 of drive circuit 11；The frequency modulation input 123 of sequential control circuit 12 receives pwm signal,
Frequency modulation output end 123' is connected with the frequency modulation input 113 of drive circuit 11.
Specifically, foundation order of the sequential control circuit 12 to VIN signals, EN signals and pwm signal is controlled so that
After the voltage output end 121' output voltage signals of sequential control circuit 12, output end 122' output enable signals are enabled, are adjusted
Frequency output end 123' exports FM signal, so that after the receiving voltage signal of voltage input end 111 of drive circuit 11, driving
The enabled input 112 of circuit 11 receives enable signal, and the frequency modulation input 113 of drive circuit 11 receives FM signal, i.e. i.e.
When making the input timing of VIN signals at sequential control circuit 12, EN signals and PWM letters undesirable, VIN at drive circuit 11
The input timing of signal, EN signals and pwm signal also complies with requirement, avoid due to VIN signals, EN signals and PWM letter it is defeated
Enter sequential it is undesirable caused by IC operation irregularities.
Fig. 2 b are the structure chart of another liquid crystal display drive circuit provided in the embodiment of the present invention one.Such as Fig. 2 b institutes
Show, sequential control circuit 12 includes voltage comparator circuit U, voltage switcher circuit D1, enabled on-off circuit D2, enabled delay circuit
T1, frequency modulation switch circuit D3 and frequency modulation delay circuit T2；Voltage comparator circuit U input 124 and sequential control circuit 12
Voltage input end 121 connects, and voltage comparator circuit U output end 124' and voltage switcher circuit D1 control terminal and enabled opens
Powered-down road D2 control terminal and the control terminal of the frequency modulation switch circuit D3 connect together；Enabled on-off circuit D2 input with
The enabled input 122 of sequential control circuit 12 connects, and enables on-off circuit D2 output end and the one of enabled delay circuit T1
End connection, the enabled input 122' of the other end of the enabled delay circuit T1 as the sequential control circuit 12；Frequency modulation
On-off circuit D3 input is connected with the frequency modulation input 123 of the sequential control circuit 12, and frequency modulation switch circuit D3's is defeated
Go out end to be connected with one end of the frequency modulation delay circuit T2, the other end of the frequency modulation delay circuit T2 is as the SECO
The frequency modulation output end 123' of circuit 12.
Specifically, voltage comparator circuit U input 124 receive VIN signals, VIN signals are compared, so as to than
Compared with output control voltage switcher circuit D1, enable being turned on or off for on-off circuit D2 and frequency modulation switch circuit D3.
Wherein, voltage switcher circuit D1, enabled on-off circuit D2 and frequency modulation switch circuit D3 are simultaneously turned on or simultaneously switched off.
Specifically, when voltage switcher circuit D1, enabled on-off circuit D2 and frequency modulation switch circuit D3 are simultaneously turned on, sequential control circuit
VIN signals are transferred to drive circuit 11 by 12, and EN signals transmit EN signals after enabling delay circuit T1 delay disposal
To drive circuit 11, and pwm signal is transferred to drive circuit 11 by pwm signal after frequency modulation delay circuit T2 delay disposal,
Therefore VIN signals are established before EN signals and pwm signal establish completion at drive circuit 11 in the present embodiment, i.e. drive circuit
The input timing of the VIN signals, EN signals and the pwm signal that are inputted at 11 meets the requirements.
The liquid crystal display drive circuit provided in the present embodiment, VIN signals, EN are believed by increased sequential control circuit
Number and the input timing of pwm signal be adjusted so that VIN signals, EN signals and the pwm signal inputted at drive circuit it is defeated
Enter sequential to meet the requirements, avoid because the extremely caused IC work of the input timing of VIN signals, EN signals and pwm signal is different
Often.
Embodiment two
The present embodiment provides another liquid crystal display drive circuit on the basis of above-described embodiment.
Fig. 3 a are the circuit diagram of another liquid crystal display drive circuit provided in the embodiment of the present invention two, and Fig. 3 b are Fig. 3 a
In a kind of sequential control circuit circuit diagram.With reference to Fig. 3 a and Fig. 3 b, the liquid crystal display drive circuit specifically includes sequential control
Circuit 12 and drive circuit 11 processed, sequential control circuit 12 include first resistor R1, second resistance R2, reference voltage regulator
U2, comparator U1, voltage switcher circuit D1, enabled on-off circuit D2, enabled delay circuit T1, frequency modulation switch circuit D3 and frequency modulation
Delay circuit T2.
Wherein, first resistor R1 one end be connected with the voltage input end 121 of sequential control circuit 12, first resistor R1
The other end is connected with one end of the second resistance R2 and the first input end of the comparator U1, the second resistance R2's
The other end is grounded, and the second input of the comparator U1 is connected with the output end of the reference voltage regulator U2, the ratio
Output end of the output end as the voltage comparator circuit compared with device U1, i.e., described comparator U1 output end is as the sequential
The voltage output end 121' of control circuit 12 is connected with the voltage input end 111 of the drive circuit 11, and the reference voltage is adjusted
Section device U2 input is connected with the voltage input end 121 of the sequential control circuit, earth terminal turns on ground to discharge.
Specifically, first resistor R1 and second resistance R2 partial pressures produce voltage V0, i.e., described comparator U1 the first input
The voltage V0 of input, reference voltage regulator U2 is held to provide stable reference voltage Vref, i.e., the second of described comparator U1 is defeated
Enter end input is reference voltage Vref.The present embodiment passes through to first resistor R1, second resistance R2 and reference voltage Vref
It is configured, when making VIN signals more than or equal to IC startup voltage UVLO, V0 >=Vref, VIN signals are less than IC and start voltage
During UVLO, V0<Vref.
Wherein, the voltage switcher circuit D1, the enabled on-off circuit D2 and the frequency modulation switch circuit D3 are field
Effect transistor；Control terminal of the grid of field-effect transistor as on-off circuit, drain input as on-off circuit, source
Output end of the pole as on-off circuit.Specifically, the output end of the comparator U1 is connected with the grid of each FET, is passed through
Comparator U1 output result can control being turned on or off for each FET.
As shown in Figure 3 b, the first input end of the comparator U1 be normal phase input end, second input be anti-phase
Input, and the voltage switcher circuit D1, the enabled on-off circuit D2 and the frequency modulation switch circuit D3 are N-type channel
Field-effect transistor.Specifically, that normal phase input end input is voltage V0, and inverting input input is reference voltage Vref,
In V0 >=Vref, comparator U1 output result is high level, and high level simultaneously turns on each N-type channel field-effect transistor,
In V0 ＜ Vref, comparator U1 output result is low level, and low level simultaneously switches off each N-type channel field-effect transistor.
Therefore, when VIN signals are more than or equal to startup voltage UVLO in the present embodiment, each N-type channel field-effect transistor simultaneously turns on,
Now Boost (switch DC) boostings start, when avoiding VIN signals less than voltage UVLO is started compared to prior art
IC operation irregularities caused by Boost starts.
Fig. 3 c are the circuit diagram of another sequential control circuit in Fig. 3 a.As shown in Figure 3 c, the of the comparator U1
One input is inverting input, second input is normal phase input end, and the voltage switcher circuit D1, described enabled
The on-off circuit D2 and frequency modulation switch circuit D3 is P-type channel field-effect transistor.Specifically, normal phase input end inputs
It is voltage Vref, inverting input input is reference voltage V0, and in V0 >=Vref, comparator U1 output result is low electricity
Flat, low level simultaneously turns on each P-type channel field-effect transistor, and in V0 ＜ Vref, comparator U1 output result is high electricity
Flat, high level simultaneously switches off each P-type channel field-effect transistor.
To sum up, the voltage received in the present embodiment in comparator U1 first input end is more than or equal to the second input and terminated
During the reference voltage of receipts, the voltage switcher circuit D1, the enabled on-off circuit D2 and the frequency modulation switch circuit D3 are led
It is logical；When the voltage that comparator U1 first input end receives is less than the reference voltage that the second input receives, the voltage is opened
Powered-down road D1, the enabled on-off circuit D2 and the frequency modulation switch circuit D3 disconnect.
Wherein, the enabled delay circuit T1 includes the first electric capacity and the 3rd resistor connected with the first electric capacity, described
Frequency modulation delay circuit T2 includes the second electric capacity and the 4th resistance connected with the second electric capacity.
It should be noted that delay circuit in the present invention is except providing resistance and electric capacity by connecting in the present embodiment
Composition is outer, it is possible to have other structures.
The liquid crystal display drive circuit provided in the present embodiment, voltage V0 and reference voltage Vref are carried out by comparator
Compare, and control each FET to be turned on or off according to comparative result, when avoiding VIN signals less than voltage is started, IC is opened
IC operation irregularities caused by dynamic.Also, simultaneously turned on by each FET, enable delay circuit and frequency modulation delay circuit energy
The input timing of the VIN signals, EN signals and the pwm signal that keep inputting at drive circuit meets the requirements, and avoids because VIN believes
Number, the extremely caused IC operation irregularities of the input timing of EN signals and pwm signal.
Pay attention to, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious changes,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although being carried out by above example to the present invention
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (8)
1. a kind of liquid crystal display drive circuit, it is characterised in that including sequential control circuit and drive circuit；
The voltage input end receiving voltage signal of the sequential control circuit, the voltage output end of the sequential control circuit and institute
State the voltage input end connection of drive circuit；
The enabled input of the sequential control circuit receives enable signal, the enabled output end of the sequential control circuit and institute
State the enabled input connection of drive circuit；
The frequency modulation input of the sequential control circuit receives FM signal, the frequency modulation output end of the sequential control circuit and institute
State the frequency modulation input connection of drive circuit.
2. liquid crystal display drive circuit according to claim 1, it is characterised in that the sequential control circuit includes voltage
Comparison circuit, voltage switcher circuit, enabled on-off circuit, enabled delay circuit, frequency modulation switch circuit and frequency modulation delay circuit；
The input of the voltage comparator circuit is connected with the voltage input end of the sequential control circuit, and the voltage ratio is more electric
The output end on road is opened with the control terminal and the control terminal of the enabled on-off circuit of the voltage switcher circuit and the frequency modulation
The control terminal on powered-down road connects together；
The input of the enabled on-off circuit is connected with the enabled input of the sequential control circuit, the enabled switch electricity
The output end on road is connected with one end of the enabled delay circuit, and the other end of the enabled delay circuit is as the sequential control
The enabled output end of circuit processed；
The input of the frequency modulation switch circuit is connected with the frequency modulation input of the sequential control circuit, the frequency modulation switch electricity
The output end on road is connected with one end of the frequency modulation delay circuit, and the other end of the frequency modulation delay circuit is as the sequential control
The frequency modulation output end of circuit processed.
3. liquid crystal display drive circuit according to claim 2, it is characterised in that the voltage comparator circuit includes first
Resistance, second resistance, reference voltage regulator and comparator；
One end of the first resistor is connected with the voltage input end of the sequential control circuit, the other end of the first resistor
It is connected with one end of the second resistance and the first input end of the comparator, the other end ground connection of the second resistance,
Second input of the comparator is connected with the output end of the reference voltage regulator, the output end conduct of the comparator
The output end of the voltage comparator circuit, the input of the reference voltage regulator are enabled defeated with the sequential control circuit
Enter end connection, earth terminal is turned on ground to discharge.
4. the liquid crystal display drive circuit according to Claims 2 or 3, it is characterised in that the voltage switcher circuit, described
Enabled on-off circuit and the frequency modulation switch circuit are simultaneously turned on or simultaneously switched off.
5. liquid crystal display drive circuit according to claim 3, it is characterised in that the voltage switcher circuit, described make
Energy on-off circuit and the frequency modulation switch circuit are field-effect transistor；
Control terminal of the grid of the field-effect transistor as on-off circuit, input, the source electrode to drain as on-off circuit
Output end as on-off circuit.
6. liquid crystal display drive circuit according to claim 5, it is characterised in that
The first input end of the comparator is normal phase input end, the second input of the comparator is inverting input, and
The voltage switcher circuit, the enabled on-off circuit and the frequency modulation switch circuit are N-type channel field-effect transistor.
7. liquid crystal display drive circuit according to claim 5, it is characterised in that
The first input end of the comparator is inverting input, the second input of the comparator is normal phase input end, and
The voltage switcher circuit, the enabled on-off circuit and the frequency modulation switch circuit are P-type channel field-effect transistor.
8. liquid crystal display drive circuit according to claim 2, it is characterised in that
The enabled delay circuit includes the first electric capacity and the 3rd resistor connected with first electric capacity, the frequency modulation delay
Circuit includes the second electric capacity and the 4th resistance connected with second electric capacity.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510922453.4A CN105469758B (en) | 2015-12-14 | 2015-12-14 | A kind of liquid crystal display drive circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510922453.4A CN105469758B (en) | 2015-12-14 | 2015-12-14 | A kind of liquid crystal display drive circuit |
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| CN105469758A CN105469758A (en) | 2016-04-06 |
| CN105469758B true CN105469758B (en) | 2018-03-02 |
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| CN109119042B (en) * | 2018-09-27 | 2020-04-28 | 深圳市华星光电技术有限公司 | Driving circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103345897A (en) * | 2013-06-20 | 2013-10-09 | 深圳市华星光电技术有限公司 | Active matrix display device, scanning drive circuit and scanning drive method thereof |
| TW201407572A (en) * | 2012-08-08 | 2014-02-16 | Samsung Display Co Ltd | Driving apparatus of display panel and display device including the same |
| CN104992684A (en) * | 2015-07-07 | 2015-10-21 | 武汉华星光电技术有限公司 | Display used for controlling gate drive timing sequence and corresponding control method |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4627672B2 (en) * | 2005-03-23 | 2011-02-09 | シャープ株式会社 | Driving method of display device |
| KR100864926B1 (en) * | 2007-05-11 | 2008-10-22 | 엘지디스플레이 주식회사 | Liquid crystal display |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201407572A (en) * | 2012-08-08 | 2014-02-16 | Samsung Display Co Ltd | Driving apparatus of display panel and display device including the same |
| CN103345897A (en) * | 2013-06-20 | 2013-10-09 | 深圳市华星光电技术有限公司 | Active matrix display device, scanning drive circuit and scanning drive method thereof |
| CN104992684A (en) * | 2015-07-07 | 2015-10-21 | 武汉华星光电技术有限公司 | Display used for controlling gate drive timing sequence and corresponding control method |
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Address after: 215301, 1, Longteng Road, Kunshan, Jiangsu, Suzhou Patentee after: Kunshan Longteng Au Optronics Co Address before: 215301, 1, Longteng Road, Kunshan, Jiangsu, Suzhou Patentee before: Kunshan Longteng Optronics Co., Ltd. |