CN105429898B - A kind of CICQ structures intersect the balanced packet scheduling algorithm of buffer queue - Google Patents

Abstract

The invention discloses a kind of CICQ structures to intersect the balanced packet scheduling algorithm of buffer queue.Inventive algorithm works in work conserving states as core to realize or at utmost approach interchanger, using output port as matching benchmark, selection intersects the minimum output port priority match of length of buffer queue, the intersection buffered packet of balanced all output ports takes as far as possible, work conserving are realized to approach as much as possible, the average delay of packet is reduced while percent of pass is improved.Simulation result contrast display, for intersecting caching crossbuffer and being the CICQ interchangers of a packet, inventive algorithm is better than existing main flow algorithm in terms of packeting average time delay, has good practical value in extensive high-performance CICQ interchangers.

Description

A kind of CICQ structures intersect the balanced packet scheduling algorithm of buffer queue

Technical field

The invention belongs to high-performance packet switch control technology field.

Background technology

Up to the present, people are lined up (Combined Input and to high performance joint input crosspoint Crossbar Queued, CICQ) dispatching algorithm of structure carried out numerous studies, and classical main flow algorithm is divided into based on poll Two big type of RR (Round-Robin) and maximum weight algorithms.Algorithm based on RR mainly has RR-RR, DRR (Differential Round-Robin)、TFQA(Tracking Fair QuotaAllocation)、RR-LQD(Longest Queue Detecting) etc..Maximum matching method based on weight mainly includes with team leader, intersects buffer occupancy, blocking time For the weight limit matching method of weight, including LQF-RR (Longest Queue First and RR), MCBF (Most Critical Buffer First)、SCBF(Shortest Crosspoint Buffer First)、SBF-GWF(the Shortest buffer First and the Greatest Weigh buffer First)、HOPS(Hybrid Optimization Packet Scheduling), MCQF (Most Critical Queue First) etc..RR and its improvement Algorithm realizes that simply complexity is generally O (1), and most of algorithms approach to the percent of pass of accessible smooth traffic 100%, but packeting average time delay is larger.Weight limit matching method is obtained under packet delay using complexity increase as cost Drop.Such as representational MCBF algorithms are using the grouping number cached in crossbar corresponding to specific output and input port as power Weight, makes full use of crossbar resources, but do not account for VOQ queue length.And the SBF-GWF algorithms proposed recently, On the basis of MCBF, further, output scheduling uses VOQ team leader to have for weight compared to MCBF and other algorithms, delay performance It is significant to improve.

In the research of existing CICQ dispatching algorithms, even the exsertile SBF-GWF algorithms of property, most simple compared to use Output work queue (OQ) structure of single FIFO (First In First Out) algorithm, delay performance still have larger gap.Root This reason is that OQ fabric switch can operate at work-conserving states, it is ensured that reach 100% percent of pass, from And time delay is declined.But the higher speed-up ratio of OQ structures causes its limited scalability, in mass rapid exchange not With practical value.

Based on above-mentioned analysis, different from existing algorithm, the present invention works in work- at utmost to approach interchanger Conserving states are core, it is proposed that a kind of new packet input scheduling algorithm in CICQ structures, that is, intersect caching team Balanced (Crossbuffer Queue Balance, the CQB) algorithm of row.CQB algorithms provided by the invention are using output port as matching Benchmark, selection intersect the minimum output port priority match of caching (crossbuffer) queue length, balanced all outputs as far as possible The crossbuffer packets of port take, to cause interchanger approaches to work in work-conserving states as much as possible, While interchanger percent of pass is improved, the average delay of packet is reduced.

The content of the invention

It is an object of the invention to provide for crossbuffer buffer memory capacity be one packet CICQ fabric switch most Big degree works in work-conserving states, and the packet with good percent of pass and average packet delay performance is defeated Enter dispatching algorithm.To achieve the above object, the technology path that uses of the present invention for：

First step initiating port set；

When each time slot starts, output port set OP is made to include all output ports, input port set IP includes institute There is input port；

Second step judges whether scheduling terminates；

If OP is sky, the time slot input scheduling terminates；Otherwise, into the 3rd step；

3rd step selects output port to be matched；

Since the output port that pointer po is pointed to, first crossbar queue lengths B is selected in OP_jMinimum is defeated Exit port j, and po is pointed to the position of its next output port；

Wherein B_jOutput port j crossbar queue lengths are represented, po is the priority pointer of output port, and it is whole It is individual scheduling it is initial when point to output port 1；

4th step examines whether the output port of selection has suitable input port matching；

If EIP_jWith IP common factor WEIP_jFor sky, output port j is rejected from OP, returns to second step；

Wherein CB_ijRepresent to intersect caching (crossbuffer), EIP corresponding to input port i and output port j_jRepresent full Sufficient VOQ_ijIt is not empty and CB_ijFor all input port i of sky set；

5th step for etc. output port to be matched select suitable input port matching；

Since the input port that pi is pointed to, in WEIP_jFirst entry of middle selection_iMinimum input port i, and by pi The position of its next input port is pointed to, by VOQ_ijHead cell be sent to CB_ijIn；

Wherein entry_iThe non-NULL VOQ number of queues that input port i is included is represented, pi is that the priority of input port refers to Pin, it points to input port 1 when entirely dispatching initial；

6th step rejects the input port matched, updates the intersection length of buffer queue of the output port matched；

By B_jAdd 1, input port i is rejected from IP, update EIP_jWith all WEIP, the 3rd step is returned to.

Beneficial effects of the present invention：CICQ fabric switch of the present invention for crossbuffer capacity for single packet, A kind of input scheduling algorithm for making interchanger at utmost approach work-conserving working conditions is provided, and is being exported End forms CQB-LQF algorithms using classical LQF algorithm combinations.Simulation result shows that it can effectively improve interchanger and pass through Rate, simultaneously for most of heterogeneous traffic is accounted in practical application, more close to OQ in terms of its packeting average delay performance Structure.Compared to existing representational main flow algorithm, algorithm provided by the invention is in interchanger percent of pass and packeting average Prolonging aspect of performance has obvious advantage.Therefore algorithm provided by the invention has good in extensive high-performance CICQ interchangers Good practical value.

Brief description of the drawings

Fig. 1 is that joint input crosspoint is lined up (CICQ) fabric switch schematic diagram；

Fig. 2 is the flow chart of CQB algorithms；

Fig. 3 is that packeting average time delay contrasts under 32 × 32 port switch Uniform B ernoulli business；

Fig. 4 is that packeting average time delay contrasts under the uniform ON/OFF business of 32 × 32 port switch；

Fig. 5 is that packeting average time delay contrasts under 32 × 32 port switch Non-uniform B ernoulli business；

Fig. 6 is that packeting average time delay contrasts under the non-homogeneous ON/OFF business of 32 × 32 port switch.

Embodiment

Fig. 1 gives the CICQ block diagrams of structure packet switch.The present invention is cached by dispatching come balanced each output cross The team leader of queue (overstriking vertical line represents in figure), to realize work-conserving as far as possible, on the premise of ensureing percent of pass Improve average delay performance.

The first step initializes；

Port set is initialized.When each time slot starts, output port set OP is made to include all output ports, Input port set IP includes all input ports.Such as 4 × 4 port time slot input VOQ and crossbar when starting In buffer status it is as follows：

Wherein VOQ_ijThe VOQ queues for the packet queue that output port j is gone in input port i are represented, 0 represents it as sky, 1 For non-NULL；CB_ijRepresent input/output port and represent empty to intersecting caching (crossbuffer) corresponding to ij, same 0,1 represents non- It is empty.Now OP={ 1,2,3,4 }, IP={ 1,2,3,4 }；

Second step judges whether scheduling terminates；

If OP is sky, the time slot input scheduling terminates；

Now OP={ 1,2,3,4 }, it is non-NULL, then continues the 3rd step；

3rd step selects output port to be matched；

Since the output port that po is pointed to, first B is selected in OP_jMinimum output port j, and po is pointed to it The position of next output port；

Wherein B_jOutput port j crossbar queue lengths are represented, po is the priority pointer of output port, and it is whole It is individual scheduling it is initial when point to output port 1；

Assuming that current time slots po points to output port 1, now B₁,B₂,B₃,B₄Respectively 2,1,2,1, then j=2 is selected, will Po points to output port 3；

4th step examines whether the output port of selection has suitable input port matching；

If EIP_jWith IP common factor WEIP_jFor sky, output port j is rejected from OP, returns to second step；

Make CB_ijRepresent to intersect caching (crossbuffer) corresponding to input port i and output port j, above EIP_jTable Show and meet VOQ_ijIt is not empty and CB_ijFor all input port i of sky set；

Now VOQ₂₂,VOQ₃₂,VOQ₄₂It is not sky, CB₁₂,CB₂₂,CB₄₂For sky, therefore EIP₂={ 2,4 }, IP=1,2,3, 4 }, then WEIP₂={ 2,4 }, it is not sky, continues the 5th step；

5th step for etc. output port to be matched select suitable input port matching；

Since the input port that pi is pointed to, in WEIP_jFirst entry of middle selection_iMinimum input port i, and by pi The position of its next input port is pointed to, by VOQ_ijHead cell be sent to CB_ijIn；

Wherein entry_iThe non-NULL VOQ number of queues that input port i is included is represented, pi is that the priority of input port refers to Pin, it points to input port 1 when entirely dispatching initial；

Assuming that current time slots pi points to input port 1, now WEIP₂={ 2,4 }, entry₂=3, entry₄=4, therefore select I=2 is selected, pi is pointed into input port 3, by VOQ₂₂Head cell be sent to CB₂₂In；

6th step rejects the input port matched, updates the intersection length of buffer queue of the output port matched；

By B_jAdd 1, input port i is rejected from IP, update EIP_jWith all WEIP, the 3rd step is returned to；

By B in this example₂Value is changed into 2 after adding 1, and input port 2, IP={ 1,3,4 }, EIP after renewal are rejected from IP₂= { 4 }, WEIP₂={ 4 } WEIP₄It is changed into { 4 } by original { 2,4 }, it is other constant.

Fig. 3 to Fig. 6 sets forth in 32 × 32 port switch uniform non-homogeneous whereabouts distribution Bernoulli and Under ON/OFF business, by the CQB-LQF algorithms that inventive algorithm provides and SBF-GWF algorithms, point of the FIFO algorithms of OQ structures The contrast of group average delay, wherein SBF-GWF are performance in the above mentioned existing mono- packet crossbuffer structures of CICQ More prominent algorithm.Simulation result is shown under smooth traffic, and three kinds of algorithm performances are suitable.And in heterogeneous traffic especially Under high load condition, the average delay performance of CQB-LQF algorithms has compared to SBF-GWF algorithms and protruded more close to OQ structures Advantage.

Claims (1)

1. a kind of joint input crossover node is lined up (Combined Input-Crosspoint-Queued, CICQ) fabric switch Machine is grouped input scheduling method, it is characterized in that：

First step initial port set；

When each time slot starts, output port set OP is made to include all output ports, input port set IP includes all defeated Inbound port；

Second step judges whether scheduling terminates；

If OP is sky, the time slot input scheduling terminates；

3rd step selects output port to be matched；

Since the output port that po is pointed to, first B is selected in OP_jMinimum output port j, and it is next that po is pointed into its The position of individual output port；

Wherein B_jOutput port j crossbar queue lengths are represented, po is the priority pointer of output port, and it is entirely being adjusted No. 1 output port is pointed to when spending initial；

4th step examines whether the output port of selection has suitable input port matching；

If EIP_jWith IP common factor WEIP_jFor sky, output port j is rejected from OP, returns to second step；

Make CB_ijRepresent to intersect caching (crossbuffer) corresponding to input port i and output port j, above EIP_jRepresent full Sufficient VOQ_ijIt is not empty and CB_ijFor all input port i of sky set；

Wherein VOQ_ijThe caching of output port j packet is gone in storage in expression input port i；

5th step for etc. output port to be matched select suitable input port matching

Since the input port that pi is pointed to, in WEIP_jFirst entry of middle selection_iMinimum input port i, and pi is pointed to The position of its next input port, by VOQ_ijHead cell be sent to CB_ijIn；

Wherein entry_iRepresent the non-NULL VOQ number of queues that includes of input port i, pi is the priority pointer of input port, its No. 1 input port is pointed to when entirely dispatching initial；

6th step rejects the input port matched, updates the intersection length of buffer queue of the output port matched；

By B_jAdd 1, input port i is rejected from IP, update EIP_jWith all WEIP, the 3rd step is returned to.