CN105406752A - Control system for I-type and T-type three-level bidirectional PWM (Pulse-Width Modulation) rectifiers - Google Patents

Abstract

The invention relates to the field of electronic power control, in particular to a control system for I-type and T-type three-level bidirectional PWM (Pulse-Width Modulation) rectifiers. The control system comprises an analog quantity data collecting and conditioning circuit, an IGBT (Insulated Gate Bipolar Translator) magnetic insulation drive circuit, a control circuit consisting of a DSP (Digital Signal Processor) and a CPLD (Complex Programmable Logic Device), a relay output and digital signal input device, and a fault recording and remote communication device, and is characterized in that a Hall sensor data collecting circuit, an IGBT drive circuit and an input and output interface circuit are connected with a CPLD chip; a communication circuit and a fault recording circuit are connected with the DSP; and the DSP and the CPLD are connected with interrupt signals through data, an address bus and a PWM output signal. The control system can be compatible with T-type and T-type three-level topology frameworks, the control system adopts a control framework of the DSP and the CPLD, and the CPLD is responsible for logic control, three-level PWM signal detection and correction functions and the like as a coprocessor, so that the system reliability is improved, and the budget burden of the DSP is alleviated.

Description

A control system of I-type and T-type three-level bidirectional PWM rectifier

technical field

The invention relates to the field of electronic power control, in particular to an I-type and T-type three-level bidirectional PWM rectifier control system.

Background technique

With the increasing number of distributed energy equipment connected to the grid and the rapid development of smart grids, distributed power generation equipment such as photovoltaic inverters and wind power converters are connected to the grid; charging piles for new energy vehicles need AC voltage conversion first The DC voltage enters the DCDC control link; the above equipment requires a PWM inverter or rectifier. The PWM rectifier with bidirectional flow not only exhibits AC/DC conversion characteristics (rectification), but also exhibits DC/AC conversion characteristics (active inverter), so to be precise, this type of PWM rectifier is actually a A new type of reversible PWM converter. The three-level topology is divided into I-type three-level topology and T-type three-level topology. Among them, the withstand voltage of the four switching tubes of the I-type three-level can be lower than the DC bus voltage, while the T-type three-level external The withstand voltage of the tube must be greater than the bus voltage. The two topologies can use a common PWM pulse sending program, so the controller can be integrated and unified. PWM rectifier control requires complex mathematical operations. Traditional inverters mostly use a single DSP structure, which has the disadvantages of relatively slow operation speed and untimely dynamic response, and cannot meet the needs of increasingly complex control algorithms. The I-type T-type three-level topology has higher requirements on the input pulse timing. The I-type switch state table is shown in Table 1, and the T-type switch state table is shown in Table 2.

Table 1 I-type three-level switch state table

Table 2 T-type three-level switch state table

Contents of the invention

The object of the present invention is exactly to above-mentioned technical problem, designs a kind of I type and T type three-level two-way PWM rectifier control system, can be compatible with I type and T type two kinds of three level circuits, can carry out complex mathematical operation, can Perform PWM pulse detection and correction to realize high-performance control and interface functions.

Technical problem of the present invention is mainly solved by following technical scheme:

An I-type and T-type three-level bidirectional PWM rectifier control system, including analog data acquisition and conditioning circuit, IGBT magnetic isolation drive circuit, control circuit composed of DSP and CPLD, relay output and digital signal input, fault recording and The remote communication is characterized in that the hall sensor data acquisition circuit, the IGBT drive circuit, the input and output interface circuit are connected to the CPLD chip, the communication circuit and the fault recording circuit are connected to the DSP, and the DSP and the CPLD are connected through the data, address bus, PWM The output signal is connected to the interrupt signal.

The analog quantity acquisition circuit includes a signal conditioning circuit and an analog-to-digital conversion chip AD7606. The input signal of the signal conditioning circuit comes from the current Hall sensor and the differential voltage measurement circuit, and the output of the signal conditioning circuit is connected with the analog signal input terminal of the analog-to-digital conversion chip AD7606. The Hall sensor usually includes three current sensors used to measure the output of the inverter, and uses a voltage divider resistor and an operational amplifier to collect AC voltage and DC bus voltage in a differential manner.

The IGBT drive circuit uses 12 1ED020I12 magnetically isolated drive chips from Infineon Company. The input of the drive circuit is directly connected to the corrected PWM pulse of the CPLD. connected.

The fault recording circuit is composed of a USB interface circuit, an SD card interface circuit, and a USB interface control chip. The CH376 chip of Nanjing Qinheng Electronics is used to connect with the USB and DSP. The DSP refreshes and stores the sampled data in real time. , the data of 100mS before and after the fault can be separated through the USB interface chip.

The CPLD adopts Xilinx's high-performance CPLD chip XC95288XL, which has 5V input capability and can be used for level conversion between peripherals and DSP; on this chip, the hardware description language VHDL is used to realize DSP output PWM pulse detection and correction, input and output Logic expansion, fail-safe control and digital filtering functions.

The DSP uses TI's TMS320F28346 floating-point DSP controller as the main controller chip to complete the three-level PWM pulse control logic, the voltage-dividing capacitor neutral point balance control algorithm, communication control, fault recording and grid voltage phase-locked loop and DC and AC double closed-loop control algorithm.

The CPLD detects the three-level control pulse output by the DSP. For the I-type three-level circuit, if the pulse belongs to the potential risk state or damage state in Table 1, the CPLD will replace the pulse and then output it to the IGBT driver board, and Send an alarm signal to the DSP, taking 1000 as an example, if the CPLD detects that the PWM pulse output by the DSP is 1000, the CPLD will update the pulse to 0100; for the T-type three-level circuit, if the pulse belongs to the damaged state in Table 2, the CPLD Replace the pulse and then output it to the IGBT driver board, and send an alarm signal to the DSP. Take 1001 as an example. If the CPLD detects that the PWM pulse output by the DSP is 1001, the CPLD will update the pulse to 1000. After the replacement, correct the switch The tube state is the least used as the pulse modification criterion.

The beneficial effects of the present invention are: it can be compatible with T-type and I-type three-level topological architectures, the control system adopts the control architecture of DSP and CPLD, and CPLD is responsible for logic control, three-level PWM signal detection and correction functions as a coprocessor Etc., improved system reliability, reduced the budgetary burden of DSP. As the main processor, DSP is responsible for the real-time calculation of complex control algorithms. This control system can run complex grid-connected control programs, improve the real-time performance and stability of the inverter, and improve the EMI characteristics of the inverter system, which has important practical application significance .

Description of drawings

Fig. 1 is a block diagram of the control system of the present invention.

detailed description

The technical solution of the present invention will be further specifically described below through the embodiments and in conjunction with the accompanying drawing 1 .

An I-type and T-type three-level bidirectional PWM rectifier control system, including analog data acquisition and conditioning circuit, IGBT magnetic isolation drive circuit, control circuit composed of DSP and CPLD, relay output and digital signal input, fault recording and Remote communication, characterized in that Hall sensor data acquisition circuit, IGBT drive circuit, input and output interface circuit are connected with CPLD chip, communication circuit and fault recording circuit are connected with DSP, and DSP and CPLD are output through data, address bus and PWM The signal is connected to the interrupt signal.

The analog quantity acquisition circuit consists of a Hall current sensor output conditioning circuit, a differential voltage acquisition and conditioning circuit and an analog-to-digital conversion chip AD7606. The output of the signal conditioning circuit is connected with the analog input interface of AD7606, and the AD7606 chip converts the analog signal into a digital signal, and inputs the sampled value into the DSP through the data bus.

After the DSP performs the zero-drift filtering algorithm and the three-phase phase-locked loop algorithm on the sampled data, the pre-processed three-phase grid voltage, inverter output current, DC side voltage, and phase information of the grid voltage are obtained. The side voltage information completes the neutral point balance calculation, and the DSP performs positive and negative sequence decoupling control and active and reactive power decoupling control on the three-phase grid voltage sensor information and the inverter output current sensor information, and completes the grid-connected control algorithm to obtain Value and phase information of the three-phase inverter output voltage signal; the signal is then subjected to the SVPWM algorithm to obtain vector sector, small triangle area, action time and other data; DSP uses the built-in EPWM module to generate T-type and I-type three-level compatible PWM signal. The PWM signal output by the DSP is connected to the IGBT magnetic isolation drive circuit after passing through the detection and correction circuit of the CPLD.

The CPLD receives the switch-in signal and the fault signal input and converts them into two 16-bit data and transmits them to the DSP through the data bus. The CPLD performs logic control on the IGBT fault signal, and is connected to the interrupt interface of the DSP through the IO port.

When the inverter fails, the DSP can write the grid voltage waveform 120s before and 120s after the fault, the inverter output current waveform, and the intermediate variables of the inverter control system through the USB drive circuit through the fault recording circuit. to the external U disk and SD card; and read the fault data to the host computer through the USB interface memory for fault analysis.

The CPLD detects the three-level control pulse output by the DSP. For the I-type three-level circuit, if the pulse belongs to the potential risk state or damage state in Table 1, the CPLD will replace the pulse and then output it to the IGBT driver board, and Send an alarm signal to the DSP, taking 1000 as an example, if the CPLD detects that the PWM pulse output by the DSP is 1000, the CPLD will update the pulse to 0100; for the T-type three-level circuit, if the pulse belongs to the damaged state in Table 2, the CPLD Replace the pulse and then output it to the IGBT driver board, and send an alarm signal to the DSP. Take 1001 as an example. If the CPLD detects that the PWM pulse output by the DSP is 1001, the CPLD will update the pulse to 1000. After the replacement, correct the switch The tube state is the least used as the pulse modification criterion.

This embodiment is only an exemplary embodiment of the present invention. For those skilled in the art, on the basis of the application methods and principles disclosed in the present invention, it is easy to make various types of improvements or deformations, and is not limited to this embodiment. Inventing the method or structure described in the above-mentioned specific embodiment, so the above-described method is only a preferred solution, and does not have a restrictive meaning. All equivalent changes and modifications made according to the present invention are included in the claims of the present invention. within the scope of protection.

Claims (7)

1. an I type and the two-way PWM rectifier control system of T-shaped three level, comprise analog data collection and modulate circuit, IGBT magnetic isolation drive circuit, the control circuit that dsp chip and CPLD chip form, relay exports and inputs with digital signal, failure wave-recording and telecommunication circuit, it is characterized in that, data acquisition and modulate circuit, IGBT magnetic isolation drive circuit, input and output interface circuit is connected with CPLD chip, failure wave-recording is connected with dsp chip with telecommunication circuit, dsp chip and CPLD chip pass through data, address bus, PWM output signal is connected with interrupt signal.

2. a kind of I type according to claim 1 and the two-way PWM rectifier control system of T-shaped three level, is characterized in that, the pulse detection in change CPLD chip and correction program, respectively control TNPC and NPC two kinds of three-level topology structures.

3. a kind of I type according to claim 1 and the two-way PWM rectifier control system of T-shaped three level; it is characterized in that; described CPLD chip is 5V input; for level conversion before peripheral hardware and DSP, this chip uses Hardware Description Language VHDL realize the detection of dsp chip output pwm pulse and control and digital filtering function with correction, input and output logical extension, error protection.

4. a kind of I type according to claim 3 and the two-way PWM rectifier control system of T-shaped three level, it is characterized in that, described pulse detection is for the special pulse request of TNPC/NPC type three level pulse with correcting function, pwm pulse DSP being outputted to IGBT drive plate carries out logic detection, is revised by pwm pulse in time when there is potential risk pulse and bursts of error.

5. a kind of I type according to claim 1 and the two-way PWM rectifier control system of T-shaped three level, it is characterized in that, described telecommunication circuit adopts RS232, R485, CAN and ethernet redundancy design, and carries out communication by MODBUSRTU in MODBUSTCP mode.

6. a kind of I type according to claim 1 and the two-way PWM rectifier control system of T-shaped three level, it is characterized in that, described dsp chip adopts Floating-point DSP controller as master controller chip, completes three-level pwm Pulse Width Control logic, derided capacitors neutral point balancing control algorithm, Control on Communication, failure wave-recording and line voltage phase-locked loop and direct current and exchanges double-closed-loop control algorithm.

7. a kind of I type according to claim 1 and the two-way PWM rectifier control system of T-shaped three level, is characterized in that, described IGBT magnetic isolation drive circuit adopts Magnetic isolation driving chip.