CN105390479A - Tamper-proofing wiring structure for security chip - Google Patents
Tamper-proofing wiring structure for security chip Download PDFInfo
- Publication number
- CN105390479A CN105390479A CN201510731416.5A CN201510731416A CN105390479A CN 105390479 A CN105390479 A CN 105390479A CN 201510731416 A CN201510731416 A CN 201510731416A CN 105390479 A CN105390479 A CN 105390479A
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- China
- Prior art keywords
- tamper
- metal structure
- layer
- shielding conductor
- supply network
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
- H01L23/573—Protection from inspection, reverse engineering or tampering using passive means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
Abstract
The invention discloses a tamper-proofing wiring structure for a security chip, which comprises at least one tamper-proofing basic unit. The tamper-proofing basic unit is formed by four layers of metal structures arranged in an overlapped mode from top to bottom; the first metal structure layer and the third metal structure layer are internally provided with power network wires; and the second metal structure layer and the fourth metal structure layer are internally provided with tamper-proofing shielding wires. Multiple tamper-proofing basic units are tiled and combined with the minimal metal distance. A buffer can be inserted in adjacent tamper-proofing basic units. The tamper-proofing network and the power supply network are combined together reasonably and safely, the power supply network can bear large current, and the tamper-proofing network can protect the entire chip safely and effectively.
Description
Technical field
The present invention relates to chip secure technical field, particularly relate to a kind of anti-tamper wire structures preventing assailant from maliciously being detected by means such as FIB, revise safety chip internal circuit configuration.
Background technology
Safety chip stores the confidential information of client usually, such as bank card password, finger print information, Digital Television payment information etc., and therefore the fail safe of this kind of chip just seems extremely important.
For these key messages, logically safety chip uses DES usually, and the cryptographic algorithm such as AES, RSA encrypt and decrypt; And on physical Design level, generally adopt complicated metal routing to cover the mode on chip top layer, judge whether that chip is tampered by detecting these metal routings.The physics Wiring structure of this complexity, is often called as " dragon design " structure.
When chip-scale is smaller time, such as some bank cards, fiscard, the chip of identification card class, anti-tamper dragon design structure can directly overlay the top layer of chip, supply network is placed on bottom, and two kinds of networks use layer of metal just can meet the electrical specification requirement of chip separately, and the physical design of dragon design is relatively easy; When chip-scale is larger time, such as except some common encryption and decryption functions, also may be responsible for the chip of the functions such as Video processing, the power consumption of this chip is relatively large, must have the supply network that strong.And build a strong supply network, generally all require that power/ground network uses two thickness metals, to meet the horizontal and vertical voltage drop requirement of chip (when chip normally works simultaneously, the scope that supply voltage declines, General Requirements can not be greater than 10% of supply voltage, otherwise devices function is abnormal).By process technology limit, thick metal be generally distributed in chip above which floor, this and tamperproof circuit use the traditional method of top-level metallic to produce conflict.Therefore in large-scale safety chip, due to a strong supply network will be built, a new demand is proposed to anti-tamper physical Design, must by these two kinds of networks rationally the combining of safety again, make both can play respective effect, do not interacted again.
In this external large-scale safety chip, because area is larger, anti-tamper cabling can not be long, otherwise be easy in the process of chip manufacturing, " antenna " effect occurs (to be referred in the process of chip production, after long metal routing collects excessive electronics, easily puncture fragile grid, affect a kind of phenomenon of chip yield).Therefore, also must to consider how to use limited physical length cabling, the restriction of antenna effect can be overcome, comprehensively can cover again the surface of chip.
Summary of the invention
For solving the problems of the technologies described above; the present invention proposes a kind of anti-tamper wire structures for safety chip; the reasonable safety again of this anti-tamper wire structures anti-tamper network and supply network are combined; supply network can bear large electric current, and anti-tamper network security effectively protects whole chip.
The technical solution used in the present invention is, design a kind of anti-tamper wire structures for safety chip, comprise: at least one anti-tamper elementary cell, this anti-tamper elementary cell is made up of four layers of metal structure of top-down stacked setting, be provided with power supply network winding thread in first layer metal structure and third layer metal structure, in second layer metal structure and the 4th layer of metal structure, be provided with anti-tamper shielding conductor.
The mutual square crossing of power supply network winding thread projection at grade in the power supply network winding thread of first layer metal structure and third layer metal structure, the anti-tamper shielding conductor in described four-layer structure is positioned at the below of the power supply network winding thread crossover location of the first metal layer and the 3rd metal level.
Third layer metal structure is also provided with anti-tamper shielding conductor, and the anti-tamper shielding conductor in third layer is perpendicular to the power supply network winding thread in third layer.Anti-tamper shielding conductor projection at grade in the structural anti-tamper shielding conductor of second layer metal and third layer metal structure intersects mutually.
The anti-tamper shielding conductor square crossing of a part in the structural anti-tamper shielding conductor of second layer metal and third layer metal structure, the structural anti-tamper shielding conductor of described second layer metal tilts to intersect with 45 ° with the anti-tamper shielding conductor of the remainder in third layer metal structure.
Multiple described anti-tamper elementary cell carries out tiling combination with minimum metal spacing.Can Buffer insertion between adjacent anti-tamper elementary cell.
Compared with prior art, anti-tamper shielding conductor and power supply network winding thread cross one another, cover mutually by the present invention, anti-tamper shielding conductor is provided with above and below power supply network winding thread, first tamper-evident structure does not affect supply network structure, the structure of this nested setting effectively reduces the area of anti-tamper elementary cell, can call more basic screen unit in chip of the same area, the metal level that supply network is used is very intensive.In addition, supply network does not also affect tamper-evident structure, and anti-tamper elementary cell have employed four layers of cabling, and anti-tamper shielding conductor make use of remaining interconnection resource, still all can cover the surface of chip, comprise the region of supply network.Further, for the problem of track lengths restriction, multiple anti-tamper elementary cell combination coupled together, the physics cabling of formation can cover and protect the chip of arbitrary area and shape.
Accompanying drawing explanation
Below in conjunction with embodiment and accompanying drawing, the present invention is described in detail, wherein:
Fig. 1 is the schematic wiring diagram of anti-tamper elementary cell;
Fig. 2 is the schematic wiring diagram of first layer metal structure;
Fig. 3 is the schematic wiring diagram of second layer metal structure;
Fig. 4 is the schematic wiring diagram of third layer metal structure;
Fig. 5 is the schematic wiring diagram of the 4th layer of metal structure;
Fig. 6 is the schematic wiring diagram of multiple anti-tamper elementary cell combination.
Embodiment
As shown in Figure 1, the anti-tamper wire structures that the present invention proposes, comprise: at least one anti-tamper elementary cell 201, this anti-tamper elementary cell 201 is made up of four layers of metal structure of top-down stacked setting, first layer metal structure and third layer metal structure are provided with power supply network winding thread, and second layer metal structure and the 4th layer of metal structure are provided with anti-tamper shielding conductor.The overall metal structure level number of safety chip does not limit, and anti-tamper elementary cell is arranged in four layers of metal structure of safety chip top, and the sensitive circuit with customer information is arranged in the metal structure below anti-tamper elementary cell.
Wherein, as shown in Fig. 1,2,4, the mutual square crossing of power supply network winding thread 104 projection at grade in the power supply network winding thread 101 of first layer metal structure and third layer metal structure, forms the supply network of safety chip.
As shown in Fig. 1,3,4, third layer metal structure is also provided with anti-tamper shielding conductor, the anti-tamper shielding conductor 103 in third layer is perpendicular to the power supply network winding thread 104 in third layer.Anti-tamper shielding conductor 103 projection at grade in the structural anti-tamper shielding conductor 102 of second layer metal and third layer metal structure intersects mutually.Anti-tamper shielding conductor 106 in four-layer structure is positioned at the below of the power supply network winding thread 101 of the first metal layer and power supply network winding thread 104 crossover location 105 of the 3rd metal level, and the anti-tamper shielding conductor in second layer metal structure, third layer metal structure and the 4th layer of metal structure forms the tamper-evident structure of safety chip.
Preferably, the structural anti-tamper shielding conductor 102 of second layer metal and a part anti-tamper shielding conductor 103 square crossing in third layer metal structure, because chip is all generally rectangle, power supply from four limits to chip power supply, in order to ensure that the horizontal and vertical of chip has smaller voltage drop, supply network preferably has the orthogonal alternate covering of double layer of metal at chip surface.The structural anti-tamper shielding conductor 102 of second layer metal tilts to intersect with 45 ° with the anti-tamper shielding conductor 103 of the remainder in third layer metal structure, cabling under normal circumstances in metal structure is horizontal and vertical cabling, can cover the more line in below so anti-tamper shielding conductor adopts 45 ° to be obliquely installed.
Tamper-evident structure and supply network cross one another, cover mutually, prevent assailant from crossing tamper-evident structure and detect sensitive circuit below anti-tamper elementary cell.First tamper-evident structure does not affect supply network structure, tamper-evident structure setting nested with supply network, effectively reduce the area of elementary cell, more elementary cell can be called in chip of the same area, the metal level that supply network is used is very intensive, and the circulation path of electric current is many, and during power supply, electric current can enter from the surrounding of chip, each device of smooth arrival, to ensure the power good supply of each device.When reality uses, the width of power supply network winding thread in elementary cell can also be changed, optimize voltage drop further, form a strong electric power network, solve the voltage drop problem in monster chip.In addition, supply network does not also affect tamper-evident structure, and anti-tamper elementary cell have employed four layers of cabling, and tamper-evident structure make use of remaining interconnection resource, can cover whole chip surfaces in the region comprising supply network.When the width of power supply network winding thread broadens, for below it and the anti-tamper shielding conductor of top also can adaptive increase some, the therefore sensitive circuit protected below elementary cell of safety.
Further, according to the difference of chip area, multiple anti-tamper elementary cell 201 can be called and carry out tiling connection, intermetallic distance minimally between adjacent anti-tamper elementary cell 201, cover the circuit surface of full chip or sensitivity, the physics defining some walks spider lines, just can judge whether that event of distorting occurs by the integrality detecting these networks.After anti-tamper elementary cell 201 combines, the power supply network winding thread serial connection in adjacent anti-tamper elementary cell, forms the supply network 202 of grid cabling, is powered, not by the impact of tamper-evident structure directly to the standard cell of below or device by this supply network.
Further, the buffer 203 that radom insertion quantity is indefinite, driving force is indefinite between adjacent anti-tamper basic screen unit 201, just can overcome the antenna effect on manufacture technics, and owing to physically having done random partition process to cabling, add the difficulty that assailant analyzes anti-tamper cabling logic.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (7)
1. the anti-tamper wire structures for safety chip, it is characterized in that comprising: at least one anti-tamper elementary cell, this anti-tamper elementary cell is made up of four layers of metal structure of top-down stacked setting, be provided with power supply network winding thread in first layer metal structure and third layer metal structure, in second layer metal structure and the 4th layer of metal structure, be provided with anti-tamper shielding conductor.
2. anti-tamper wire structures as claimed in claim 1, it is characterized in that, the power supply network winding thread of first layer metal structure and the mutual square crossing of power supply network winding thread projection at grade of third layer metal structure, the anti-tamper shielding conductor of described 4th layer of metal structure is positioned at the below of the power supply network winding thread crossover location of the first metal layer and the 3rd metal level.
3. anti-tamper wire structures as claimed in claim 2, is characterized in that, described third layer metal structure is also provided with anti-tamper shielding conductor, and the anti-tamper shielding conductor in third layer is perpendicular to the power supply network winding thread in third layer.
4. anti-tamper wire structures as claimed in claim 3, is characterized in that, the anti-tamper shielding conductor projection at grade in the structural anti-tamper shielding conductor of described second layer metal and third layer metal structure intersects mutually.
5. anti-tamper wire structures as claimed in claim 4, it is characterized in that, the anti-tamper shielding conductor square crossing of a part in the structural anti-tamper shielding conductor of described second layer metal and third layer metal structure, the structural anti-tamper shielding conductor of described second layer metal tilts to intersect with 45 ° with the anti-tamper shielding conductor of the remainder in third layer metal structure.
6. the anti-tamper wire structures as described in any one of claim 1 to 5, is characterized in that, multiple described anti-tamper elementary cell carries out tiling combination with minimum metal spacing.
7. anti-tamper wire structures as claimed in claim 6, is characterized in that, can Buffer insertion between adjacent anti-tamper elementary cell.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510731416.5A CN105390479B (en) | 2015-11-03 | 2015-11-03 | A kind of anti-tamper wire structures for safety chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510731416.5A CN105390479B (en) | 2015-11-03 | 2015-11-03 | A kind of anti-tamper wire structures for safety chip |
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| CN105390479A true CN105390479A (en) | 2016-03-09 |
| CN105390479B CN105390479B (en) | 2018-04-06 |
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| CN201510731416.5A Active CN105390479B (en) | 2015-11-03 | 2015-11-03 | A kind of anti-tamper wire structures for safety chip |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112182667A (en) * | 2020-10-14 | 2021-01-05 | 大唐微电子技术有限公司 | Multilayer metal protection structure, security chip and method for realizing chip protection |
| CN115513145A (en) * | 2022-11-17 | 2022-12-23 | 灿芯半导体(上海)股份有限公司 | Peep-proof, tamper-proof and low-power-consumption shielding cover |
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| CN2881758Y (en) * | 2005-09-09 | 2007-03-21 | 深圳兆日技术有限公司 | Protection structure for credible platform module chip get distructive attack |
| CN102184270A (en) * | 2010-11-24 | 2011-09-14 | 天津蓝海微科技有限公司 | Automatic generation method for layout protection circuit of safety chip |
| CN202855734U (en) * | 2012-10-23 | 2013-04-03 | 北京同方微电子有限公司 | Active protector used for intelligent card |
| CN103646137A (en) * | 2013-12-03 | 2014-03-19 | 北京中电华大电子设计有限责任公司 | Method for designing high-safety chip active shielding physical protection structure |
| CN104883809A (en) * | 2015-05-15 | 2015-09-02 | 福建联迪商用设备有限公司 | Protection method for PCB safety circuit |
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2015
- 2015-11-03 CN CN201510731416.5A patent/CN105390479B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN2881758Y (en) * | 2005-09-09 | 2007-03-21 | 深圳兆日技术有限公司 | Protection structure for credible platform module chip get distructive attack |
| CN102184270A (en) * | 2010-11-24 | 2011-09-14 | 天津蓝海微科技有限公司 | Automatic generation method for layout protection circuit of safety chip |
| CN202855734U (en) * | 2012-10-23 | 2013-04-03 | 北京同方微电子有限公司 | Active protector used for intelligent card |
| CN103646137A (en) * | 2013-12-03 | 2014-03-19 | 北京中电华大电子设计有限责任公司 | Method for designing high-safety chip active shielding physical protection structure |
| CN104883809A (en) * | 2015-05-15 | 2015-09-02 | 福建联迪商用设备有限公司 | Protection method for PCB safety circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112182667A (en) * | 2020-10-14 | 2021-01-05 | 大唐微电子技术有限公司 | Multilayer metal protection structure, security chip and method for realizing chip protection |
| CN115513145A (en) * | 2022-11-17 | 2022-12-23 | 灿芯半导体(上海)股份有限公司 | Peep-proof, tamper-proof and low-power-consumption shielding cover |
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| Publication number | Publication date |
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| CN105390479B (en) | 2018-04-06 |
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Address after: 22A, Guoshi building, 1801 Shahe West Road, high tech Zone, Yuehai street, Nanshan District, Shenzhen City, Guangdong Province Patentee after: Guowei group (Shenzhen) Co., Ltd. Address before: 518000 Guangdong city of Shenzhen province Nanshan District high tech Industrial Park South high SSMEC building two floor Patentee before: Guowei Teih Co., Ltd., Shenzhen |
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