CN105372471A - Amplitude detection method and amplitude detection system for sine signal - Google Patents

Amplitude detection method and amplitude detection system for sine signal Download PDF

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CN105372471A
CN105372471A CN201510400897.1A CN201510400897A CN105372471A CN 105372471 A CN105372471 A CN 105372471A CN 201510400897 A CN201510400897 A CN 201510400897A CN 105372471 A CN105372471 A CN 105372471A
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frequently
sequence
frequency
phase
score value
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CN105372471B (en
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徐庆伟
李鑫亮
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Shenzhen Kerunbao Industrial Co Ltd
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Shenzhen Kerunbao Industrial Co Ltd
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Abstract

The invention relates to an amplitude detection method and an amplitude detection system for a sine signal. The method comprises the following steps: truncating a sampled signal sequence to obtain a truncated signal sequence; respectively multiplying the cosine function of a measured reference frequency and the sine function of the reference frequency by the signal sequence and the truncated signal sequence to generate two sets of real-frequency vector sequences and virtual-frequency vector sequences; digitally trapping the two sets of real-frequency vector sequences and virtual-frequency vector sequences to generate two sets of imaginary vector trap sequences and real vector trap sequences, and generating two sets of imaginary vector integral values and real vector integral values through integration; converting the two sets of imaginary vector integral values and real vector integral values into a sequence amplitude and two phases, and extending the two phases to obtain extended phases; converting the two extended phases into a frequency difference; and converting the sequence amplitude and the frequency difference into the fundamental amplitude of the sine signal. By implementing the method and the system of the invention, fundamental amplitude of high accuracy can be obtained.

Description

The amplitude detection method and system of sinusoidal signal
Technical field
The present invention relates to technical field of electric power, particularly relate to a kind of amplitude detection method and system of sinusoidal signal.
Background technology
The frequency measurement, phase measurement, amplitude measurement etc. of electric system are the measurement of sinusoidal signal parameter in itself.Fourier transform is the basic skills realizing sinusoidal signal parameter measurement, is widely used in electric system.But along with the development of sine parameter measuring technique, Fourier transform Problems existing is also more aobvious outstanding, and it is difficult to the requirement meeting the calculating of electric system offset of sinusoidal parameter pin-point accuracy further.
In the parameter measurement of electric system sinusoidal signal, also has the measurement method of parameters that some improve, as zero hands over method, based on the mensuration of filtering, based on Wavelet Transform, based on the mensuration of neural network, the mensuration etc. based on DFT conversion.But the measuring accuracy of the above method to low frequency signal (such as, the specified power frequency of operation of power networks is near 50Hz) is low, and anti-harmonic wave and noise poor.
Summary of the invention
Technical matters to be solved by this invention is, provides a kind of amplitude detection method of sinusoidal signal, and it is high to the amplitude measurement precision of the Low Frequency Sine Signals of electric system, and anti-harmonic wave and noise good.
For solving the problems of the technologies described above, the present invention adopts following technical scheme:
An amplitude detection method for sinusoidal signal, comprises the following steps:
According to the lower limit of sinusoidal signal frequency scope and default sample frequency and preset signals periodicity, obtain preliminary sample sequence length;
According to described preliminary sample sequence length, described sinusoidal signal is tentatively sampled, obtain the preliminary sample sequence of described sinusoidal signal;
Frequency preliminary survey is carried out to described preliminary sample sequence, generates the first synchronizing frequency of described sinusoidal signal, with the described just given reference frequency of synchronizing frequency;
The unit period sequence length of described sinusoidal signal is calculated according to default sample frequency and described reference frequency;
According to described preset signals periodicity and described unit period sequence length, obtain predetermined sequence length;
According to predetermined sequence length, from described preliminary sample sequence, obtain burst;
Brachymemma process is carried out to described burst, obtains truncated signal sequence;
Be multiplied with described burst respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generate the first real sequence vector frequently and the first empty sequence vector frequently;
Be multiplied with described truncated signal sequence respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generate the second real sequence vector frequently and the second empty sequence vector frequently;
Respectively digital notch is carried out to the described first real sequence vector frequently and the described first empty sequence vector frequently, generate the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Respectively integral operation is carried out to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently, generate the first real vector product score value frequently and the first empty vector product score value frequently;
Respectively digital notch is carried out to the described second real sequence vector frequently and the described second empty sequence vector frequently, generate the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Respectively integral operation is carried out to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently, generate the second real vector product score value frequently and the second empty vector product score value frequently;
According to the phase place preset and amplitude transformation rule, the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase and sequence amplitude;
According to the phase transition rule preset, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
According to the phase expansion rule preset, described first phase is expanded, obtain the first expansion phase place;
According to the phase expansion rule preset, described second phase is expanded, obtain the second expansion phase place;
According to the frequency difference transformation rule preset, be the frequency difference of described sinusoidal signal frequency and described reference frequency by described first expansion phase place and described second expansion phase transition;
According to the amplitude transformation rule preset, the frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency is converted to the fundamental voltage amplitude of described sinusoidal signal.
An amplitude detection system for sinusoidal signal, comprising:
Preliminary sequence length modules, for according to the lower limit of sinusoidal signal frequency scope and default sample frequency and preset signals periodicity, obtains preliminary sample sequence length;
Preliminary sampling module, for according to described preliminary sample sequence length, tentatively samples to described sinusoidal signal, obtains the preliminary sample sequence of described sinusoidal signal;
Frequency preliminary survey module, for carrying out frequency preliminary survey to described preliminary sample sequence, generates the first synchronizing frequency of described sinusoidal signal, with the described just given reference frequency of synchronizing frequency;
Periodic sequence module, for calculating the unit period sequence length of described sinusoidal signal according to default sample frequency and described reference frequency;
Sequence length module, according to described preset signals periodicity and described unit period sequence length, obtains predetermined sequence length;
Burst module, for according to described predetermined sequence length, from described preliminary sample sequence, obtains burst;
Truncated sequence module, for carrying out brachymemma process to described burst, obtains truncated signal sequence;
First frequency mixing module, for being multiplied with described burst respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generates the first real sequence vector frequently and the first empty sequence vector frequently;
Second frequency mixing module, for being multiplied with described truncated signal sequence respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generates the second real sequence vector frequently and the second empty sequence vector frequently;
First trap module, for carrying out digital notch to the described first real sequence vector frequently and the described first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
First integral module, for carrying out integral operation to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently;
Second trap module, for carrying out digital notch to the described second real sequence vector frequently and the described second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Second integral module, for carrying out integral operation to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently;
First phase module, for according to the phase place preset and amplitude transformation rule, is converted to first phase and sequence amplitude by the described first empty vector product score value frequently and the described first real vector product score value frequently;
Second phase module, for according to described default phase transition rule, is converted to second phase by the described second empty vector product score value frequently and the described second real vector product score value frequently;
First phase expansion module, for according to the phase expansion rule preset, expands to the first expansion phase place by described first phase;
Second phase expansion module, for according to the phase expansion rule preset, expands to the second expansion phase place by described second phase;
First phase expansion module, for according to the phase expansion rule preset, expands to the first expansion phase place by described first phase;
Second phase expansion module, for according to the phase expansion rule preset, expands to the second expansion phase place by described second phase;
Described first expansion phase place and described second expansion phase transition, for according to the frequency difference transformation rule preset, are the frequency difference of described sinusoidal signal frequency and described reference frequency by frequency difference modular converter;
Amplitude modular converter, for according to the amplitude transformation rule preset, is converted to the fundamental voltage amplitude of described sinusoidal signal by the frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency.
The present invention's beneficial effect is compared with prior art: the amplitude detection method and system of above-mentioned sinusoidal signal, carries out brachymemma process, obtain truncated signal sequence to the burst of sampling gained; With the cosine function of survey reference frequency be multiplied with described truncated signal sequence with described burst respectively with the sine function of described reference frequency, generate two groups of real sequence vectors frequently and empty sequence vectors frequently; By to two groups of empty sequence vectors frequently and real sequence vector digital notch frequently, generate two groups of imaginary number vector trap sequences and real number vector trap sequence, and then integration generates two groups of imaginary number vector product score values and real number vector product score value; Again according to the phase transition rule preset, two groups of real number vector product score values and imaginary number vector product score value are converted to sequence amplitude and two phase places; Again two phase places are expanded, obtain expansion phase place; According to the frequency difference transformation rule preset, be the frequency difference of described sinusoidal signal frequency and described reference frequency by two expansion phase transition; According to the amplitude transformation rule preset, the frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency is converted to the fundamental voltage amplitude of described sinusoidal signal.
Because digital notch can be decayed rapidly input signal at some Frequency points, to reach the effect hindering this frequency signal to pass through, therefore, when the trap frequency point of this digital notch is set to corresponding mixing interfering frequency point, this digital notch has the inhibiting effect of the degree of depth to described mixing interfering frequency.So, adopt the amplitude detection method and apparatus of sinusoidal signal of the present invention, it is high to the amplitude measurement precision of Low Frequency Sine Signals, and anti-harmonic wave and noise good.
Accompanying drawing explanation
Fig. 1 is the amplitude detection method schematic flow sheet in some embodiments of sinusoidal signal of the present invention.
Fig. 2 is the amplitude detection system structural representation in some embodiments of sinusoidal signal of the present invention.
Fig. 3 is burst and the truncated signal sequence diagram of the amplitude detection method of sinusoidal signal of the present invention.
Fig. 4 is that the fundamental voltage amplitude of the amplitude detection system of sinusoidal signal of the present invention detects relative error experimental result schematic diagram.
Fig. 5 is quarter window function 1 profile of the amplitude detection system of sinusoidal signal of the present invention and the frequency domain characteristic schematic diagram of quarter window arithmetic mean trapper 1.
Fig. 6 is quarter window function 2 profile of the amplitude detection system of sinusoidal signal of the present invention and the frequency domain characteristic schematic diagram of quarter window arithmetic mean trapper 2.
Embodiment
In order to make the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, the present invention is described in further detail.
Although the step in the present invention arranges with label, and be not used in and limit the precedence of step, the order of step or the execution of certain step need based on other steps unless expressly stated, otherwise the relative rank of step is adjustable.
In certain embodiments, as shown in Figure 1, the amplitude detection method of sinusoidal signal comprises the following steps:
S101, according to the lower limit of sinusoidal signal frequency scope and default sample frequency and preset signals periodicity, obtains preliminary sample sequence length;
S102, according to described preliminary sample sequence length, tentatively samples to described sinusoidal signal, obtains the preliminary sample sequence of described sinusoidal signal;
S103 carries out frequency preliminary survey to described preliminary sample sequence, generates the first synchronizing frequency of described sinusoidal signal, with the described just given reference frequency of synchronizing frequency;
S104 calculates the unit period sequence length of described sinusoidal signal according to default sample frequency and described reference frequency;
S105, according to described preset signals periodicity and described unit period sequence length, obtains predetermined sequence length;
S106, according to predetermined sequence length, from described preliminary sample sequence, obtains burst;
S107 carries out brachymemma process to described burst, obtains truncated signal sequence;
S108 is multiplied with described burst with the sine function of described reference frequency respectively with the cosine function of described reference frequency, generates the first real sequence vector frequently and the first empty sequence vector frequently;
S109 is multiplied with described truncated signal sequence with the sine function of described reference frequency respectively with the cosine function of described reference frequency, generates the second real sequence vector frequently and the second empty sequence vector frequently;
S110 carries out digital notch to the described first real sequence vector frequently and the described first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
S111 carries out integral operation to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently;
S112 carries out digital notch to the described second real sequence vector frequently and the described second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
S113 carries out integral operation to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently;
Described first empty vector product score value frequently and the described first real vector product score value frequently, according to the phase place preset and amplitude transformation rule, are converted to first phase and sequence amplitude by S114;
Described second empty vector product score value frequently and the described second real vector product score value frequently, according to the phase transition rule preset, are converted to second phase by S115;
S116, according to the phase expansion rule preset, expands described first phase, obtains the first expansion phase place;
S117, according to the phase expansion rule preset, expands described second phase, obtains the second expansion phase place;
Described first expansion phase place and described second expansion phase transition, according to the frequency difference transformation rule preset, are the frequency difference of described sinusoidal signal frequency and described reference frequency by S118;
The frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency, according to the amplitude transformation rule preset, is converted to the fundamental voltage amplitude of described sinusoidal signal by S119.
Present embodiment, carries out brachymemma process to the burst of sampling gained, obtains truncated signal sequence; With the cosine function of survey reference frequency be multiplied with described truncated signal sequence with described burst respectively with the sine function of described reference frequency, generate two groups of real sequence vectors frequently and empty sequence vectors frequently; By to two groups of empty sequence vectors frequently and real sequence vector digital notch frequently, generate two groups of imaginary number vector trap sequences and real number vector trap sequence, and then integration generates two groups of imaginary number vector product score values and real number vector product score value; Again according to the phase transition rule preset, two groups of real number vector product score values and imaginary number vector product score value are converted to sequence amplitude and two phase places; Again two phase places are expanded, obtain expansion phase place; According to the frequency difference transformation rule preset, be the frequency difference of described sinusoidal signal frequency and described reference frequency by two expansion phase transition; According to the amplitude transformation rule preset, the frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency is converted to the fundamental voltage amplitude of described sinusoidal signal.
Because digital notch can be decayed rapidly input signal at some Frequency points, to reach the effect hindering this frequency signal to pass through, therefore, when the trap frequency point of this digital notch is set to corresponding mixing interfering frequency point, this digital notch has the inhibiting effect of the degree of depth to described mixing interfering frequency.So, adopt the amplitude detection method and apparatus of sinusoidal signal of the present invention, it is high to the amplitude measurement precision of Low Frequency Sine Signals, and anti-harmonic wave and noise good.
Afterwards if do not added explanation, the amplitude of described sinusoidal signal is all made a comment or criticism the fundamental voltage amplitude of string signal.
Wherein, for step S101, power system frequency scope, at 45Hz-55Hz, preferably, gets sinusoidal signal frequency lower limit f minfor 45Hz; Described preset signals periodicity C is set according to actual needs 2 π, preferably, described preset signals periodicity C 2 πround numbers.
In certain embodiments, C is got 2 πfor integer 12.
Preliminary sample sequence length computation, is formula (1):
N s t a r t = ( int ) C 2 π f n f min - - - ( 1 ) ;
In formula, N startfor described preliminary sequence length, unit dimensionless; (int) expression rounds; C 2 πfor described preset signals periodicity, unit dimensionless; f minfor the lower limit of sinusoidal signal frequency scope, unit Hz; f nfor described default sample frequency, unit Hz.
For step S102, described sinusoidal signal is tentatively sampled, obtain the preliminary sample sequence of described sinusoidal signal.To single fundamental frequency sinusoidal signal, the preliminary sample sequence obtaining described sinusoidal signal is formula (2):
T n = 1 f n - - - ( 2 ) ;
n=0,1,2,3,.....,N start-1
Wherein, X startn () is preliminary sample sequence; A is signal amplitude, unit v; ω is signal frequency, unit rad/s; T nfor sampling interval, unit s; f nfor described sample frequency, unit Hz; N is series of discrete number, unit dimensionless; for signal initial phase, unit rad; N startfor preliminary sample sequence length, unit dimensionless.
For step S103, by zero friendship method, based on the algorithm of filtering, based on Wavelet Transformation Algorithm, the algorithm based on neural network, the frequency algorithm based on DFT conversion or carry out frequency preliminary survey based on the frequency algorithm of phase differential to described preliminary sample sequence, obtain described just synchronizing frequency.
Described preliminary frequency is expressed as formula (3):
ω o(3);
Wherein, ω ofor first synchronizing frequency, unit rad/s;
Preferably, described reference frequency is expressed as formula (4):
ω s=ω o(4);
Wherein, ω sfor reference frequency, unit rad/s; ω ofor first synchronizing frequency, unit rad/s.
For step S104, calculate the unit period sequence length of described sinusoidal signal according to default sample frequency and described reference frequency:
In certain embodiments, the unit period sequence length of described sinusoidal signal calculates, and is formula (5):
N 2 π = ( int ) f n f s - - - ( 5 ) ;
f s = ω s 2 π
In formula, N 2 πfor described unit period sequence length, unit dimensionless; (int) be round numbers; f nfor default sample frequency, unit Hz; f sfor the reference frequency of Hz unit; ω sfor the reference frequency of rad/s unit.
There is the error in 1 sampling interval in described unit period sequence length integer.
For step S105, according to described preset signals periodicity and described unit period sequence length, obtain predetermined sequence length:
In certain embodiments, described predetermined sequence length is 12 times of described unit period sequence length, described predetermined sequence length computation, is formula (6):
N=(int)(C N )(6);
Wherein, N is predetermined sequence length, unit dimensionless; (int) be round numbers; N 2 πfor described unit period sequence length, unit dimensionless.Owing to there is error, the signal period integer that described predetermined sequence length comprises is about.
For step S106, according to predetermined sequence length, from described preliminary sample sequence, obtain burst:
In certain embodiments, the burst of described predetermined sequence length, is formula (7):
n=0,1,2,3,.....,N-1(7);
N<N start
Wherein, X in () is burst; X startn () is preliminary sample sequence; A is signal amplitude, unit v; ω is signal frequency, unit rad/s; T nfor sampling interval, unit s; N is series of discrete number, unit dimensionless; for signal initial phase, unit rad; N-signal sequence length, unit dimensionless, burst length equals described predetermined sequence length; N startfor preliminary sample sequence length, unit dimensionless.
The avatars of described burst, as shown in Figure 3.
For step S107, brachymemma process is carried out to described burst, obtains truncated signal sequence:
In certain embodiments, described truncated signal sequence length is 11.25 times of described unit period sequence length, and described truncated signal sequence length is calculated as formula (8):
N S=N-0.75N (8);
In formula, N sfor truncated signal sequence length, unit dimensionless; N is burst length, unit dimensionless; N 2 πfor signal unit periodic sequence length, unit dimensionless.Coefficient 0.75 represents 0.75 times that described brachymemma value is described unit period sequence length;
Preferably, described truncated signal sequence is expressed as formula (9):
n=0,1,2,3,.....,N s-1(9);
In formula, X 2n () is truncated signal sequence; N sfor truncated signal sequence length, unit dimensionless.
The avatars of described truncated signal sequence, as shown in Figure 3.
For step S108, preferably, the cosine function of described reference frequency and the sine function of described reference frequency can be respectively with described reference frequency be frequency, with T nfor sine function and the cosine function of spaced discrete variable.
In certain embodiments, be multiplied with described burst respectively with the sine function of described reference frequency with the cosine function of described reference frequency, obtain described first real sequence vector frequently and the described first empty sequence vector is frequently formula (10):
Wherein, R 1n () is the described first real sequence vector frequently; I 1n () is the described first empty sequence vector frequently; Ω is the frequency difference of signal frequency and reference frequency, unit rad/s; with for active constituent; with for mixing interfering frequency composition.
For step S109, be multiplied with described truncated signal sequence respectively with the sine function of described reference frequency with the cosine function of described reference frequency, obtain described second real sequence vector frequently and the described second empty sequence vector is frequently formula (11):
In formula, R 2n () is the described second real sequence vector frequently; I 2n () is the described second empty sequence vector frequently; Ω is the frequency difference of signal frequency and reference frequency, unit rad/s; with for active constituent; with for mixing interfering frequency.
For step S110, in the described first real sequence vector frequently and the described first empty sequence vector frequently, comprise mixing interfering frequency.When comprising flip-flop, subharmonic composition and subharmonic composition in input signal, described mixing interfering frequency will be more complicated, and these mixing interfering frequencies have a strong impact on accuracy in computation.Although window function and integral operation itself have good attenuation to mixing interfering frequency, do not have specific aim, can not produce the inhibiting effect of the degree of depth to the mixing interfering frequency of described complexity, the pin-point accuracy that can not meet parameter calculates needs.In order to suppress the impact of described mixing interfering frequency targetedly, digital trap can be carried out to this mixing interference, because digital notch can be decayed rapidly input signal at some Frequency points, to reach the effect hindering this frequency signal to pass through, therefore, when the trap frequency point of this digital notch is set to corresponding mixing interfering frequency point, this digital notch has inhibiting effect completely to described mixing interfering frequency.
Preferably, digital notch specifically adopts slip quarter window arithmetic mean trap, is added after being multiplied by quarter window function by several continuous discrete values again, then gets its arithmetic mean and exports as this trap value.Slip quarter window arithmetic mean trapper needs to arrange quarter window parameter, and described quarter window parameter specifically refers to the length N of the quarter window sequence of function w.In quarter window Parameter N wvalue is 3 times of signal period sequence length, can suppress the mixing interfering frequency that 1/3 subharmonic produces.In quarter window Parameter N wvalue is 4 times of signal period sequence length, can to direct current, 1/2 gradation, 1 time, 2 times, 3 times, 4 times, the mixing interfering frequency that produces such as 5 subharmonic suppresses.
Consider the factors such as physical presence error, as as described in parameter there is error within 1 sampling interval, in order to the degree of depth suppresses the impact of mixing interfering frequency, also can increase one-level slip rectangular window arithmetic mean trapper again, directly be added by several continuous discrete values, then get its arithmetic mean and export as this trap value.Slip rectangular window arithmetic mean trapper needs to arrange rectangular window parameter, and described rectangular window parameter specifically refers to the length N of rectangular window function sequence d.Rectangular window Parameter N dvalue is 1.5 times of signal period sequence length, can suppress the mixing interfering frequency that 1/3 subharmonic produces.And N dvalue is 2 times of signal period sequence length, can to direct current, 1/2 gradation, 1 time, 2 times, 3 times, 4 times, the mixing interfering frequency that produces such as 5 subharmonic suppresses.
Preferably, digital notch comprises secondary slip quarter window arithmetic mean trap and secondary slip rectangular window arithmetic mean trap, and this level Four digital notch formula can be formula (12):
X D ( n ) = 1 N D 2 &Sigma; n N D 2 - 1 2 N W 2 - 1 &Sigma; n N W 2 - 1 W 2 ( n ) &lsqb; 1 N D 1 &Sigma; n N D 1 - 1 2 N W 1 - 1 &Sigma; n N W 1 - 1 W 1 ( n ) X ( n ) &rsqb;
N D1=(int)(1.5N +0.5)
N D2=(int)(2N +0.5)
To X (n) n=0,1,2,3 ...., N-1
To W 1(n) n=0,1,2,3 ...., N w1-1
To W 2(n) n=0,1,2,3 ...., N w2-1
To X d(n) n=0,1,2,3 ...., N-N w1-N d1-N w2-N d2-1
In formula, X (n) is level Four digital notch list entries, list entries length N; X dn () is level Four digital notch output sequence, output sequence length N-N w1-N d1-N w2-N d2; W 1n () is trigonometric function 1, wherein peak of function is 1, and zero-frequency gain is 0.5; W 2n () is trigonometric function 2, wherein peak of function is 1, and zero-frequency gain is 0.5; N w1for quarter window parameter one, i.e. quarter window function 1 sequence length, unit dimensionless, requires as odd number, and to ensure that the profile of quarter window function is for isosceles triangle (as shown in Figure 5), (int) represents round numbers; N d1for rectangular window parameter one, i.e. rectangular window function 1 sequence length, unit dimensionless, (int) represents round numbers; N w2for quarter window parameter two, i.e. quarter window function 2 sequence length, unit dimensionless, requires as odd number, and to ensure that the profile of quarter window function is for isosceles triangle (as shown in Figure 6), (int) represents round numbers; N d2rectangular window parameter two, i.e. rectangular window function 2 sequence length, unit dimensionless, gives computing formula in formula, and (int) represents round numbers.
In certain embodiments, quarter window Parameter N w1value is 3 times of the unit period sequence length of described reference frequency, rectangular window Parameter N d1value is 1.5 times of the unit period sequence length of described reference frequency, quarter window Parameter N w2value is 4 times of the unit period sequence length of described reference frequency, rectangular window Parameter N d1value is 2 times of the unit period sequence length of described reference frequency.Level Four digital notch needs use 10.5 times of signal period sequence lengths.
To above-described embodiment, at fundamental frequency 100 π, the unit rad/s of described sinusoidal signal, obtain the frequency domain characteristic that quarter window arithmetic mean trap calculates device 1, as shown in Figure 5.Obtain the frequency domain characteristic that quarter window arithmetic mean trap calculates device 2, as shown in Figure 6.
Preferably, under described mixing interfering frequency composition is suppressed prerequisite completely, the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence are frequently (13):
To R 1(n) I 1(n) n=0,1,2,3 ...., N-1
To R d1(n) I d1(n) n=0,1,2,3 ...., N-N w1-N d1-N w2-N d2-1
In formula, R d1n () is the described first real vectorial trap sequence frequently; I d1n () is the described first empty vectorial trap sequence frequently; K (Ω) is for digital notch is in the dimensionless gain of frequency difference Ω; α (Ω) for digital notch is in the phase shift of frequency difference Ω, unit rad.
For step S111, preferably, integral operation is carried out by the integrator that those skilled in the art are usual.
Integral operation formula is (14):
n=0,1,2,3,.......,L1-1
L1=N-N W1-N D1-N W2-N D2
In formula, R 1it is the first real vector product score value frequently; I 1it is the first empty vector product score value frequently.L1 is first integral length, unit dimensionless, and L1 is 1.5 times of described unit period sequence lengths.
For step S112, in like manner and preferably, under described mixing interfering frequency composition is suppressed prerequisite completely, the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence are frequently formula (15):
&alpha; ( &Omega; ) = &Omega;T n ( N W 1 + N D 1 + N W 2 + N D 2 ) 2
To R 2(n) I 2(n) n=0,1,2,3 ...., N s-1
To R d2(n) I d2(n) n=N s-N w1-N d1-N w2-N d2-1
Wherein, R d2n () is the described second real vectorial trap sequence frequently; I d2n () is the described second empty vectorial trap sequence frequently; K (Ω) is for digital notch is in the dimensionless gain of frequency difference Ω; α (Ω) for digital notch is in the phase shift of frequency difference Ω, unit rad.
For step S113, preferably, integral operation formula can be (16):
n=0,1,2,3,.......,L2-1
L2=N S-N W1-N D1-N W2-N D2
In formula, R 2it is the second real vector product score value frequently; I 2it is the second empty vector product score value frequently.L2 is second integral length, unit dimensionless, and L2 is 0.75 times of described unit period sequence length.
For step S114, preferably, the phase transition rule preset corresponds to empty vector product score value frequently and real vector is frequently converted to the change type of phase place, by following formula (17), the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, by following formula (18), the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to sequence amplitude;
In formula, PH 1for first phase, unit rad.
A m p = R 1 2 + I 1 2 = 2 A K ( &Omega; ) &Omega;T n L 1 s i n &lsqb; &Omega;T n L 1 2 &rsqb; - - - ( 18 ) ;
In formula, Amp is sequence amplitude, unit v.
In certain embodiments, according to the phase place preset and amplitude transformation rule, the step that the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase and sequence amplitude is comprised the following steps:
Obtain the ratio of the described first empty vector product score value frequently and the described first real vector product score value frequently.
Obtain the opposite number of the arctan function value of described ratio, generate described first phase.
Obtain the quadratic sum of the described first empty vector product score value frequently and the described first real vector product score value frequently.
Root is opened to the quadratic sum obtained, generates described sequence amplitude.
For step S115, preferably, by following formula (19), the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase:
In formula, PH2 is second phase, unit rad.
In certain embodiments, according to described default phase transition rule, the step that the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase is comprised the following steps:
Obtain the ratio of the described second empty vector product score value frequently and the described second real vector product score value frequently;
Obtain the opposite number of the arctan function value of described ratio, generate described second phase.
For step S116, described first phase is in 0 ~ ± 0.5 π rad scope, but actual sequence phase place may exceed ± 0.5 π rad scope, therefore must expand described first phase according to phase expansion rule, phase range after expansion is in 0 ~ ± π rad scope, first expansion phase place, is formula (20):
In formula, Ph 1be the first expansion phase place, scope is at 0 ~ ± π ard; & representative and logic.
In certain embodiments, according to the phase expansion rule preset, expand described first phase, the step obtaining the first expansion phase place comprises the following steps:
If the described first real vector product score value is frequently more than or equal to while zero, the opposite number of the described first empty vector product score value is frequently more than or equal to zero, then the first expansion phase place equals described first phase;
If the described first real vector product score value is frequently more than or equal to while zero, the opposite number of the described first empty vector product score value is frequently less than zero, then the first expansion phase place equals described second phase;
If described first real vector product score value is minus frequently while, the opposite number of the described first empty vector product score value is frequently more than or equal to zero, then the first expansion phase place equals described second phase and adds π rad;
If described first real vector product score value is minus frequently while, the opposite number of the described first empty vector product score value is frequently less than zero, then the first expansion phase place equals described second phase and subtracts π rad;
For step S117, described second phase is in 0 ~ ± 0.5 π rad scope, but actual sequence phase place may exceed ± 0.5 π rad scope, therefore must expand described second phase according to phase expansion rule, phase range after expansion is in 0 ~ ± π rad scope, second expansion phase place, is formula (21):
In formula, PH 2for described second phase, scope is at 0 ~ ± 0.5 π ard; Ph 2be the second expansion phase place, scope is at 0 ~ ± π ard; & representative and logic.
In certain embodiments, according to the phase expansion rule preset, expand described second phase, the step obtaining the second expansion phase place comprises the following steps:
If the described second real vector product score value is frequently more than or equal to while zero, the opposite number of the described second empty vector product score value is frequently more than or equal to zero, then the second expansion phase place equals described second phase;
If the described second real vector product score value is frequently more than or equal to while zero, the opposite number of the described second empty vector product score value is frequently less than zero, then the second expansion phase place equals described second phase;
If described second real vector product score value is minus frequently while, the opposite number of the described second empty vector product score value is frequently more than or equal to zero, then the second expansion phase place equals described second phase and adds π rad;
If described second real vector product score value is minus frequently while, the opposite number of the described second empty vector product score value is frequently less than zero, then the second expansion phase place equals described second phase and subtracts π rad;
For step S118, preferably, to expand phase transition be that the change type of the frequency difference of described sinusoidal signal frequency and described reference frequency is corresponding to described default frequency difference transformation rule to expanding phase place and described second by described first.
According to formula (20) formula (21), the frequency difference calculating formula of described sinusoidal signal frequency and described reference frequency can be formula (22):
&Delta; &omega; = 2 ( Ph 1 - Ph 2 ) ( L 1 - L 2 ) T n = &Omega; - - - ( 22 ) ;
Wherein, △ ω is the frequency difference of described sinusoidal signal frequency and described reference frequency, unit rad/s.
In certain embodiments, according to the frequency difference transformation rule preset, the step being the frequency difference of described sinusoidal signal frequency and described reference frequency by described first expansion phase place and described second expansion phase transition comprises the following steps:
Obtain and the integral and calculating length of integral operation is carried out to the described first real vectorial trap sequence frequently, generate first integral length.
Obtain and the integral and calculating length of integral operation is carried out to the described second real vectorial trap sequence frequently, generate second integral length.
Obtain the difference that described first expansion phase place and described second expands phase place, generate the first difference.
Obtain 2 times of the product of described first difference and described default sample frequency, generate the first product.
Obtain the difference of described first integral length and described second integral length, generate the second difference.
Obtain the ratio of described first product and described second difference, generate described frequency difference.
For step S119, preferably, described default amplitude transformation rule is corresponding to the change type frequency difference of described sequence amplitude and described sinusoidal signal frequency and described reference frequency being converted to the amplitude of described sinusoidal signal.The calculating formula of the amplitude of described sinusoidal signal can be formula (23):
A M P = A m p K L 1 ( &Delta; &omega; ) K W 1 ( &Delta; &omega; ) K D 1 ( &Delta; &omega; ) K W 2 ( &Delta; &omega; ) K D 2 ( &Delta; &omega; ) = A
Wherein K L 1 ( &Delta; &omega; ) = &Delta;&omega;T n L 1 2 s i n &lsqb; &Delta;&omega;T n L 1 2 &rsqb;
K W 1 ( &Delta; &omega; ) = &lsqb; 4 s i n ( &Delta;&omega;T n N W 1 4 ) &Delta;&omega;T n N W 1 &rsqb; 2
K D 1 ( &Delta; &omega; ) = 2 s i n ( &Delta;&omega;T n N D 1 2 ) &Delta;&omega;T n N D 1 - - - ( 23 ) ;
K W 2 ( &Delta; &omega; ) = &lsqb; 4 s i n ( &Delta;&omega;T n N W 2 4 ) &Delta;&omega;T n N W 2 &rsqb; 2
K D 2 ( &Delta; &omega; ) = 2 s i n ( &Delta;&omega;T n N D 2 2 ) &Delta;&omega;T n N D 2
In formula, AMP is the fundamental voltage amplitude detected value of described sinusoidal signal, unit v; Amp is described sequence amplitude, unit v; △ ω is described frequency difference, unit rad/s; K l1(△ ω) for described first integral is in the amplitude gain of described frequency difference, unit dimensionless; K w1(△ ω) for described slip quarter window one arithmetic mean trapper is in the amplitude gain of described frequency difference, unit dimensionless; K d1(△ ω) for described slip rectangular window one arithmetic mean trapper is in the amplitude gain in described frequency difference, unit dimensionless; K w2(△ ω) for described slip quarter window two arithmetic mean trapper is in the amplitude gain of described frequency difference, unit dimensionless; K d2(△ ω) for described slip rectangular window two arithmetic mean trapper is in the amplitude gain of described frequency difference, unit dimensionless.
In one embodiment, according to the amplitude transformation rule preset, the step that the frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency is converted to the fundamental voltage amplitude of described sinusoidal signal is comprised the following steps:
Obtain described sequence amplitude;
Obtain the frequency difference of described sinusoidal signal frequency and described reference frequency;
Obtain described sampling interval;
Obtain described first integral length;
Obtain the quarter window parameter one of described slip quarter window one arithmetic mean trapper;
Obtain the rectangular window parameter one of described slip rectangular window one arithmetic mean trapper;
Obtain the quarter window parameter two of described slip quarter window two arithmetic mean trapper;
Obtain the rectangular window parameter two of described slip rectangular window two arithmetic mean trapper;
Obtain 0.5 times of the product of described frequency difference and described sampling interval and described first integral length, generate the first product;
Obtain 0.25 times of the product of described frequency difference and described sampling interval and described quarter window parameter one, generate the second product;
Obtain 0.5 times of the product of described frequency difference and described sampling interval and described rectangular window parameter one, generate the 3rd product;
Obtain 0.25 times of the product of described frequency difference and described sampling interval and described quarter window parameter two, generate the 4th product;
Obtain 0.5 times of the product of described frequency difference and described sampling interval and described rectangular window parameter two, generate the 5th product;
Obtain the sine function of described first product and the ratio of described first product, generate the amplitude gain of described first integral computing in described frequency difference;
Obtain the sine function of described second product and the ratio of described second product square, generate the amplitude gain of described slip quarter window one arithmetic mean trapper in described frequency difference;
Obtain the sine function of described 3rd product and the ratio of described 3rd product, generate the amplitude gain of described slip rectangular window one arithmetic mean trapper in described frequency difference;
Obtain the sine function of described 4th product and the ratio of described 4th product square, generate the amplitude gain of described slip quarter window two arithmetic mean trapper in described frequency difference;
Obtain the sine function of described 5th product and the ratio of described 5th product, generate the amplitude gain of described slip rectangular window two arithmetic mean trapper in described frequency difference;
Obtain described first integral and at the product of the amplitude gain of described frequency difference, be created on the total amplitude gain of described frequency difference at the amplitude gain of described frequency difference, described slip rectangular window two arithmetic mean trapper at the amplitude gain of described frequency difference, described slip quarter window two arithmetic mean trapper at the amplitude gain of described frequency difference, described slip rectangular window one arithmetic mean trapper at the amplitude gain of described frequency difference, described slip quarter window one arithmetic mean trapper;
The invention also discloses the amplitude detection system of sinusoidal signal, in certain embodiments, as shown in Figure 2, the amplitude detection system of this sinusoidal signal, comprise: preliminary sequence length modules 1010, preliminary sampling module 1020, frequency preliminary survey module 1030, periodic sequence module 1040, sequence length module 1050, burst module 1060, truncated sequence module 1070, first frequency mixing module 1080, second frequency mixing module 1090, first trap module 1100, first integral module 1110, second trap module 1120, second integral module 1130, first phase module 1140, second phase module 1150, first phase expansion module 1160, second phase expansion module 1170, frequency difference modular converter 1180, amplitude turns Transpose module 1190.Wherein:
Preliminary sequence length modules 1010, for according to the lower limit of sinusoidal signal frequency scope and default sample frequency and preset signals periodicity, obtains preliminary sample sequence length;
Preliminary sampling module 1020, for according to described preliminary sample sequence length, tentatively samples to described sinusoidal signal, obtains the preliminary sample sequence of described sinusoidal signal;
Frequency preliminary survey module 1030, for carrying out frequency preliminary survey to described preliminary sample sequence, generates the first synchronizing frequency of described sinusoidal signal, with the described just given reference frequency of synchronizing frequency;
Periodic sequence module 1040, for calculating the unit period sequence length of described sinusoidal signal according to default sample frequency and described reference frequency;
Sequence length module 1050, according to described preset signals periodicity and described unit period sequence length, obtains predetermined sequence length;
Burst module 1060, for according to described predetermined sequence length, from described preliminary sample sequence, obtains burst;
Truncated sequence module 1070, for carrying out brachymemma process to described burst, obtains truncated signal sequence;
First frequency mixing module 1080, for being multiplied with described burst respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generates the first real sequence vector frequently and the first empty sequence vector frequently;
Second frequency mixing module 1090, for being multiplied with described truncated signal sequence respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generates the second real sequence vector frequently and the second empty sequence vector frequently;
First trap module 1100, for carrying out digital notch to the described first real sequence vector frequently and the described first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
First integral module 1110, for carrying out integral operation to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently;
Second trap module 1120, for carrying out digital notch to the described second real sequence vector frequently and the described second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Second integral module 1130, for carrying out integral operation to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently;
First phase module 1140, for according to the phase place preset and amplitude transformation rule, is converted to first phase and sequence amplitude by the described first empty vector product score value frequently and the described first real vector product score value frequently;
Second phase module 1150, for according to described default phase transition rule, is converted to second phase by the described second empty vector product score value frequently and the described second real vector product score value frequently;
First phase expansion module 1160, for according to the phase expansion rule preset, expands to the first expansion phase place by described first phase;
Second phase expansion module 1170, for according to the phase expansion rule preset, expands to the second expansion phase place by described second phase;
Described first expansion phase place and described second expansion phase transition, for according to the frequency difference transformation rule preset, are the frequency difference of described sinusoidal signal frequency and described reference frequency by frequency difference modular converter 1180;
Amplitude modular converter 1190, for according to the amplitude transformation rule preset, is converted to the fundamental voltage amplitude of described sinusoidal signal by the frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency.
Present embodiment, carries out brachymemma process to the burst of sampling gained, obtains truncated signal sequence; With the cosine function of survey reference frequency be multiplied with described truncated signal sequence with described burst respectively with the sine function of described reference frequency, generate two groups of real sequence vectors frequently and empty sequence vectors frequently; By to two groups of empty sequence vectors frequently and real sequence vector digital notch frequently, generate two groups of imaginary number vector trap sequences and real number vector trap sequence, and then integration generates two groups of imaginary number vector product score values and real number vector product score value; Again according to the phase transition rule preset, two groups of real number vector product score values and imaginary number vector product score value are converted to sequence amplitude and two phase places; Again two phase places are expanded, obtain expansion phase place; According to the frequency difference transformation rule preset, be the frequency difference of described sinusoidal signal frequency and described reference frequency by two expansion phase transition; According to the amplitude transformation rule preset, the frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency is converted to the fundamental voltage amplitude of described sinusoidal signal.
Because digital notch can be decayed rapidly input signal at some Frequency points, to reach the effect hindering this frequency signal to pass through, therefore, when the trap frequency point of this digital notch is set to corresponding mixing interfering frequency point, this digital notch has the inhibiting effect of the degree of depth to described mixing interfering frequency.So, adopt the amplitude detection method and apparatus of sinusoidal signal of the present invention, it is high to the amplitude measurement precision of Low Frequency Sine Signals, and anti-harmonic wave and noise good.
Wherein, preliminary sequence length modules 1010, power system frequency scope, at 45Hz-55Hz, preferably, gets sinusoidal signal frequency lower limit f minfor 45Hz; And described preset signals periodicity C is set according to actual needs 2 π, preferably, described preset signals periodicity C 2 πround numbers.
In certain embodiments, C is got 2 πfor integer 12.
Preliminary sample sequence length computation, is above-mentioned formula (1).
For preliminary sampling module 1020, described sinusoidal signal is tentatively sampled, obtain the preliminary sample sequence of described sinusoidal signal.To single fundamental frequency sinusoidal signal, the preliminary sample sequence obtaining described sinusoidal signal is above-mentioned formula (2).
For frequency preliminary survey module 1030, by zero friendship method, based on the algorithm of filtering, based on Wavelet Transformation Algorithm, the algorithm based on neural network, the frequency algorithm based on DFT conversion or carry out frequency preliminary survey based on the frequency algorithm of phase differential to described preliminary sample sequence, obtain described just synchronizing frequency.
Described preliminary frequency is expressed as above-mentioned formula (3).
Preferably, described reference frequency is expressed as above-mentioned formula (4).
For periodic sequence module 1040, calculate the unit period sequence length of described sinusoidal signal according to default sample frequency and described reference frequency:
In certain embodiments, the unit period sequence length of described sinusoidal signal calculates, and is above-mentioned formula (5).
There is the error in 1 sampling interval in described unit period sequence length integer.
For sequence length module 1050, according to described preset signals periodicity and described unit period sequence length, obtain predetermined sequence length:
In certain embodiments, described predetermined sequence length is 12 times of described unit period sequence length, described predetermined sequence length computation, is above-mentioned formula (6).
For burst module 1060, according to predetermined sequence length, from described preliminary sample sequence, obtain burst:
In certain embodiments, the burst of described predetermined sequence length, is above-mentioned formula (7).
The avatars of described burst, as shown in Figure 3.
For truncated sequence module 1070, brachymemma process is carried out to described burst, obtains truncated signal sequence:
In certain embodiments, described truncated signal sequence length is 11.25 times of described unit period sequence length, and described truncated signal sequence length is calculated as above-mentioned formula (8).
Preferably, described truncated signal sequence is expressed as above-mentioned formula (9).
The avatars of described truncated signal sequence, as shown in Figure 3.
For the first frequency mixing module 1080, preferably, the cosine function of described reference frequency and the sine function of described reference frequency can be respectively with described reference frequency be frequency, with T nfor sine function and the cosine function of spaced discrete variable.
In certain embodiments, be multiplied respectively with the sine function of described reference frequency with the cosine function of described reference frequency with described burst, sequence vector and the described first empty sequence vector are frequently above-mentioned formula (10) frequently in fact to obtain described first.
For the second frequency mixing module 1090, be multiplied with described truncated signal sequence respectively with the sine function of described reference frequency with the cosine function of described reference frequency, sequence vector and the described second empty sequence vector are frequently above-mentioned formula (11) frequently in fact to obtain described second.
For the first trap module 1100, in the described first real sequence vector frequently and the described first empty sequence vector frequently, comprise mixing interfering frequency.When in input signal also at flip-flop, subharmonic composition and subharmonic composition time, described mixing interfering frequency will be more complicated, and these mixing interfering frequencies have a strong impact on accuracy in computation.Although window function and integral operation itself have good attenuation to mixing interfering frequency, do not have specific aim, can not produce the inhibiting effect of the degree of depth to the mixing interfering frequency of described complexity, the pin-point accuracy that can not meet parameter calculates needs.
In order to suppress the impact of described mixing interfering frequency targetedly, digital trap can be carried out to this mixing interference, because digital notch can be decayed rapidly input signal at some Frequency points, to reach the effect hindering this frequency signal to pass through, therefore, when the trap frequency point of this digital notch is set to corresponding mixing interfering frequency point, this digital notch has inhibiting effect completely to described mixing interfering frequency.
Preferably, digital notch implement body adopts slip quarter window arithmetic mean trapper, is added again, then gets its arithmetic mean and export as this trap value by several continuous discrete values after being multiplied by quarter window function.Slip quarter window arithmetic mean trapper needs to arrange quarter window parameter, and described quarter window parameter specifically refers to the length N of the quarter window sequence of function w.In quarter window Parameter N wvalue is 3 times of signal period sequence length, can suppress the mixing interfering frequency that 1/3 subharmonic produces.In quarter window Parameter N wvalue is 4 times of signal period sequence length, can to direct current, 1/2 gradation, 1 time, 2 times, 3 times, 4 times, the mixing interfering frequency that produces such as 5 subharmonic suppresses.
Consider the factors such as physical presence error, as as described in parameter there is error within 1 sampling interval, in order to the degree of depth suppresses the impact of mixing interfering frequency, also can increase one-level slip rectangular window arithmetic mean trapper again, directly be added by several continuous discrete values, then get its arithmetic mean and export as this trap value.Slip rectangular window arithmetic mean trapper needs to arrange rectangular window parameter, and described rectangular window parameter specifically refers to the length N of rectangular window function sequence d.Rectangular window Parameter N dvalue is 1.5 times of signal period sequence length, can suppress the mixing interfering frequency that 1/3 subharmonic produces.And N dvalue is 2 times of signal period sequence length, can to direct current, 1/2 gradation, 1 time, 2 times, 3 times, 4 times, the mixing interfering frequency that produces such as 5 subharmonic suppresses.
Preferably, digital trap by secondary slip quarter window arithmetic mean trapper add secondary slip rectangular window arithmetic mean trapper altogether level Four digital trap formed this level Four digital trap formula and be can be above-mentioned formula (12).
In certain embodiments, quarter window Parameter N w1value is 3 times of the unit period sequence length of described reference frequency, rectangular window Parameter N d1value is 1.5 times of the unit period sequence length of described reference frequency, quarter window Parameter N w2value is 4 times of the unit period sequence length of described reference frequency, rectangular window Parameter N d1value is 2 times of the unit period sequence length of described reference frequency.Level Four digital notch needs use 10.5 times of signal period sequence lengths.
To above-described embodiment, at fundamental frequency 100 π, the unit rad/s of described sinusoidal signal, obtain the frequency domain characteristic that quarter window arithmetic mean trap calculates device 1, as shown in Figure 5.Obtain the frequency domain characteristic that quarter window arithmetic mean trap calculates device 2, as shown in Figure 6.
Preferably, under described mixing interfering frequency composition is suppressed prerequisite completely, the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence are frequently above-mentioned formula (13).
For first integral module 1110, preferably, integral operation is carried out by the integrator that those skilled in the art are usual.Integral operation formula is above-mentioned formula (14).
For the second trap module 1120, in like manner and preferably, under described mixing interfering frequency composition is suppressed prerequisite completely, the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence are frequently above-mentioned formula (15).
For second integral module 1130, preferably, integral operation formula can be above-mentioned formula (16).
For phase-amplitude modular converter 1140, preferably, the phase transition rule preset corresponds to empty vector product score value frequently and real vector is frequently converted to the change type of phase place, by above-mentioned formula (17), the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase, by above-mentioned formula (18), the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to sequence amplitude.
In certain embodiments, phase-amplitude modular converter 1140 can be used for:
Obtain the ratio of the described first empty vector product score value frequently and the described first real vector product score value frequently.
Obtain the opposite number of the arctan function value of described ratio, generate described first phase.
Obtain the quadratic sum of the described first empty vector product score value frequently and the described first real vector product score value frequently.
Root is opened to the quadratic sum obtained, generates described sequence amplitude.
For phase module 1150, preferably, by above-mentioned formula (19), the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase.
In certain embodiments, second phase module 1150 can be used for:
Obtain the ratio of the described second empty vector product score value frequently and the described second real vector product score value frequently;
Obtain the opposite number of the arctan function value of described ratio, generate described second phase.
For first phase expansion module 1160, described first phase is in 0 ~ ± 0.5 π rad scope, but actual sequence phase place may exceed ± 0.5 π rad scope, therefore must expand described first phase according to phase expansion rule, phase range after expansion is in 0 ~ ± π rad scope, first expansion phase place, is above-mentioned formula (20):
In certain embodiments, first phase expansion module 1160 can be used for:
If the described first real vector product score value is frequently more than or equal to while zero, the opposite number of the described first empty vector product score value is frequently more than or equal to zero, then the first expansion phase place equals described first phase;
If the described first real vector product score value is frequently more than or equal to while zero, the opposite number of the described first empty vector product score value is frequently less than zero, then the first expansion phase place equals described second phase;
If described first real vector product score value is minus frequently while, the opposite number of the described first empty vector product score value is frequently more than or equal to zero, then the first expansion phase place equals described second phase and adds π rad;
If described first real vector product score value is minus frequently while, the opposite number of the described first empty vector product score value is frequently less than zero, then the first expansion phase place equals described second phase and subtracts π rad;
For second phase expansion module 1170, described second phase is in 0 ~ ± 0.5 π rad scope, but actual sequence phase place may exceed ± 0.5 π rad scope, therefore must expand described second phase according to phase expansion rule, phase range after expansion is in 0 ~ ± π rad scope, second expansion phase place, is above-mentioned formula (20).
In certain embodiments, second phase expansion module 1170 can be used for:
If the described second real vector product score value is frequently more than or equal to while zero, the opposite number of the described second empty vector product score value is frequently more than or equal to zero, then the second expansion phase place equals described second phase;
If the described second real vector product score value is frequently more than or equal to while zero, the opposite number of the described second empty vector product score value is frequently less than zero, then the second expansion phase place equals described second phase;
If described second real vector product score value is minus frequently while, the opposite number of the described second empty vector product score value is frequently more than or equal to zero, then the second expansion phase place equals described second phase and adds π rad;
If described second real vector product score value is minus frequently while, the opposite number of the described second empty vector product score value is frequently less than zero, then the second expansion phase place equals described second phase and subtracts π rad;
For frequency difference modular converter 1180, preferably, to expand phase transition be that the change type of the frequency difference of described sinusoidal signal frequency and described reference frequency is corresponding to described default frequency difference transformation rule to expanding phase place and described second by described first.
According to formula (20) formula (21), the frequency difference calculating formula of described sinusoidal signal frequency and described reference frequency can be above-mentioned formula (22).
In certain embodiments, frequency difference modular converter 1180 can be used for:
Obtain and the integral and calculating length of integral operation is carried out to the described first real vectorial trap sequence frequently, generate first integral length.
Obtain and the integral and calculating length of integral operation is carried out to the described second real vectorial trap sequence frequently, generate second integral length.
Obtain the difference that described first expansion phase place and described second expands phase place, generate the first difference.
Obtain 2 times of the product of described first difference and described default sample frequency, generate the first product.
Obtain the difference of described first integral length and described second integral length, generate the second difference.
Obtain the ratio of described first product and described second difference, generate described frequency difference.
Turn Transpose module 1190 for amplitude, preferably, described default amplitude transformation rule is corresponding to the change type frequency difference of described sequence amplitude and described sinusoidal signal frequency and described reference frequency being converted to the amplitude of described sinusoidal signal.The calculating formula of the amplitude of described sinusoidal signal can be above-mentioned formula (23).
In one embodiment, amplitude turns Transpose module 1190 and can be used for:
Obtain described sequence amplitude;
Obtain the frequency difference of described sinusoidal signal frequency and described reference frequency;
Obtain described sampling interval;
Obtain described first integral length;
Obtain the quarter window parameter one of described slip quarter window one arithmetic mean trapper;
Obtain the rectangular window parameter one of described slip rectangular window one arithmetic mean trapper;
Obtain the quarter window parameter two of described slip quarter window two arithmetic mean trapper;
Obtain the rectangular window parameter two of described slip rectangular window two arithmetic mean trapper;
Obtain 0.5 times of the product of described frequency difference and described sampling interval and described first integral length, generate the first product;
Obtain 0.25 times of the product of described frequency difference and described sampling interval and described quarter window parameter one, generate the second product;
Obtain 0.5 times of the product of described frequency difference and described sampling interval and described rectangular window parameter one, generate the 3rd product;
Obtain 0.25 times of the product of described frequency difference and described sampling interval and described quarter window parameter two, generate the 4th product;
Obtain 0.5 times of the product of described frequency difference and described sampling interval and described rectangular window parameter two, generate the 5th product;
Obtain the sine function of described first product and the ratio of described first product, generate the amplitude gain of described first integral computing in described frequency difference;
Obtain the sine function of described second product and described second product ratio square, generate the amplitude gain of described slip quarter window one arithmetic mean trapper in described frequency difference;
Obtain the sine function of described 3rd product and the ratio of described 3rd product, generate the amplitude gain of described slip rectangular window one arithmetic mean trapper in described frequency difference;
Obtain the sine function of described 4th product and described 4th product ratio square, generate the amplitude gain of described slip quarter window two arithmetic mean trapper in described frequency difference;
Obtain the sine function of described 5th product and the ratio of described 5th product, generate the amplitude gain of described slip rectangular window two arithmetic mean trapper in described frequency difference;
Obtain described first integral and at the product of the amplitude gain of described frequency difference, be created on the total amplitude gain of described frequency difference at the amplitude gain of described frequency difference, described slip rectangular window two arithmetic mean trapper at the amplitude gain of described frequency difference, described slip quarter window two arithmetic mean trapper at the amplitude gain of described frequency difference, described slip rectangular window one arithmetic mean trapper at the amplitude gain of described frequency difference, described slip quarter window one arithmetic mean trapper;
Obtain the ratio of described sequence amplitude and described total amplitude gain, generate the fundamental voltage amplitude detected value of described sinusoidal signal.
In order to verify that the amplitude detection system of sinusoidal signal of the present invention has higher accuracy, providing an experimental signal, being formula (24):
In experimental signal fundamental frequency variation range at 45Hz-55Hz, the number of winning the confidence integer multiples issue is about 12, signal initial phase variation range is at 0 ~ ± pi/2, unit rad, the sample frequency of signal is 20kHz, the discrete data quantization digit 24bit of signal, frequency preliminary survey relative error <| ± 0.25%|, obtains the absolute relative error that signal fundamental voltage amplitude detects | AMP err(f) | with the experimental result picture of signal fundamental frequency f variation characteristic, shown in Fig. 4.The amplitude detection accuracy of the experimental signal that Fig. 4 provides is 10 -7magnitude.
Each technical characteristic of the above embodiment can combine arbitrarily, for making description succinct, the all possible combination of each technical characteristic in above-described embodiment is not all described, but, as long as the combination of these technical characteristics does not exist contradiction, be all considered to be the scope that this instructions is recorded.
The above embodiment only have expressed several embodiment of the present invention, and it describes comparatively concrete and detailed, but can not therefore be construed as limiting the scope of the patent.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.

Claims (10)

1. an amplitude detection method for sinusoidal signal, is characterized in that, comprise the following steps:
According to the lower limit of sinusoidal signal frequency scope and default sample frequency and preset signals periodicity, obtain preliminary sample sequence length;
According to described preliminary sample sequence length, described sinusoidal signal is tentatively sampled, obtain the preliminary sample sequence of described sinusoidal signal;
Frequency preliminary survey is carried out to described preliminary sample sequence, generates the first synchronizing frequency of described sinusoidal signal, with the described just given reference frequency of synchronizing frequency;
The unit period sequence length of described sinusoidal signal is calculated according to default sample frequency and described reference frequency;
According to described preset signals periodicity and described unit period sequence length, obtain predetermined sequence length;
According to predetermined sequence length, from described preliminary sample sequence, obtain burst;
Brachymemma process is carried out to described burst, obtains truncated signal sequence;
Be multiplied with described burst respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generate the first real sequence vector frequently and the first empty sequence vector frequently;
Be multiplied with described truncated signal sequence respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generate the second real sequence vector frequently and the second empty sequence vector frequently;
Respectively digital notch is carried out to the described first real sequence vector frequently and the described first empty sequence vector frequently, generate the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
Respectively integral operation is carried out to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently, generate the first real vector product score value frequently and the first empty vector product score value frequently;
Respectively digital notch is carried out to the described second real sequence vector frequently and the described second empty sequence vector frequently, generate the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Respectively integral operation is carried out to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently, generate the second real vector product score value frequently and the second empty vector product score value frequently;
According to the phase place preset and amplitude transformation rule, the described first empty vector product score value frequently and the described first real vector product score value are frequently converted to first phase and sequence amplitude;
According to the phase transition rule preset, the described second empty vector product score value frequently and the described second real vector product score value are frequently converted to second phase;
According to the phase expansion rule preset, described first phase is expanded, obtain the first expansion phase place;
According to the phase expansion rule preset, described second phase is expanded, obtain the second expansion phase place;
According to the frequency difference transformation rule preset, be the frequency difference of described sinusoidal signal frequency and described reference frequency by described first expansion phase place and described second expansion phase transition;
According to the amplitude transformation rule preset, the frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency is converted to the fundamental voltage amplitude of described sinusoidal signal.
2. the amplitude detection method of sinusoidal signal according to claim 1, is characterized in that, according to the lower limit of sinusoidal signal frequency scope and default sample frequency and preset signals periodicity, the step obtaining preliminary sample sequence length comprises the following steps:
By the following stated formula, the lower limit of described sinusoidal signal frequency and default sample frequency and preset signals periodicity are converted to described preliminary sample sequence length:
N s t a r t = ( int ) C 2 &pi; f n f min ;
Wherein, N startfor described preliminary sequence length, unit dimensionless; (int) expression rounds; C 2 πfor described preset signals periodicity, unit dimensionless; f minfor the lower limit of sinusoidal signal frequency scope, unit Hz; f nfor described default sample frequency, unit Hz.
3. the amplitude detection method of sinusoidal signal according to claim 1, is characterized in that, described digital notch is made up of secondary slip quarter window arithmetic mean trap and secondary slip rectangular window arithmetic mean trap.
4. the amplitude detection method of sinusoidal signal according to claim 1, it is characterized in that, described just synchronizing frequency hands over method, based on the algorithm of filtering, based on Wavelet Transformation Algorithm, the algorithm based on neural network, the frequency algorithm based on DFT conversion or obtain based on the frequency algorithm of phase differential by adopting zero to described preliminary sample sequence.
5. the amplitude detection method of sinusoidal signal according to claim 1, is characterized in that, described phase expansion rule is:
If described real vector product score value is frequently more than or equal to while zero, the opposite number of described empty vector product score value is frequently more than or equal to zero, then described expansion phase place equals described phase place;
If described real vector product score value is frequently more than or equal to while zero, the opposite number of described empty vector product score value is frequently less than zero, then described expansion phase place equals described phase place;
If described real vector product score value is minus frequently while, the opposite number of described empty vector product score value is frequently more than or equal to zero, then described expansion phase place equals described phase place and adds π rad;
If described real vector product score value is minus frequently while, the opposite number of described empty vector product score value is frequently less than zero, then described expansion phase place equals described phase place and subtracts π rad.
6. an amplitude detection system for sinusoidal signal, is characterized in that, comprising:
Preliminary sequence length modules, for according to the lower limit of sinusoidal signal frequency scope and default sample frequency and preset signals periodicity, obtains preliminary sample sequence length;
Preliminary sampling module, for according to described preliminary sample sequence length, tentatively samples to described sinusoidal signal, obtains the preliminary sample sequence of described sinusoidal signal;
Frequency preliminary survey module, for carrying out frequency preliminary survey to described preliminary sample sequence, generates the first synchronizing frequency of described sinusoidal signal, with the described just given reference frequency of synchronizing frequency;
Periodic sequence module, for calculating the unit period sequence length of described sinusoidal signal according to default sample frequency and described reference frequency;
Sequence length module, according to described preset signals periodicity and described unit period sequence length, obtains predetermined sequence length;
Burst module, for according to described predetermined sequence length, from described preliminary sample sequence, obtains burst;
Truncated sequence module, for carrying out brachymemma process to described burst, obtains truncated signal sequence;
First frequency mixing module, for being multiplied with described burst respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generates the first real sequence vector frequently and the first empty sequence vector frequently;
Second frequency mixing module, for being multiplied with described truncated signal sequence respectively with the sine function of described reference frequency with the cosine function of described reference frequency, generates the second real sequence vector frequently and the second empty sequence vector frequently;
First trap module, for carrying out digital notch to the described first real sequence vector frequently and the described first empty sequence vector frequently respectively, generates the first real vectorial trap sequence frequently and the first empty vectorial trap sequence frequently;
First integral module, for carrying out integral operation to the described first real vectorial trap sequence frequently and the described first empty vectorial trap sequence frequently respectively, generates the first real vector product score value frequently and the first empty vector product score value frequently;
Second trap module, for carrying out digital notch to the described second real sequence vector frequently and the described second empty sequence vector frequently respectively, generates the second real vectorial trap sequence frequently and the second empty vectorial trap sequence frequently;
Second integral module, for carrying out integral operation to the described second real vectorial trap sequence frequently and the described second empty vectorial trap sequence frequently respectively, generates the second real vector product score value frequently and the second empty vector product score value frequently;
First phase module, for according to the phase transition rule preset, is converted to first phase by the described first empty vector product score value frequently and the described first real vector product score value frequently;
Second phase module, for according to described default phase transition rule, is converted to second phase by the described second empty vector product score value frequently and the described second real vector product score value frequently;
First phase expansion module, for according to the phase expansion rule preset, expands to the first expansion phase place by described first phase;
Second phase expansion module, for according to the phase expansion rule preset, expands to the second expansion phase place by described second phase;
Described first expansion phase place and described second expansion phase transition, for according to the initial phase transformation rule preset, are the initial phase of described sinusoidal signal by initial phase module;
Phase-amplitude modular converter, for according to the phase place preset and amplitude transformation rule, is converted to first phase and sequence amplitude by the described first empty vector product score value frequently and the described first real vector product score value frequently;
Phase conversion, for according to the phase transition rule preset, is converted to second phase by the described second empty vector product score value frequently and the described second real vector product score value frequently;
First phase expansion module, for according to the phase expansion rule preset, expands to the first expansion phase place by described first phase;
Second phase expansion module, for according to the phase expansion rule preset, expands to the second expansion phase place by described second phase;
Described first expansion phase place and described second expansion phase transition, for according to the frequency difference transformation rule preset, are the frequency difference of described sinusoidal signal frequency and described reference frequency by frequency difference modular converter;
Amplitude modular converter, for according to the amplitude transformation rule preset, is converted to the fundamental voltage amplitude of described sinusoidal signal by the frequency difference of described sequence amplitude, described sinusoidal signal frequency and described reference frequency.
7. the amplitude detection system of sinusoidal signal according to claim 6, it is characterized in that, described preliminary sampling module is according to the lower limit of sinusoidal signal frequency scope and default sample frequency and preset signals periodicity, and the step obtaining preliminary sample sequence length comprises the following steps:
By the following stated formula, the lower limit of described sinusoidal signal frequency and default sample frequency and preset signals periodicity are converted to described preliminary sample sequence length:
N s t a r t = ( int ) C 2 &pi; f n f min ;
Wherein, N startfor described preliminary sequence length, unit dimensionless; (int) expression rounds; C 2 πfor described preset signals periodicity, unit dimensionless; f minfor the lower limit of sinusoidal signal frequency scope, unit Hz; f nfor described default sample frequency, unit Hz.
8. the amplitude detection system of sinusoidal signal according to claim 6, is characterized in that, described first trap module, the second trap module comprise two slip quarter window arithmetic mean trappers and secondary slip rectangular window arithmetic mean trapper.
9. the amplitude detection system of sinusoidal signal according to claim 6, it is characterized in that, described just synchronizing frequency hands over method, based on the algorithm of filtering, based on Wavelet Transformation Algorithm, the algorithm based on neural network, the frequency algorithm based on DFT conversion or obtain based on the frequency algorithm of phase differential by adopting zero to described preliminary sample sequence.
10. the amplitude detection system of sinusoidal signal according to claim 6, it is characterized in that, described first phase or described second phase, according to the phase expansion rule preset, are expanded to institute first expansion phase place or the described second step expanding phase place comprises the following steps by described first phase expansion module and second phase expansion module:
If described real vector product score value is frequently more than or equal to while zero, the opposite number of described empty vector product score value is frequently more than or equal to zero, then described expansion phase place equals described phase place;
If described real vector product score value is frequently more than or equal to while zero, the opposite number of described empty vector product score value is frequently less than zero, then described expansion phase place equals described phase place;
If described real vector product score value is minus frequently while, the opposite number of described empty vector product score value is frequently more than or equal to zero, then described expansion phase place equals described phase place and adds π rad;
If described real vector product score value is minus frequently while, the opposite number of described empty vector product score value is frequently less than zero, then described expansion phase place equals described phase place and subtracts π rad.
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