CN105356890B - A kind of LDPC code drilling method based on importance sampling technology - Google Patents

Abstract

The errant bit locations that LDPC code decoding falls into trap collection in the process are searched out first with importance sampling technology based on the LDPC code drilling method of importance sampling technology in the present invention, then by these errant bit locations as a new selection criteria, in drilling method before being added to, by the code word for the different rates that newly-designed drilling method constructs, the LDPC code drilling method is adapted to the drilling method of various channels, to improve the bit error rate performance of LDPC code, there is preferable decoding performance in waterfall area and error floor area, the error floor of punching code word can be significantly reduced.

Description

A kind of LDPC code drilling method based on importance sampling technology

Technical field

The present invention relates to fields of communication technology, more particularly to a kind of LDPC code punching side based on importance sampling technology Method.

Background technique

The channel status of communication channel is usually moment variation at any time.Traditional channel coding is using fixed code Rate transmits information, and this way is inappropriate.When channel status is deteriorated, it is likely to result in increasing for transmission error rates； When channel status improves, it is likely to result in that transmission rate is excessively slow, the waste of resource.Can have by adaptive coding modulation Effect overcomes this disadvantage.Adaptive coding modulation can be with the variation of dynamically adapting channel, to improve transmission rate and biography Defeated reliability approaches Shannon capacity limit.I.e. when channel status is poor, transmitted with low bit- rate code word and low-order-modulated mode. When channel status improves, transmitted using high rate codewords and high order modulation mode.The key that adaptive coding modulation is implemented Exactly construct a series of different code word of code rates.The code word for constructing different code rates is through-rate compatible technique to realize.Speed From low to high, or flexible transformation from high to low, punching are rate-compatible technologies to the code rate that rate compatible technique may be implemented One kind, principle are to give a low-rate mother-code code word, then by deleting part check bit bit in code word, to come Improve the code rate of transmitted codewords.For example, a given code length is the code word of n-bit, the information bit of transmission is k, then the code Code rate be R=k/n, as female code carry out punch operation, it is assumed that delete d check bit altogether, then raising after Code rate is R '=k/ (n-d).

Ha.J is put forward for the first time a kind of grading sorting algorithm within 2006.Since LDPC code mainly passes through iterative decoding.Grouping row Sequence algorithm selects the node with different Iterative restoration numbers to punch, according to the number of the node of selection, to construct not With the LDPC code of code rate.Firstly, LDPC check matrix is launched into tree graph form.Further according to structure of the node on tree graph, All nodes be divided into n group (respectively 1 step can recovery nodes, 2 steps can recovery nodes ..., k step can recovery nodes ...), such as Shown in Fig. 1.1 step can recovery nodes be exactly in iterative decoding process, it is only necessary to an iteration, can by (quilt) transmit come Information is corrected.Each group of all nodes are finally passed through into specific regularly arranged sequence.All nodes have reformed into one A orderly sequence is aligned to n-th group from the 1st group.The code rate constructed as needed selects to beat from the starting end of this sequence Hole node.

Grading sorting algorithm be on the basis of tree graph come select punching node.What all punching nodes restored in decoding It in the process, is all to restore according to designed tree graph, i.e., in iterative decoding process, by not punching section in tree graph Point passes to punching node correct information, to correct punching node.Algorithm more selects 1 when node is punched in selection as far as possible Step can recovery nodes or 2 steps can recovery nodes.It is this to restore the shorter node of step-length, it can be by the check information collection of mass efficient In on one's body.Since a large amount of effectively check information is concentrated in these near nodals, then remaining longer recovery step-length Node around effective check information with regard to seldom.When this has resulted in decoding recovery, the longer node for restoring step-length decodes wrong Probability accidentally is larger, and therefore, grading sorting algorithm forms a kind of mode of greedy selection, i.e., when selecting node to be deleted Suboptimization, but whole decoding performance is not fine.

In recent years, the drilling method occurred is all improved on the basis of grading sorting algorithm, some algorithms increase The search of some internal structures, such as stop collection, ring external information degree etc..These new drilling methods in performance It improves, but method is confined to certain particular channel, the latter ignores the influence of channel.

Summary of the invention

It is an object of the invention to overcome the poor disadvantage of above-mentioned packet sequencing method performance, proposing one kind can be fitted The drilling method of various channels is answered, to improve the bit error rate performance of LDPC code, and significantly reduces punching codeword error leveling A kind of LDPC code drilling method based on importance sampling technology.

A kind of LDPC code drilling method based on importance sampling technology, comprising the following steps:

1) LDPC code is emulated under a certain channel, is found when the performance curve of LDPC code enters error floor Snr threshold；

3) under this snr threshold, using important sampling technology, wrong impact is carried out to LDPC code, and record and cause The node location and errors number of LDPC code decoding error；

3) errors number recorded according to step 2), it is descending, corresponding node is ranked up.These nodes are all Biggish point is endangered to LDPC code decoding performance.With the sequence of this sequence, node harmfulness is gradually reduced.This sequence is divided into M group, respectively S_m,S_m-1,…,S₁；

4) according to target bit rate R ', the check bit number for needing to delete is calculated, wherein N be The length of female code, K are information bit length；

5) satisfactory node is selected according to certain rule, constitutes set omega₂；

If 6) set omega₂With set S_mIntersection be not it is empty, then a node conduct is randomly choosed in their intersection Node is punched, otherwise with regard to constant search set omega₂With set S_m-1Intersection.If until set omega₂With set S₁Intersection For sky, just in set omega₂Middle one node of random selection is as punching node；

7) repetitive operation step 5), 6), until meeting the number N of deleted bit_p, reach target bit rate.

In the preferred embodiment, satisfactory node is selected according to certain rule in the step 5),

Constitute set omega₂, it carries out as follows:

A) all connection punching least check-nodes of node are deposited into set C^*；

B) set C^*In in all check-node, do not punch number of nodes in the recovery tree of each check-node expansion Least check-node is deposited into set C '；

C) all variable nodes being connected with the check-node in set C ' are deposited into set omega；

D) the least variable of punching node total number for the same check-node that in set omega, is connected with each variable node Node is deposited into set omega₁In；

E) set omega₁In, the check-node being connected with each variable node, the recovery tree being unfolded with these check-nodes In the least variable node of the sum of node total number that do not punch be deposited into set omega₂In.

In the preferred embodiment, it is carried out as follows in the step 7):

A) from all variable node V_j, j ∈ { 1 ..., n } is middle to delete that selected node of step 6)；

B) by N_pValue subtract one.If N_pIt is zero, then method terminates, otherwise repeatedly step 3), step 4), step 5).

The LDPC code drilling method based on importance sampling technology in the present invention is searched first with importance sampling technology Rope goes out the errant bit locations that LDPC code decoding falls into trap collection in the process, then that these errant bit locations are new as one Selection criteria, should by the code word for the different rates that newly-designed drilling method constructs in the drilling method before being added to LDPC code drilling method is adapted to the drilling method of various channels, to improve the bit error rate performance of LDPC code, in waterfall area and There is preferable decoding performance in error floor area, can significantly reduce the error floor of punching code word.

Detailed description of the invention

Fig. 1 is packet sequencing method grouping schematic diagram；

Fig. 2 is that the present invention illustrates the comparison of regular LDPC code puncturing schemes and conventional method error rate of system simulation result Figure；

Fig. 3 is that the present invention shows irregular LDPC codes puncturing schemes and the comparison of conventional method error rate of system simulation result It is intended to.

Specific embodiment

Following further describes the present invention with reference to the drawings,

It is N, female code of a length of K of information bit, check matrix H for a code length_m×n, (m=N-K, n=N), this hair It is bright that the specific implementation steps are as follows:

Step 1, LDPC code is emulated under Gaussian channel, the performance curve for finding LDPC code enters error floor When snr threshold x；

Step 2, using important sampling technology, wrong impact is carried out to LDPC code, impact signal is n bit Gaussian noise, I.e. in the code word after LDPC code coded modulation, n bit Gaussian noise is added, tests its decoding performance.Signal-to-noise ratio settings are letter It makes an uproar than threshold value x.Mistake number of shocks is set as 2,000,000 times.The LDPC decoded state after mistake impact is observed in receiving end, And record the decoding error number T of each node_i。

Step 3, the errors number recorded according to step 2, it is descending, corresponding node is ranked up.These nodes It is all that biggish point is endangered to LDPC code decoding performance.If the maximum errors number of all error nodes is T_max.By this sequence Column are divided into m group, respectively S_m,S_m-1,…,S₁, the errors number T of node_iBelong to range ((x-1) * T_max/m,x*T_max/ m] when, Node is stored in set S_x.That is, set S₁Corresponding range is (0, T_max/ m], set S_mCorresponding range is ((m-1) T_max/m, T_max]。

Step 4, according to target bit rate, the information bit number for needing to delete is calculated.

If R ' is the target bit rate after punching, N_pTo need the check bit total number deleted, it is easy to get according to code rate definition:

R '=K/ (N-N_p) (1)

According to (1) formula, the information bit total number for needing to delete is calculated are as follows:

Step 5, satisfactory node is selected according to certain rule, constitutes set omega₂。

All row C in 5a. check matrix_i, i ∈ { 1 ..., m } (every a line is known as a check-node).Each school It tests the node variable node number being perforated that is connected and is denoted as F (c).The smallest check-node of F (c) is deposited into set C^*；

The variable node number that do not punch in the recovery tree that 5b. is unfolded with each check-node c is denoted as U (c).Set C^* In in all check-node, the smallest check-node of U (c) is deposited into set C '；

5c. is deposited into all variable node v being connected with the check-node in set C ' in set omega；

For 5d. for a variable node v, the number that the punching variable node of identical check-node c is connect with it is denoted as H (v).In set omega, the smallest variable node of H (v) is deposited into set omega₁In；

For 5e. for a variable node v, the summation of U (c) value for all check-nodes being connected with it is denoted as K (v).? Set omega₁In, the smallest variable node of K (v) is deposited into set omega₂In.

Step 6, if set omega₂With set S_mIntersection be not it is empty, then a node is randomly choosed in their intersection As punching node, otherwise with regard to constant search set omega₂With set S_m-1Intersection.If until set omega₂With set S₁Friendship Collection is also sky, just in set omega₂Middle one node of random selection is as punching node v^*。

Step 7, repetitive operation step 5), 6), until meeting the number N of deleted bit_p, reach target bit rate.

7.a is from all variable node V_j, j ∈ { 1 ..., n } is middle to delete that selected node of step 6).

7.b is by N_pValue subtract one.If N_pIt is zero, then method terminates.Otherwise step 3), step 4), step 5) are repeated.

Effect of the invention can be further illustrated by following emulation:

The present invention emulates the regular LDPC code and irregular LDPC codes for selecting 1008 bit of code length, code rate 0.5, believes in AWGN Error rate of system performance simulation is carried out under road, has selected the various code rates such as 0.5,0.6,0.7,0.8 and 0.9, the result of emulation is such as Shown in Fig. 2 and Fig. 3.

From Figure 2 it can be seen that the present invention is used in irregular LDPC codes, compared with traditional drilling method, in waterfall area and mistake Leveling zone all obtains preferable performance boost.Especially in error floor region, which obtains the increasing of 0.4dB Benefit.

As seen from Figure 3, the present invention is in regular LDPC code, compared with traditional drilling method, in waterfall area and error floor Area all obtains preferable performance boost.Especially in error floor region, which obtains the gain of 0.2dB.

It is searched in conclusion being somebody's turn to do the LDPC code drilling method based on importance sampling technology first with importance sampling technology Rope goes out the errant bit locations that LDPC code decoding falls into trap collection in the process, then that these errant bit locations are new as one Selection criteria, should by the code word for the different rates that newly-designed drilling method constructs in the drilling method before being added to LDPC code drilling method is adapted to the drilling method of various channels, to improve the bit error rate performance of LDPC code, in waterfall area and There is preferable decoding performance in error floor area, can significantly reduce the error floor of punching code word.

It above are only a specific embodiment of the invention, but the design concept of the present invention is not limited to this, all utilizations This design makes a non-material change to the present invention, and should all belong to behavior that violates the scope of protection of the present invention.

Claims (3)

1. a kind of LDPC code drilling method based on importance sampling technology, it is characterised in that: the following steps are included:

1) LDPC code is emulated under a certain channel, finds the noise when performance curve of LDPC code enters error floor Compare threshold value；

2) under this snr threshold, using important sampling technology, wrong impact is carried out to LDPC code, and record and cause LDPC The node location and errors number of code decoding error；

3) errors number recorded according to step 2), it is descending, corresponding node is ranked up, these nodes are all pair LDPC code decoding performance endangers biggish point, and with the sequence of this sequence, node harmfulness is gradually reduced, this sequence is divided into m Group, respectively S_m,S_m-1,…,S₁；

4) according to target bit rate R ', the check bit number for needing to delete is calculatedWherein N is female code Length, K be information bit length；

5) satisfactory node is selected according to certain rule, constitutes set omega₂；

If 6) set omega₂With set S_mIntersection be not it is empty, then a node is randomly choosed in their intersection as punching Node, otherwise with regard to constant search set omega₂With set S_m-1Intersection, if until set omega₂With set S₁Intersection be also it is empty, Just in set omega₂Middle one node of random selection is as punching node；

7) repetitive operation step 5), 6), until meeting the number N of deleted bit_p, reach target bit rate.

2. the LDPC code drilling method according to claim 1 based on importance sampling technology, it is characterised in that: the step It is rapid 5) according to certain rule select satisfactory node, constitute set omega₂, it carries out as follows:

A) all connection punching least check-nodes of node are deposited into set C^*；

B) set C^*In in all check-node, it is minimum not punch number of nodes in the recovery tree of each check-node expansion Check-node be deposited into set C '；

C) all variable nodes being connected with the check-node in set C ' are deposited into set omega；

D) the least variable node of punching node total number for the same check-node that in set omega, is connected with each variable node It is deposited into set omega₁In；

E) set omega₁In, the check-node being connected with each variable node, in the recovery tree of these check-nodes expansion The least variable node of the sum of node total number is not punched is deposited into set omega₂In.

3. the LDPC code drilling method according to claim 1 based on importance sampling technology, it is characterised in that:

The step 7) carries out as follows:

A) from all variable node V_j, j ∈ { 1 ..., n } is middle to delete that selected node of step 6)；

B) by N_pValue subtract one: if N_pIt is zero, then method terminates, otherwise repeatedly step 3), step 4), step 5).