CN105335305A - Buffer mechanism implementation method and device for interactive type programmable hardware - Google Patents
Buffer mechanism implementation method and device for interactive type programmable hardware Download PDFInfo
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- CN105335305A CN105335305A CN201510725188.0A CN201510725188A CN105335305A CN 105335305 A CN105335305 A CN 105335305A CN 201510725188 A CN201510725188 A CN 201510725188A CN 105335305 A CN105335305 A CN 105335305A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
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Abstract
The invention discloses a buffer mechanism implementation method and a buffer mechanism implementation device for interactive type programmable hardware. The buffer mechanism implementation method comprises the following steps: S1, receiving an operation order and converting the operation order into an order capable of being recognized by hardware; S2, comparing the order capable of being recognized by hardware with orders stored in an order buffer region to determine whether similar orders exist or not, if yes, replacing the corresponding similar order stored in the buffer region with the order capable of being recognized by hardware, otherwise, judging whether the order buffer region is full or not, if yes, replacing a first order of the order buffer region with the order capable of being recognized by hardware, otherwise, writing the order capable of being recognized by hardware into the order buffer region. According to the buffer mechanism implementation method, an order buffer mechanism is set in a communication process of an upper computer and a lower computer to relieve hardware pressure of the lower computer and control an order transmission rate of the upper computer, thereby avoiding breakdown, due to a too high order rate, of the hardware equipment of the lower computer.
Description
Technical field
The present invention relates to computer realm, particularly relate to a kind of buffering implementation method and device of interactive programmable hardware.
Background technology
In Scratch program is run, if there is infinite loop in program, usually the actual motion speed of this infinite loop will more than 500Hz, if there is the content with slave computer communication inside infinite loop, if without buffering, hardware instruction sends with the speed more than 500Hz to slave computer, and when the baud rate that most signal wiring adopts is only 115200b/s, host computer easily causes slave computer to be paralysed more than the command rate of 500Hz and cannot work on.
Summary of the invention
If in order to solve in host computer described above and slave computer communication process without buffering, easily cause slave computer to be paralysed and the problem that cannot work on, the invention provides a kind of buffering implementation method of interactive programmable hardware and the design proposal of device.
A buffering implementation method for interactive programmable hardware, comprises the following steps: S1, receives operational order, and converts described operational order the instruction of to hardware identifiable design; S2, whether the instruction that more described hardware identifiable design instruction and instruction buffer zone stores exists similar instruction, if exist, then the similar instruction of the correspondence described hardware identifiable design instruction replacement instruction buffer zone stored; If do not exist, then whether decision instruction buffer zone stores full, if store full, then the instruction of described hardware identifiable design is replaced the Article 1 instruction of described instruction buffer, if store less than, then the instruction of described hardware identifiable design is write described instruction buffer.
Concrete, whether every bar instruction that described hardware identifiable design instruction and instruction buffer zone stores is for existing similar instruction, specifically comprise: whether device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of more described hardware identifiable design stores is identical, when device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is identical, then there is similar instruction; The device number corresponding when the instruction of device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design storage is all not identical, then there is not similar instruction.
Concrete, described method also comprises: with the timing enquiry frequency pre-set timing query statement buffer zone, if Query Result be empty, then all instructions successively in transmission instruction buffer to specifying slave computer, and empty described instruction buffer; If Query Result is empty, then waits for and inquiring about next time.
More specifically, described timing enquiry frequency is 10 ~ 50Hz.
A buffering implement device for interactive programmable hardware, comprising: receiver module, for receiving operational order by human-computer interaction interface; Modular converter, for converting described operational order the instruction of to hardware identifiable design; Comparison module, whether the every bar instruction stored for more described hardware identifiable design instruction and instruction buffer zone exists similar instruction; Replacement module, when the instruction for storing when comparison module more described hardware identifiable design instruction and instruction buffer zone exists similar instruction, by the similar instruction of the correspondence that described hardware identifiable design instruction replacement instruction buffer zone stores; Whether judge module, when the instruction stored does not exist similar instruction, store full when comparison module more described hardware identifiable design instruction and instruction buffer zone for decision instruction buffer zone; Described replacement module, also for when judge module decision instruction buffer zone stores completely, then replaces the Article 1 instruction of described instruction buffer by the instruction of described hardware identifiable design; Writing module, for when judge module decision instruction buffer zone store less than time, then the instruction of described hardware identifiable design is write described instruction buffer.
Concrete, described comparison module also specifically for: whether device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of more described hardware identifiable design stores identical, when device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is identical, then there is similar instruction; When device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is all not identical, then there is not similar instruction.
Concrete, also comprise instructions query module, for the timer pre-set timing query statement buffer zone, if Query Result be empty, then all instructions successively in transmission instruction buffer to specifying slave computer, and empty described instruction buffer; If Query Result is empty, then waits for and inquiring about next time.
In sum, the present invention has following beneficial effect: by arranging instruction buffer mechanism in the communication process of host computer and slave computer, the hardware pressure of slave computer can be alleviated, and control the command speed of host computer, avoid the hardware device of slave computer to cause paralysis because of too fast command rate.
Accompanying drawing explanation
The schematic flow sheet of the buffering implementation method of the interactive programmable hardware that Fig. 1 provides for the embodiment of the present invention.
The schematic flow sheet of the buffering implementation method of the another interactive programmable hardware that Fig. 2 provides for the embodiment of the present invention.
The structural drawing of the buffering implement device of the interactive programmable hardware that Fig. 3 provides for the embodiment of the present invention.
Embodiment
In order to allow those skilled in the art can understand technical scheme of the present invention better, below in conjunction with accompanying drawing, the invention will be further elaborated.
As shown in Figure 1, present invention is disclosed a kind of buffering implementation method of interactive programmable hardware, comprise the following steps:
S1, receives operational order, and converts described operational order the instruction of to hardware identifiable design.
S2, whether the instruction that more described hardware identifiable design instruction and instruction buffer zone stores exists similar instruction, if exist, then the similar instruction of the correspondence described hardware identifiable design instruction replacement instruction buffer zone stored; If do not exist, then whether decision instruction buffer zone stores full, if store full, then the instruction of described hardware identifiable design is replaced the Article 1 instruction of described instruction buffer, if store less than, then the instruction of described hardware identifiable design is write described instruction buffer.
Concrete, in embodiments of the present invention, whether every bar instruction that more described hardware identifiable design instruction and instruction buffer zone stores is for existing similar instruction, specifically comprise: whether device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of more described hardware identifiable design stores is identical, when device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is identical, then there is similar instruction; When device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is all not identical, then there is not similar instruction.Distinct device (equipment such as the fan on such as experimental box, tri coloured lantern) for same hardware is provided with different device numbers, and device number represents with integer, and device number can be embodied in the instruction of hardware identifiable design.Like this, the present invention just achieves judgement and the replacement of similar instruction in hardware identifiable design instruction and instruction buffer zone.
In another embodiment of the buffering implementation method of a kind of interactive programmable hardware of the present invention, as shown in Figure 2, said method comprising the steps of (wherein step S11, S22 are identical with the step S1 in embodiment one, S2, therefore no longer describe in detail):
S11, receives operational order, and converts described operational order the instruction of to hardware identifiable design.
S22, whether the instruction that more described hardware identifiable design instruction and instruction buffer zone stores exists similar instruction, if exist, then the similar instruction of the correspondence described hardware identifiable design instruction replacement instruction buffer zone stored; If do not exist, then whether decision instruction buffer zone stores full, if store full, then the instruction of described hardware identifiable design is replaced the Article 1 instruction of described instruction buffer, if store less than, then the instruction of described hardware identifiable design is write described instruction buffer.
S33, with the timing enquiry frequency pre-set timing query statement buffer zone, if Query Result be empty, then all instructions successively in transmission instruction buffer to specifying slave computer, and empty described instruction buffer; If Query Result is empty, then waits for and inquiring about next time.
Concrete, in the embodiment of the present invention, the timer enquiry frequency of general setting is 10 ~ 50Hz, but be not limited thereto enquiry frequency, it be every 0.1S that timer starts time of query statement buffer zone, timer frequency much smaller than do not arrange instruction buffer machine-processed time the writing rate of 500Hz, the hardware pressure of slave computer can be alleviated, and controlling the command speed of host computer, the hardware device avoiding slave computer is paralysed because of too fast instruction writing rate.
Contrast Fig. 3, the buffering implementation method of corresponding above-mentioned interactive programmable hardware, the present invention also proposes a kind of buffering implement device of interactive programmable hardware, comprising: receiver module, for receiving operational order by human-computer interaction interface.
Modular converter, for converting described operational order the instruction of to hardware identifiable design.
Comparison module, whether the every bar instruction stored for more described hardware identifiable design instruction and instruction buffer zone exists similar instruction.
Concrete, in embodiments of the present invention, described comparison module also specifically for: whether device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of more described hardware identifiable design stores identical, when device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is identical, then there is similar instruction; When device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is all not identical, then there is not similar instruction.
Replacement module, when the instruction for storing when comparison module more described hardware identifiable design instruction and instruction buffer zone exists similar instruction, by the similar instruction of the correspondence that described hardware identifiable design instruction replacement instruction buffer zone stores.
In embodiments of the present invention, the instruction of described hardware identifiable design also for when judge module decision instruction buffer zone stores completely, is then replaced the Article 1 instruction of described instruction buffer by replacement module.
Judge module, when the instruction for storing when comparison module more described hardware identifiable design instruction and instruction buffer zone does not exist similar instruction, whether decision instruction buffer zone stores full.
Writing module, for when judge module decision instruction buffer zone store less than time, then the instruction of described hardware identifiable design is write described instruction buffer.
In embodiments of the present invention, also comprise instructions query module, for the timer pre-set timing query statement buffer zone, if Query Result is not empty, then send all instructions in instruction buffer successively to specifying slave computer, and empty described instruction buffer; If Query Result is empty, then waits for and inquiring about next time.
The present embodiment is more excellent embodiment of the present invention, and the part be not described in detail all adopts known mature technology.It should be noted that; when not deviating from the present invention's spirit and essence thereof; those of ordinary skill in the art are when making various corresponding change and distortion according to the present invention, but these change and are out of shape the protection domain that all should belong to the claim appended by the present invention.
Claims (7)
1. a buffering implementation method for interactive programmable hardware, is characterized in that, comprise the following steps:
S1, receives operational order, and converts described operational order the instruction of to hardware identifiable design;
S2, whether the instruction that more described hardware identifiable design instruction and instruction buffer zone stores exists similar instruction, if exist, then the similar instruction of the correspondence described hardware identifiable design instruction replacement instruction buffer zone stored; If do not exist, then whether decision instruction buffer zone stores full, if store full, then the instruction of described hardware identifiable design is replaced the Article 1 instruction of described instruction buffer, if store less than, then the instruction of described hardware identifiable design is write described instruction buffer.
2. the buffering implementation method of interactive programmable hardware according to claim 1, it is characterized in that, whether every bar instruction that described hardware identifiable design instruction and instruction buffer zone stores is for existing similar instruction, specifically comprise: whether device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of more described hardware identifiable design stores is identical, when device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is identical, then there is similar instruction; The device number corresponding when the instruction of device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design storage is all not identical, then there is not similar instruction.
3. according to the buffering implementation method of the interactive programmable hardware one of claim 1-2 Suo Shu, it is characterized in that, described method also comprises:
With the timing enquiry frequency pre-set timing query statement buffer zone, if Query Result be empty, then all instructions successively in transmission instruction buffer to specifying slave computer, and empty described instruction buffer; If Query Result is empty, then waits for and inquiring about next time.
4. the buffering implementation method of interactive programmable hardware according to claim 3, is characterized in that, described timing enquiry frequency is 10 ~ 50Hz.
5. a buffering implement device for interactive programmable hardware, is characterized in that, comprising:
Receiver module, for receiving operational order by human-computer interaction interface;
Modular converter, for converting described operational order the instruction of to hardware identifiable design;
Comparison module, whether the every bar instruction stored for more described hardware identifiable design instruction and instruction buffer zone exists similar instruction;
Replacement module, when the instruction for storing when comparison module more described hardware identifiable design instruction and instruction buffer zone exists similar instruction, by the similar instruction of the correspondence that described hardware identifiable design instruction replacement instruction buffer zone stores;
Judge module, when the instruction for storing when comparison module more described hardware identifiable design instruction and instruction buffer zone does not exist similar instruction, whether decision instruction buffer zone stores full;
Described replacement module, also for when judge module decision instruction buffer zone stores completely, then replaces the Article 1 instruction of described instruction buffer by the instruction of described hardware identifiable design;
Writing module, for when judge module decision instruction buffer zone store less than time, then the instruction of described hardware identifiable design is write described instruction buffer.
6. the buffering implement device of interactive programmable hardware according to claim 5, it is characterized in that, described comparison module also specifically for: whether device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of more described hardware identifiable design stores identical, when device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is identical, then there is similar instruction; When device number corresponding in the instruction that device number and instruction buffer zone corresponding in the instruction of described hardware identifiable design stores is all not identical, then there is not similar instruction.
7. according to the buffering implement device of the interactive programmable hardware one of claim 5-6 Suo Shu, it is characterized in that, also comprise instructions query module, for with the timer pre-set timing query statement buffer zone, if Query Result is not empty, then send all instructions in instruction buffer successively to specifying slave computer, and empty described instruction buffer; If Query Result is empty, then waits for and inquiring about next time.
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| CN201510725188.0A CN105335305B (en) | 2015-10-30 | 2015-10-30 | The buffering implementation method and device of a kind of interactive programmable hardware |
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| CN201510725188.0A CN105335305B (en) | 2015-10-30 | 2015-10-30 | The buffering implementation method and device of a kind of interactive programmable hardware |
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1853151A (en) * | 2003-09-16 | 2006-10-25 | 皇家飞利浦电子股份有限公司 | Power saving operation of an apparatus with a cache memory |
| US20090216949A1 (en) * | 2008-02-25 | 2009-08-27 | International Business Machines Corporation | Method and system for a multi-level virtual/real cache system with synonym resolution |
| CN101630269A (en) * | 2009-07-03 | 2010-01-20 | 中国人民解放军国防科学技术大学 | Block-based method for scanning object code and replacing sensitive instruction |
| CN101694639A (en) * | 2009-10-15 | 2010-04-14 | 清华大学 | Computer data caching method |
| CN101878467A (en) * | 2007-11-02 | 2010-11-03 | 高通股份有限公司 | Predecode repair cache for instructions that cross an instruction cache line |
| US20110231593A1 (en) * | 2010-03-19 | 2011-09-22 | Kabushiki Kaisha Toshiba | Virtual address cache memory, processor and multiprocessor |
| CN103348333A (en) * | 2011-12-23 | 2013-10-09 | 英特尔公司 | Methods and apparatus for efficient communication between caches in hierarchical caching design |
| CN103679039A (en) * | 2012-09-06 | 2014-03-26 | 北京中天安泰信息科技有限公司 | Data security storage method and device |
-
2015
- 2015-10-30 CN CN201510725188.0A patent/CN105335305B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1853151A (en) * | 2003-09-16 | 2006-10-25 | 皇家飞利浦电子股份有限公司 | Power saving operation of an apparatus with a cache memory |
| CN101878467A (en) * | 2007-11-02 | 2010-11-03 | 高通股份有限公司 | Predecode repair cache for instructions that cross an instruction cache line |
| US20090216949A1 (en) * | 2008-02-25 | 2009-08-27 | International Business Machines Corporation | Method and system for a multi-level virtual/real cache system with synonym resolution |
| CN101630269A (en) * | 2009-07-03 | 2010-01-20 | 中国人民解放军国防科学技术大学 | Block-based method for scanning object code and replacing sensitive instruction |
| CN101694639A (en) * | 2009-10-15 | 2010-04-14 | 清华大学 | Computer data caching method |
| US20110231593A1 (en) * | 2010-03-19 | 2011-09-22 | Kabushiki Kaisha Toshiba | Virtual address cache memory, processor and multiprocessor |
| CN103348333A (en) * | 2011-12-23 | 2013-10-09 | 英特尔公司 | Methods and apparatus for efficient communication between caches in hierarchical caching design |
| CN103679039A (en) * | 2012-09-06 | 2014-03-26 | 北京中天安泰信息科技有限公司 | Data security storage method and device |
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