CN105320005B - Alarm clock circuitry and stereo set - Google Patents
Alarm clock circuitry and stereo set Download PDFInfo
- Publication number
- CN105320005B CN105320005B CN201410379796.6A CN201410379796A CN105320005B CN 105320005 B CN105320005 B CN 105320005B CN 201410379796 A CN201410379796 A CN 201410379796A CN 105320005 B CN105320005 B CN 105320005B
- Authority
- CN
- China
- Prior art keywords
- alarm clock
- input
- control circuit
- power source
- rtc
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Abstract
The invention discloses a kind of alarm clock circuitry, the circuit includes main power source input, stand-by power supply input, master controller, RTC circuit, the first alarm clock control circuit and the second alarm clock control circuit;The power input of first alarm clock control circuit is connected with main power source input;The power input of second alarm clock control circuit is connected with stand-by power supply input;The power input of RTC circuit is connected with main power source input and stand-by power supply input;The interrupt output end of RTC circuit is connected with the control signal of master controller and the second alarm clock control circuit;The control output end of master controller is connected with the control signal of the first alarm clock control circuit;The control output end of first alarm clock control circuit and the second alarm clock control circuit is connected with alarm clock acoustical generator.The invention also discloses a kind of stereo set.The present invention can main power source not on the auto-switch function of alarm clock calling is realized in the case of electricity.
Description
Technical field
The present invention relates to electronic technology field, more particularly to a kind of alarm clock circuitry and stereo set.
Background technology
At present, the species of stereo set is more and more, and the function of stereo set is also more and more personalized, although Vehicles Collected from Market
On also there are much stereo sets with alarm clock calling function.
The existing stereo set with alarm clock calling function must be in the case where inserting power supply (i.e. power-up state), at that time
Between when reaching the alarm time pre-set, its alarm clock acoustical generator is sent sound to realize the automatic switch of alarm clock calling
Function;However, in the case where being not inserted into power supply (i.e. non-power-up state), when the time reaching the alarm time pre-set,
Its alarm clock acoustical generator is due to losing power supply, so as to send sound to realize alarm clock calling function.
The content of the invention
The main object of the present invention be ensure main power source not in the case of electricity, alarm clock circuitry is realized by stand-by power supply
Alarm clock calling auto-switch function.
To achieve the above object, the present invention provides a kind of alarm clock circuitry, and the alarm clock circuitry includes main power source input, standby
With power input, master controller, RTC circuit, alarm clock acoustical generator, for controlling the alarm clock to send out in main power source power-up state
First alarm clock control circuit of sound device sounding, and for controlling the alarm clock acoustical generator sounding in the non-power-up state of main power source
The second alarm clock control circuit;Wherein,
The power input of the master controller and the power input of the first alarm clock control circuit with the master
Power input connects;The power input of the second alarm clock control circuit is connected with the stand-by power supply input;It is described
The power input of RTC circuit is connected with the main power source input and the stand-by power supply input respectively;The RTC circuit
Interrupt output end respectively with the control signal of the master controller and the control signal of the second alarm clock control circuit
Connection;The control output end of the master controller is connected with the control signal of the first alarm clock control circuit;Described first
The control output end of alarm clock control circuit and the control output end of the second alarm clock control circuit with the alarm clock acoustical generator
Connection;
The alarm clock circuitry also includes anti-electric current back flow circuit, and the power input of the RTC circuit is through the anti-electric current
Back flow circuit is connected with the main power source input and the stand-by power supply input respectively;
The first alarm clock control circuit includes first resistor, second resistance, 3rd resistor, the first electric capacity and the poles of NPN tri-
Pipe;Wherein,
The first end of the first resistor is connected with the control output end of the master controller, and the second of the first resistor
End is connected with the base stage of the NPN triode and the first end of the second resistance respectively;Second termination of the second resistance
Ground;First electric capacity is in parallel with the second resistance;The first end of the 3rd resistor is connected with the main power source input,
Second end of the 3rd resistor is connected with the colelctor electrode of the NPN triode;The emitter stage of the NPN triode makes a noise with described
Clock acoustical generator connects.
Preferably, the second alarm clock control circuit includes the 4th resistance, the 5th resistance, PNP triode, NMOS tube and electricity
Solve electric capacity;Wherein,
The base stage of the PNP triode is connected with the interrupt output end of the RTC circuit;The transmitting of the PNP triode
Pole is connected with the stand-by power supply input, the colelctor electrode of the PNP triode respectively with the source electrode of the NMOS tube and described
The first end connection of 5th resistance, the second end of the 5th resistance is connected with the positive pole of the electrochemical capacitor;The electrolysis electricity
The negative pole ground connection of appearance;The grid of the NMOS tube is connected through the 4th resistance with the positive pole of the electrochemical capacitor, the NMOS
The drain electrode of pipe is connected with the alarm clock acoustical generator.
Preferably, the RTC circuit includes RTC chip, the second electric capacity, the 3rd electric capacity and crystal oscillator;Wherein,
The power input pin of the RTC chip through the anti-electric current back flow circuit respectively with the main power source input and
The stand-by power supply input connection, the clock pins and data pin of the RTC chip communicate with the IIC of the master controller
Interface connects, the interrupt output pin of the RTC chip control signal with the master controller and the poles of the PNP tri- respectively
The base stage connection of pipe;The first end of the crystal oscillator is shaken with the first end of second electric capacity and the first of the RTC chip respectively
Pin connection is swung, the second end of the crystal oscillator vibrates with the first end of the 3rd electric capacity and the second of the RTC chip respectively
Pin connects;Second end of second electric capacity and the second end of the 3rd electric capacity are grounded.
Preferably, the anti-electric current back flow circuit includes the first diode and the second diode;Wherein,
The anode of first diode is connected with the main power source input;The anode of second diode with it is described
Stand-by power supply input connects;The negative electrode of the negative electrode of first diode and second diode with the RTC chip
Power input pin connection.
Preferably, the voltage of the main power source input and the stand-by power supply input is 3.3V.
Preferably, the alarm clock circuitry also includes the 6th resistance, the 4th electric capacity and the 5th electric capacity;Wherein,
The first end of 6th resistance respectively with the negative electrode of first diode and the negative electrode of second diode
Connection, the second end of the 6th resistance respectively with the interrupt output pin of the RTC chip and the base stage of the PNP triode
Connection;4th electric capacity is in parallel with the 5th electric capacity, and with the 6th resistor coupled in parallel.
Preferably, the alarm clock acoustical generator is buzzer;The positive pole of the buzzer hair with the NPN triode respectively
The drain electrode connection of emitter-base bandgap grading and the NMOS tube, the negative pole ground connection of the buzzer.
In addition, to achieve the above object, the present invention also provides a kind of stereo set, the stereo set includes alarm clock electricity
Road, the alarm clock circuitry include main power source input, stand-by power supply input, master controller, RTC circuit, alarm clock acoustical generator, use
The first alarm clock control circuit of the alarm clock acoustical generator sounding is controlled when in main power source power-up state, and in main power source
The second alarm clock control circuit of the alarm clock acoustical generator sounding is controlled during non-power-up state;Wherein,
The power input of the master controller and the power input of the first alarm clock control circuit with the master
Power input connects;The power input of the second alarm clock control circuit is connected with the stand-by power supply input;It is described
The power input of RTC circuit is connected with the main power source input and the stand-by power supply input respectively;The RTC circuit
Interrupt output end respectively with the control signal of the master controller and the control signal of the second alarm clock control circuit
Connection;The control output end of the master controller is connected with the control signal of the first alarm clock control circuit;Described first
The control output end of alarm clock control circuit and the control output end of the second alarm clock control circuit with the alarm clock acoustical generator
Connection.
Alarm clock circuitry provided by the invention, including main power source input, stand-by power supply input, master controller, RTC electricity
Road, alarm clock acoustical generator, the first alarm clock control circuit for controlling alarm clock acoustical generator sounding in main power source power-up state, and
For controlling the second alarm clock control circuit of alarm clock acoustical generator sounding in the non-power-up state of main power source;Wherein, master controller
Power input and the power input of the first alarm clock control circuit are connected with main power source input;Second alarm clock control circuit
Power input be connected with stand-by power supply input;The power input of RTC circuit respectively with main power source input and standby
Power input connects;The interrupt output end of RTC circuit is electric with the control signal of master controller and the control of the second alarm clock respectively
The control signal connection on road;The control output end of master controller is connected with the control signal of the first alarm clock control circuit;The
The control output end of one alarm clock control circuit and the control output end of the second alarm clock control circuit are connected with alarm clock acoustical generator.This
The alarm clock circuitry that invention provides can ensure main power source not in the case of electricity, alarm clock calling is realized by stand-by power supply
Auto-switch function.Also, alarm clock circuitry of the present invention also has simple in construction and the advantages of easily realize.
Brief description of the drawings
Fig. 1 is the modular structure schematic diagram of the embodiment of alarm clock circuitry one of the present invention;
Fig. 2 is the electrical block diagram of the embodiment of alarm clock circuitry one of the present invention.
The realization, functional characteristics and advantage of the object of the invention will be described further referring to the drawings in conjunction with the embodiments.
Embodiment
It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not intended to limit the present invention.
Reference picture 1, Fig. 1 are the modular structure schematic diagrams of the embodiment of alarm clock circuitry one of the present invention.
The alarm clock circuitry includes main power source input 101, stand-by power supply input 102, master controller 103, RTC circuit
104th, the first alarm clock control circuit 105, the second alarm clock control circuit 106, alarm clock acoustical generator 107 and anti-electric current back flow circuit 108.
Wherein, main power source input 101, for inputting main power source.
Stand-by power supply input 102, for inputting stand-by power supply, the stand-by power supply can be button cell or
Dry cell.In the present embodiment, the voltage of the stand-by power supply input 102 is equal to the electricity that above-mentioned main power source input 101 is inputted
Pressure;
Master controller 103, in main power source power-up state when main power source (main power source input 101 access), root
According to interrupt signal caused by RTC circuit 104, the control for exporting corresponding control signal to the first alarm clock control circuit 105 is defeated
Enter end;
RTC circuit 104, for time counting, and when the time reaching default alarm time, export corresponding interrupt
Signal is to the alarm clock control circuit 106 of master controller 103 and second;
First alarm clock control circuit 105, for (main power source input 101 to access main electricity in main power source power-up state
During source), the control signal exported according to master controller 103, the sounding of control alarm clock acoustical generator 107;In the present embodiment, alarm clock sounding
Device 107 can be buzzer;
Second alarm clock control circuit 106, for (main power source input 101 not to access in the non-power-up state of main power source
During main power source), according to interrupt signal caused by RTC circuit 104, control the alarm clock acoustical generator sounding;
Anti- electric current back flow circuit 108, for preventing main power source input 101 and the electric current of stand-by power supply input 102 from falling
Fill.
Specifically, the power input of the master controller 103 is connected with the main power source input 101;Described first
The power input of alarm clock control circuit 105 is also connected with the main power source input 101;The second alarm clock control circuit
106 power input is connected with the stand-by power supply input 102;The power input of the RTC circuit 104 is through described anti-
Electric current back flow circuit 108 is connected with the main power source input 101 and the stand-by power supply input 102 respectively;The RTC electricity
The interrupt output end on road 104 is connected with the control signal of the master controller 103, the interrupt output end of the RTC circuit 104
Control signal also with the second alarm clock control circuit 106 is connected;The control output end of the master controller 103 with it is described
The control signal connection of first alarm clock control circuit 105;The control output end of the first alarm clock control circuit 105 with it is described
Alarm clock acoustical generator 107 connects;The control output end of the second alarm clock control circuit 106 also connects with the alarm clock acoustical generator 107
Connect.
The operation principle of alarm clock circuitry of the present invention is described in detail below:When the present embodiment alarm clock circuitry on main power source electric shape
During state (when main power source input 101 accesses main power source), and when the time reaching default alarm time, RTC circuit 104
Interrupt output end exports low level interrupt signal (being high level during normality) to master controller 103, a master controller 103 and known
After being clipped to this interrupt signal, control signal to the first alarm clock that master controller 103 exports a predeterminated frequency (such as 1KHz) controls electricity
The control signal on road 105, the first alarm clock control circuit 105 are sent out according to the control signal received, control alarm clock acoustical generator 107
Sound, realizing alarm clock calling function, (the time length of the sounding of alarm clock acoustical generator 107 and the frequency of sounding can be by master controllers 103
It is configured);
When the present embodiment alarm clock circuitry is in the non-power-up state of main power source, (main power source input 101 does not access main power source
When), the voltage inputted by stand-by power supply input 102 is that the RTC circuit 104 and second in the present embodiment alarm clock circuitry is noisy
It (is that the alarm clock control circuit 106 of RTC circuit 104 and second supplies i.e. by button cell or dry cell that clock control circuit 106, which is powered,
Electricity) so that RTC circuit 104 can carry out Counts.When the time reaching default alarm time, the interruption of RTC circuit 104
Output end exports a low level interrupt signal (being high level during normality) to the control input of the second alarm clock control circuit 106
End, the second alarm clock control circuit 106 sounding of control alarm clock acoustical generator 107, realize alarm clock calling according to the interrupt signal received
(the time length of the sounding of alarm clock acoustical generator 107 can be real by adjusting the hardware parameter in the second alarm clock control circuit 106 for function
It is existing).
The alarm clock circuitry that the present embodiment provides, including main power source input, stand-by power supply input, master controller, RTC electricity
Road, alarm clock acoustical generator, the first alarm clock control circuit for controlling alarm clock acoustical generator sounding in main power source power-up state, and
For controlling the second alarm clock control circuit of alarm clock acoustical generator sounding in the non-power-up state of main power source;Wherein, master controller
Power input and the power input of the first alarm clock control circuit are connected with main power source input;Second alarm clock control circuit
Power input be connected with stand-by power supply input;The power input of RTC circuit respectively with main power source input and standby
Power input connects;The interrupt output end of RTC circuit is electric with the control signal of master controller and the control of the second alarm clock respectively
The control signal connection on road;The control output end of master controller is connected with the control signal of the first alarm clock control circuit;The
The control output end of one alarm clock control circuit and the control output end of the second alarm clock control circuit are connected with alarm clock acoustical generator.This
The alarm clock circuitry that embodiment provides can ensure main power source not in the case of electricity, alarm clock calling is realized by stand-by power supply
Auto-switch function.
Reference picture 2, Fig. 2 are the electrical block diagrams of the embodiment of alarm clock circuitry one of the present invention.
The alarm clock circuitry includes main power source input VCC1, stand-by power supply input BATVCC, master controller 203, RTC electricity
Road 204, the first alarm clock control circuit 205, the second alarm clock control circuit 206, alarm clock acoustical generator P1 and anti-electric current back flow circuit
208.In the present embodiment, main power source input VCC1 and stand-by power supply input BATVCC voltage is 3.3V, stand-by power supply
Can be button cell or dry cell.Alarm clock acoustical generator P1 is buzzer.
Specifically, above-mentioned first alarm clock control circuit 205 includes first resistor R1, second resistance R2,3rd resistor R3, the
One electric capacity C1 and NPN triode Q1;
Wherein, the first end of the first resistor R1 is connected with the control output end of the master controller 203, and described first
Resistance R1 the second end is connected with the base stage of the NPN triode Q1 and the first end of the second resistance R2 respectively;Described
Two resistance R2 the second end ground connection;The first electric capacity C1 is in parallel with the second resistance R2;The first of the 3rd resistor R3
End is connected with the main power source input VCC1, the second end of the 3rd resistor R3 and the colelctor electrode of the NPN triode Q1
Connection;The emitter stage of the NPN triode Q1 is connected with the positive pole of the alarm clock acoustical generator P1 (buzzer);Alarm clock acoustical generator P1
The negative pole ground connection of (buzzer).
Above-mentioned second alarm clock control circuit 206 includes the 4th resistance R4, the 5th resistance R5, PNP triode Q2, NMOS tube Q3
And electrochemical capacitor CE1;
Wherein, the base stage of the PNP triode Q2 is connected with the interrupt output end of the RTC circuit 204;The PNP tri-
Pole pipe Q2 emitter stage is connected with the stand-by power supply input BATVCC, the colelctor electrode of the PNP triode Q2 respectively with institute
State the first end connection of NMOS tube Q3 source electrode and the 5th resistance R5, the second end and the electrolysis of the 5th resistance R5
Electric capacity CE1 positive pole connection;The negative pole ground connection of the electrochemical capacitor CE1;The grid of the NMOS tube Q3 is through the 4th resistance
R4 is connected with the positive pole of the electrochemical capacitor CE1, the drain electrode of the NMOS tube Q3 and the alarm clock acoustical generator P1 (buzzer)
Positive pole connects.
Above-mentioned RTC circuit 204 includes RTC chip 2041, the second electric capacity C2, the 3rd electric capacity C3 and crystal oscillator Y1;
Wherein, the power input pin VDD of the RTC chip 2041 through the anti-electric current back flow circuit 208 respectively with institute
State main power source input VCC1 and the stand-by power supply input BATVCC connections, the clock pins SCL of the RTC chip 2041
And data pin SDA is connected with the IIC communication interfaces of the master controller 203, the interrupt output pin of the RTC chip 2041
INT/ is connected with the control signal of the master controller 203 and the base stage of the PNP triode Q2 respectively;The crystal oscillator Y1's
First end is connected with the first end of the second electric capacity C2 and the first vibration pin OSCI of the RTC chip 2041 respectively, institute
The second end for stating crystal oscillator Y1 vibrates pin with the first end of the 3rd electric capacity C3 and the second of the RTC chip 2041 respectively
OSCO connections;The second end of the second electric capacity C2 and the second end of the 3rd electric capacity C3 are grounded;Crystal oscillator Y1 ground termination
Ground.
Above-mentioned anti-electric current back flow circuit 208 includes the first diode D1 and the second diode D2;
Wherein, the anode of the first diode D1 is connected with the main power source input VCC1;Second diode
D2 anode is connected with the stand-by power supply input BATVCC;The negative electrode and second diode of the first diode D1
Power input pin VDD of the D2 negative electrode with the RTC chip 2041 is connected.
Further, the present embodiment alarm clock circuitry also includes the 6th resistance R6, the 4th electric capacity C4 and the 5th electric capacity C5.
Wherein, the first end of the 6th resistance R6 negative electrode with the first diode D1 and the two or two pole respectively
Pipe D2 negative electrode connection, the second end of the 6th resistance R6 interrupt output pin INT/ with the RTC chip 2041 respectively
And the base stage connection of the PNP triode Q2;The 4th electric capacity C4 is in parallel with the 5th electric capacity C5, and with the described 6th electricity
It is in parallel to hinder R6.
The operation principle of the present embodiment alarm clock circuitry is described in detail below:When the present embodiment alarm clock circuitry on main power source it is electric
During state (during main power source input VCC1 access main power sources), and when the time reaching default alarm time, RTC chip
2041 interrupt output pin INT/ export a low level interrupt signal TIME-ON/OFF (during normality, interrupt signal
TIME-ON/OFF is high level) to master controller 203, after master controller 203 recognizes this interrupt signal, master controller 203 is defeated
The first of the first resistor R1 gone out in the control signal BEEF to the first alarm clock control circuit 205 of a predeterminated frequency (such as 1KHz)
End, when control signal BEEF is high level, NPN triode Q1 conducting, main power source input VCC1 voltage gives alarm clock sounding
Device P1 powers, and alarm clock acoustical generator P1 sends sound and carries out alarm clock calling;When control signal BEEF is low level, NPN triode
Q1 ends, and now non-transformer gives alarm clock acoustical generator P1 power supplies, therefore, alarm clock acoustical generator P1 not sounding.In the present embodiment, alarm clock hair
The time length of sound device P1 sounding and the frequency of sounding can be configured by master controller 203;
When the present embodiment alarm clock circuitry is in the non-power-up state of main power source, (main power source input VCC1 does not access main power source
When), the voltage inputted by stand-by power supply input BATVCC is RTC circuit 204 in the present embodiment alarm clock circuitry and the
It (is the alarm clock control circuit 206 of RTC circuit 204 and second i.e. by button cell or dry cell that two alarm clock control circuits 206, which are powered,
Power supply) so that RTC circuit 204 can carry out Counts.When the time reaching default alarm time, in RTC chip 2041
Disconnected output pin INT/ export a low level interrupt signal TIME-ON/OFF (during normality, interrupt signal TIME-ON/OFF
For high level) the PNP triode Q2 base stage into the second alarm clock control circuit 206 so that PNP triode Q2 is turned on, due to electricity
The voltage at solution electric capacity CE1 both ends can not be mutated, therefore NMOS tube Q3 is also at conducting state, stand-by power supply input BATVCC's
Voltage is powered by NMOS tube Q3 to alarm clock acoustical generator P1, and alarm clock acoustical generator P1 sends sound and carries out alarm clock calling.It is meanwhile standby
Power input BATVCC voltage is charged by the 5th resistance R5 to electrochemical capacitor CE1, the voltage at electrochemical capacitor CE1 both ends from
0V is begun to ramp up, when the voltage at electrochemical capacitor CE1 both ends is risen to so that VCE1-VS<VGS(th)When (wherein, VCE1For electrochemical capacitor
The voltage at CE1 both ends, VSFor the source voltage of NMOS tube, VGS(th)For NMOS tube Q3 grid source threshold voltage), NMOS tube Q3 is cut
Only, alarm clock acoustical generator P1 stops sounding.The present embodiment alarm clock circuitry (main power source input in the non-power-up state of main power source
When VCC1 does not access main power source), alarm clock acoustical generator P1 phonation time can be carried out by the 5th resistance R5 and electrochemical capacitor CE1
Regulation, circular are as follows:Assuming that PNP triode Q2 conducting saturation voltage drop VEC=0.3V, the source voltage of NMOS tube
VS=stand-by power supply input BATVCC voltage-VEC=3.3V-0.3V=3V;And NMOS tube Q3 turn-on condition is VGS≤
VGS(th)=-1V, i.e. VCE1- 3V≤- 1V, in the present embodiment, it is assumed that the voltage V between NMOS tube Q3 grid and source electrodeGSFor-
During 1V, NMOS tube Q3 is turned on, i.e. the voltage V when electrochemical capacitor CE1 both endsCE1For 2V when, NMOS tube Q3 is turned on, and the 5th
Resistance R5 and electrochemical capacitor CE1 forms RC charging circuits, the voltage V at electrochemical capacitor CE1 both endsCE1Relation with charging interval T is
T=VCE1×10×R5×CE1/VS, can obtain, T=2 × 10 × R1*CE1/3=20 × R1 × CE1/3.I.e. the present embodiment makes a noise
Clock circuit can realize regulation alarm clock acoustical generator P1's by adjusting the 5th resistance R5 resistance and electrochemical capacitor CE1 capacitance
The purpose of the length of phonation time.In the present embodiment, when the 5th resistance R5 resistance is 200K Ω, when CE1 is 22.5uF, it can obtain
Phonation time to alarm clock acoustical generator P1 is 30S.
The alarm clock circuitry that the present embodiment provides, including main power source input, stand-by power supply input, master controller, RTC electricity
Road, alarm clock acoustical generator, the first alarm clock control circuit for controlling alarm clock acoustical generator sounding in main power source power-up state, and
For controlling the second alarm clock control circuit of alarm clock acoustical generator sounding in the non-power-up state of main power source;Wherein, master controller
Power input and the power input of the first alarm clock control circuit are connected with main power source input;Second alarm clock control circuit
Power input be connected with stand-by power supply input;The power input of RTC circuit respectively with main power source input and standby
Power input connects;The interrupt output end of RTC circuit is electric with the control signal of master controller and the control of the second alarm clock respectively
The control signal connection on road;The control output end of master controller is connected with the control signal of the first alarm clock control circuit;The
The control output end of one alarm clock control circuit and the control output end of the second alarm clock control circuit are connected with alarm clock acoustical generator.This
The alarm clock circuitry that embodiment provides can ensure main power source not in the case of electricity, alarm clock calling is realized by stand-by power supply
Auto-switch function.
The present invention also provides a kind of stereo set, and the stereo set includes alarm clock circuitry, the circuit structure of the alarm clock circuitry
Above-described embodiment is can refer to, will not be repeated here.Naturally, because the stereo set of the present embodiment employs above-mentioned alarm clock
The technical scheme of circuit, therefore the stereo set has all beneficial effects of above-mentioned alarm clock circuitry.
The preferred embodiments of the present invention are these are only, are not intended to limit the scope of the invention, it is every to utilize this hair
The equivalent structure or equivalent flow conversion that bright specification and accompanying drawing content are made, or directly or indirectly it is used in other related skills
Art field, is included within the scope of the present invention.
Claims (8)
1. a kind of alarm clock circuitry, it is characterised in that including main power source input, stand-by power supply input, master controller, RTC electricity
Road, alarm clock acoustical generator, the first alarm clock control circuit for controlling the alarm clock acoustical generator sounding in main power source power-up state,
And for controlling the second alarm clock control circuit of the alarm clock acoustical generator sounding in the non-power-up state of main power source;Wherein,
The power input of the master controller and the power input of the first alarm clock control circuit with the main power source
Input connects;The power input of the second alarm clock control circuit is connected with the stand-by power supply input;The RTC electricity
The power input on road is connected with the main power source input and the stand-by power supply input respectively;In the RTC circuit
Disconnected output end is connected with the control signal of the master controller and the control signal of the second alarm clock control circuit respectively;
The control output end of the master controller is connected with the control signal of the first alarm clock control circuit;The first alarm clock control
The control output end of circuit processed and the control output end of the second alarm clock control circuit are connected with the alarm clock acoustical generator;
The alarm clock circuitry also includes anti-electric current back flow circuit, and the power input of the RTC circuit pours in down a chimney through the anti-electric current
Circuit is connected with the main power source input and the stand-by power supply input respectively;
The first alarm clock control circuit includes first resistor, second resistance, 3rd resistor, the first electric capacity and NPN triode;Its
In,
The first end of the first resistor is connected with the control output end of the master controller, the second end point of the first resistor
It is not connected with the base stage of the NPN triode and the first end of the second resistance;The second end ground connection of the second resistance;Institute
It is in parallel with the second resistance to state the first electric capacity;The first end of the 3rd resistor is connected with the main power source input, described
Second end of 3rd resistor is connected with the colelctor electrode of the NPN triode;The emitter stage of the NPN triode is sent out with the alarm clock
Sound device connects.
2. alarm clock circuitry as claimed in claim 1, it is characterised in that the second alarm clock control circuit include the 4th resistance,
5th resistance, PNP triode, NMOS tube and electrochemical capacitor;Wherein,
The base stage of the PNP triode is connected with the interrupt output end of the RTC circuit;The emitter stage of the PNP triode with
Stand-by power supply input connection, the colelctor electrode of the PNP triode respectively with the source electrode of the NMOS tube and the described 5th
The first end connection of resistance, the second end of the 5th resistance is connected with the positive pole of the electrochemical capacitor;The electrochemical capacitor
Negative pole is grounded;The grid of the NMOS tube is connected through the 4th resistance with the positive pole of the electrochemical capacitor, the NMOS tube
Drain electrode is connected with the alarm clock acoustical generator.
3. alarm clock circuitry as claimed in claim 2, it is characterised in that the RTC circuit includes RTC chip, the second electric capacity, the
Three electric capacity and crystal oscillator;Wherein,
The power input pin of the RTC chip through the anti-electric current back flow circuit respectively with the main power source input and described
Stand-by power supply input connects, the clock pins and data pin of the RTC chip and the IIC communication interfaces of the master controller
Connection, the interrupt output pin of the RTC chip respectively with the control signal of the master controller and the PNP triode
Base stage connects;The first end of the crystal oscillator is drawn with the first end of second electric capacity and the first vibration of the RTC chip respectively
Pin connects, and the second end of the crystal oscillator vibrates pin with the first end of the 3rd electric capacity and the second of the RTC chip respectively
Connection;Second end of second electric capacity and the second end of the 3rd electric capacity are grounded.
4. alarm clock circuitry as claimed in claim 3, it is characterised in that the anti-electric current back flow circuit include the first diode and
Second diode;Wherein,
The anode of first diode is connected with the main power source input;The anode of second diode with it is described standby
Power input connects;Electricity of the negative electrode of the negative electrode of first diode and second diode with the RTC chip
Source input pin connection.
5. alarm clock circuitry as claimed in claim 4, it is characterised in that the main power source input and stand-by power supply input
The voltage at end is 3.3V.
6. alarm clock circuitry as claimed in claim 5, it is characterised in that the alarm clock circuitry also includes the 6th resistance, the 4th electricity
Appearance and the 5th electric capacity;Wherein,
The first end of 6th resistance is connected with the negative electrode of first diode and the negative electrode of second diode respectively,
Second end of the 6th resistance is connected with the interrupt output pin of the RTC chip and the base stage of the PNP triode respectively;
4th electric capacity is in parallel with the 5th electric capacity, and with the 6th resistor coupled in parallel.
7. alarm clock circuitry as claimed in claim 6, it is characterised in that the alarm clock acoustical generator is buzzer;The buzzer
Positive pole be connected respectively with the emitter stage of the NPN triode and the drain electrode of the NMOS tube, the negative pole of buzzer ground connection.
8. a kind of stereo set, it is characterised in that including the alarm clock circuitry any one of claim 1 to 7.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410379796.6A CN105320005B (en) | 2014-08-04 | 2014-08-04 | Alarm clock circuitry and stereo set |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410379796.6A CN105320005B (en) | 2014-08-04 | 2014-08-04 | Alarm clock circuitry and stereo set |
Publications (2)
Publication Number | Publication Date |
---|---|
CN105320005A CN105320005A (en) | 2016-02-10 |
CN105320005B true CN105320005B (en) | 2017-12-29 |
Family
ID=55247617
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201410379796.6A Expired - Fee Related CN105320005B (en) | 2014-08-04 | 2014-08-04 | Alarm clock circuitry and stereo set |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN105320005B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106655465B (en) * | 2016-11-07 | 2023-09-29 | 珠海格力电器股份有限公司 | System clock power supply device, method and electric appliance |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5379273A (en) * | 1994-04-13 | 1995-01-03 | Horinek; Kevin D. | Alarm clock system |
CN2884754Y (en) * | 2006-03-24 | 2007-03-28 | 王洪锋 | Improved active loudspeaker |
US7457204B1 (en) * | 2007-04-06 | 2008-11-25 | Bradley Winters | Alarm clock with AM/FM radio, CD player, portable audio storage device docking input, battery backup, and keypad with folding cover |
CN201573728U (en) * | 2009-11-20 | 2010-09-08 | 深圳市深铃车业有限公司 | Electric bicycle theftproof system |
CN202208336U (en) * | 2011-08-22 | 2012-05-02 | 应鸿峰 | Music tail box for electric motor car or motorcycle |
CN202856419U (en) * | 2012-10-29 | 2013-04-03 | 东莞市长安镇乌沙小学 | Alarm clock circuit structure |
-
2014
- 2014-08-04 CN CN201410379796.6A patent/CN105320005B/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5379273A (en) * | 1994-04-13 | 1995-01-03 | Horinek; Kevin D. | Alarm clock system |
CN2884754Y (en) * | 2006-03-24 | 2007-03-28 | 王洪锋 | Improved active loudspeaker |
US7457204B1 (en) * | 2007-04-06 | 2008-11-25 | Bradley Winters | Alarm clock with AM/FM radio, CD player, portable audio storage device docking input, battery backup, and keypad with folding cover |
CN201573728U (en) * | 2009-11-20 | 2010-09-08 | 深圳市深铃车业有限公司 | Electric bicycle theftproof system |
CN202208336U (en) * | 2011-08-22 | 2012-05-02 | 应鸿峰 | Music tail box for electric motor car or motorcycle |
CN202856419U (en) * | 2012-10-29 | 2013-04-03 | 东莞市长安镇乌沙小学 | Alarm clock circuit structure |
Non-Patent Citations (1)
Title |
---|
基于51单片机的LCD数字钟设计与制作;丁春霞;《中国科技信息》;20130915(第18期);第87、95页 * |
Also Published As
Publication number | Publication date |
---|---|
CN105320005A (en) | 2016-02-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN206481069U (en) | Battery sampling integrated chip wake-up circuit and battery energy storage system | |
CN101963835A (en) | Electronic equipment and method for dynamically allocating USB port power | |
CN102856933A (en) | Universal serial bus (USB) charging circuit | |
US20160277826A1 (en) | Earphone Line Control Device and Earphone | |
CN207529652U (en) | A kind of blood analyser and its buzzer volume adjustment driving circuit | |
CN101860188A (en) | Switch power supply circuit | |
CN104953650A (en) | Battery electric quantity display device | |
CN205142258U (en) | Go up electronic control system | |
CN204993623U (en) | TV set and backlight time schedule control circuit thereof | |
CN103338029A (en) | Automatic reset device | |
CN105320005B (en) | Alarm clock circuitry and stereo set | |
CN111800709A (en) | Automatic power on/off circuit and bluetooth headset | |
CN204810138U (en) | Terminal equipment's automation start shooting circuit and terminal equipment | |
CN104122967A (en) | Power-on and power-down reset control circuit and computer | |
CN105630080B (en) | Computer system and its boot-strap circuit | |
CN203387480U (en) | Automatic reset device | |
CN104465221B (en) | Control relay circuit | |
CN209358740U (en) | A kind of bluetooth headset reset control circuit | |
WO2018184228A1 (en) | Earphone and power supply circuit for earphone | |
CN203813867U (en) | Reset circuit and television set | |
CN107517536B (en) | Breathing lamp control circuit and electronic equipment | |
CN102281418A (en) | Television | |
CN202798970U (en) | HDMI (high-definition multimedia interface) device | |
CN103237246A (en) | Set-top box actual standby and standby wake-up circuit and set-top box | |
CN207801537U (en) | Power supply control apparatus and eye masseur |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20171229 Termination date: 20210804 |
|
CF01 | Termination of patent right due to non-payment of annual fee |