CN105306958B - A kind of method and device of IP-based transmission stream bit rate smoothing processing - Google Patents

A kind of method and device of IP-based transmission stream bit rate smoothing processing Download PDF

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CN105306958B
CN105306958B CN201410307147.5A CN201410307147A CN105306958B CN 105306958 B CN105306958 B CN 105306958B CN 201410307147 A CN201410307147 A CN 201410307147A CN 105306958 B CN105306958 B CN 105306958B
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channel
packet
data packet
external memory
reading
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CN105306958A (en
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邹伟华
沈广涛
杜亚军
郁为民
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WELLAV TECHNOLOGIES Ltd
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Huizhou Wellav Technologies Co ltd
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Abstract

The present invention relates to transport stream field, more particularly to a kind of method of IP-based transmission stream bit rate smoothing processing, including:Receive the inlet flow for being multiplexed at least one channel data packet, and preliminary caching is done to data packet therein, calculate the storage unit base address that the data packet to arrive earliest in the data packet of the caching should be stored in external memory, it will be in data packet storage to the external memory, the reading inter-packet gap in each channel is calculated, the reading packet that each channel is sent out according to the reading inter-packet gap in each channel successively is asked, according to the storage unit base address read in external memory where packet request calculates the data packet that each channel will be read, the data packet in each channel is read and exported from the external memory.The dynamic allocation of the smoothing processing and external memory of multichannel multiplexing code stream are realized using the technology.

Description

A kind of method and device of IP-based transmission stream bit rate smoothing processing
Technical field
The present invention relates to transport stream field, more particularly to a kind of the method and dress of IP-based transmission stream bit rate smoothing processing It sets.
Background technology
Currently, becoming increasingly abundant with audio-visual content, people are for the personalized also more and more prominent of audiovisual demand, IP skills The development of art allows that it provides higher transmission bandwidth and more easily networking mode meets user and radio and TV operator Demand, therefore TS over IP technologies are more and more extensive in the use of radio and television application field.And answering in TS over IP In, it is difficult to avoid having the appearance of network jitter, in addition the sudden pattern of giving out a contract for a project of software video server can all cause IP The fluctuation of code check and the variation of PCR performances, so needs carry out the code check smoothing processing of code stream during IP streams receive.
Broadcasting and TV front end IP receiving devices at present, what is had can only realize the IP code check smoothing processings in less channel, some realizations More channel, but using the excessively high programmable logic device of cost and more external memory as cost.
Invention content
The embodiment of the present invention is designed to provide a kind of method of IP-based transmission stream bit rate smoothing processing, realizes IP-based multichannel multiplexing transport stream smoothing processing and dynamic allocation external memory.
The embodiment of the present invention is designed to provide a kind of device of IP-based transmission stream bit rate smoothing processing, realizes IP-based multichannel multiplexing transport stream input bit rate smoothing processing and dynamically distribute external memory, with less logical resource and Smaller memory realizes multichannel code check smoothing processing, reduces hardware cost.
A kind of method of IP-based transmission stream bit rate smoothing processing provided in an embodiment of the present invention, including:
The inlet flow for being multiplexed at least one channel data packet is received,
The data packet in the inlet flow is tentatively cached,
Depositing in external memory should be stored in by calculating the data packet to arrive earliest in the data packet tentatively cached Storage unit base address stores the data packet into the storage unit base address of the external memory,
The reading inter-packet gap in each channel is calculated, sends out the reading packet in each channel according to the reading inter-packet gap in each channel successively Request,
According to the storage unit read in external memory where packet request calculates the data packet that each channel will be read Base address, the data packet in each channel is read and exported from the external memory.
Optionally, the data packet to arrive earliest in the data packet tentatively cached should be stored in external memory Storage unit base address depends on the offset of base address and the data packet of the affiliated channel of the data packet in external memory Address.
The base address of storage unit in external memory where the data packet in each channel that will be read depends on each logical The offset address of the channel oldest stored data packet in base address and external memory of the road in external memory.
Base address of each channel in external memory depends on the base address in last channel and the last channel Corresponding default Number of Storage Units,
When the default Number of Storage Units depends on the maximal rate and maximum storage of the transport stream of CPU dynamic configurations Between.
Optionally, the reading inter-packet gap in each channel, specifically according to received data packet in each channel predetermined number measurement period The corresponding actual storage list of the data packet packet number in each channel stored in the average value of packet number, the external memory and each channel What first number was calculated.
Optionally, a measurement period is divided into the reading inter-packet gap calculation window of predetermined number and non-reading inter-packet gap calculates Window reads inter-packet gap calculation window from the current statistic period in each channel and terminates to read inter-packet gap to next measurement period in each channel Calculation window start before time, for counting corresponding received data packet packet number of each channel current statistic period, by making a reservation for The predetermined number statistics is calculated in the received data packet packet number in each channel that each measurement period obtains in number measurement period The average value of the received data packet packet number in each channel in period.
Optionally, the reading inter-packet gap calculation window of the predetermined number is corresponded with each channel, in the statistics The reading inter-packet gap in each channel is calculated in period successively.
Optionally, the reading packet for sending out each channel according to each channel reading inter-packet gap successively is asked, in particular to is sentenced successively Whether the interval that disconnected each channel distance last time reads packet has reached the reading inter-packet gap in the channel, if it is, initiating the reading in the channel Packet request, otherwise, into the judgement in next channel.
In addition, a kind of device of IP-based transmission stream bit rate smoothing processing provided by the invention, including:It is connected with each other Code stream memory module, reading speed computing module, output control module, and the external storage that is connect with the code stream memory module Device, wherein
The code stream memory module, for receiving the inlet flow for being multiplexed at least one channel data packet, and to described defeated Data packet in becoming a mandarin does preliminary caching, and calculating the data packet to arrive earliest in the data packet tentatively cached should be stored in Storage unit base address in external memory, by the storage unit base of data packet storage to the external memory In address, and request is wrapped according to the reading received and is calculated in the data packet place external memory in each channel that will be read The data packet in each channel is read from the external memory and exported in storage unit base address,
The reading speed computing module, the reading inter-packet gap for each channel to be calculated, and it is sent to the output control Molding block,
The output control module, for sending out each channel to the code stream memory module according to the reading inter-packet gap in each channel Reading packet request,
The external memory for storing the data packet in input code flow, and is waited for and being read.
Optionally, the code stream memory module, including:Memory management module, for calculating the data tentatively cached The data packet to arrive earliest in packet should be stored in the storage unit base address in external memory,
The data packet to arrive earliest in the data packet tentatively cached should be stored in the storage list in external memory First base address depends on the offset address of base address and the data packet of the affiliated channel of the data packet in external memory.
The base address of storage unit in external memory where being additionally operable to the data packet for calculating each channel that will be read,
The base address of storage unit in external memory where the data packet in each channel that will be read depends on each logical The offset address of the channel oldest stored data packet in base address and external memory of the road in external memory,
Base address of each channel in external memory depends on the base address in last channel and each channel and presets and deposit Storage unit number, the default Number of Storage Units depend on the maximal rate and maximum storage of the transport stream of CPU dynamic configurations Time.
Optionally, the code stream memory module, further include the input buffer module being connected with the memory management module, Output module, channel base address memory module, default Number of Storage Units preserving module, the first offset address memory module, packet Number statistical module and the long memory module of packet, wherein
The input buffer module, for receiving the inlet flow for being multiplexed at least one channel data packet, and to described defeated Data packet in becoming a mandarin does preliminary caching, sends out in the data packet for obtaining and tentatively caching to the memory management module and arrives earliest Data packet should be stored in the request of the storage unit base address in the external memory,
The output module is used to receive the reading packet request of the reading speed computing module, and according to the request to described Storage unit base address in external memory where the data packet that memory management module acquisition request will be read,
Channel base address memory module is used to preserve base address of each channel in external memory,
The default Number of Storage Units preserving module, the maximal rate for preserving the transport stream by CPU dynamic configurations Number of Storage Units of each channel determined with maximum storage time in external memory,
The first offset address memory module, for storing the inclined of oldest stored data packet in each channel external memory Address is moved,
The packet number statistical module is used to count the number of data packets that each channel is stored in external memory,
The packet that the long memory module of packet preserves the currently processed data packet in each channel is grown.
Optionally, the reading speed computing module includes the time control module being connected with each other, receiver packet number statistics mould Block and reading inter-packet gap computing module, wherein
The receiver packet number statistical module is for counting what each measurement period in the measurement period of predetermined number received The data packet packet number in each channel in inlet flow,
The reading inter-packet gap read inter-packet gap computing module and be used to calculate each channel in each measurement period, each channel Reading inter-packet gap, specifically according to the average value of received data packet packet number, the outside in each channel predetermined number measurement period What the corresponding physical memory location number of the data packet packet number in each channel stored in memory and each channel was calculated.
The time control module is for assisting the receiver packet number statistical module to be counted the statistics in predetermined number The data packet packet number in each channel in the inlet flow that each measurement period receives in period, and the auxiliary reading inter-packet gap calculate mould Block read the calculating of inter-packet gap, realizes three counters, is clock counter, measurement period counter and reading parlor respectively Every calculation window counter,
The output control module includes the reading packet request control module and timing module of interconnection, wherein
The packet request control module of reading is used to judge the interval that each channel current time read the packet moment apart from last time successively Whether the reading inter-packet gap in the channel is had reached, if it is, the reading packet request in the channel is initiated, otherwise, into next channel Judgement,
The timing module is for generating a counter, for defining the current time and reading the packet moment.
Therefore using the present embodiment technical solution, due to using external memory to the data in each channel into action The storage of state can utilize limited external memory to realize multiple channels, and the data packet storage of compatible 1~7 TS packet, make The data packet obtained in each channel has longer storage time, and the data packet stored in the external memory can be put down Output is read slidingly.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this Some embodiments of invention without having to pay creative labor, may be used also for those of ordinary skill in the art With obtain other attached drawings according to these attached drawings.
Fig. 1 is the method flow diagram that a kind of IP-based provided by the invention transmits stream bit rate smoothing processing;
Fig. 2 is a kind of process flow receiving the inlet flow for being multiplexed at least one channel data packet provided by the invention Figure;
Fig. 3 is a kind of data packet that calculating will store storage unit base address in external memory provided by the invention Method flow diagram;
Fig. 4 is a kind of base of the affiliated channel of data packet that acquisition will store provided by the invention in external memory The method flow diagram of location;
Fig. 5 is a kind of method flow diagram for the data packet offset address that acquisition will store provided by the invention;
Fig. 6 is a kind of data packet that calculating will be read storage unit base address in external memory provided by the invention Method flow diagram;
Fig. 7 is a kind of method flow diagram of read data packet provided by the invention;
Fig. 8 is a kind of method flow diagram of reading inter-packet gap calculating each channel provided by the invention;
Fig. 9 is provided by the invention successively according to the reading inter-packet gap in each channel in the reading packet for sometime sending out some channel The method flow diagram of request;
Figure 10 is the apparatus structure schematic diagram that a kind of IP-based provided by the invention transmits stream bit rate smoothing processing;
Figure 11 is a kind of structural schematic diagram of code stream memory module provided by the invention;
Figure 12 is the structural schematic diagram of another code stream memory module provided by the invention;
Figure 13 is a kind of structural schematic diagram of reading speed computing module provided by the invention;
Figure 14 is a kind of structural schematic diagram of output control module provided by the invention;
Figure 15 is a kind of three kinds of timer relation schematic diagrams of time control module provided by the invention.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, those of ordinary skill in the art are obtained every other without creative efforts Embodiment shall fall within the protection scope of the present invention.
Embodiment 1:
The present embodiment provides a kind of methods that IP-based transmits stream bit rate smoothing processing, as shown in Figure 1, including:
101, the inlet flow for being multiplexed at least one channel data packet is received, the data in the inlet flow are tentatively cached Packet is sent out to the memory management module described in the data packet for obtaining and arriving earliest in the data packet that tentatively caches should be stored in The request of storage unit base address in external memory,
102, it is calculated according to the request of the inside of above-mentioned steps 101 and to be arrived earliest in the data packet tentatively cached Data packet should be stored in the storage unit base address in external memory, by data packet storage to the external memory The storage unit base address in,
103, the reading inter-packet gap in each channel is calculated, and each channel is sent out according to the reading inter-packet gap in each channel successively successively Reading packet request,
104, according to the principle for reading packet request and first in first out, reading packet request corresponding channel institute is calculated outside The storage unit base address of oldest stored data packet in portion's memory, reads from the external memory and exports the channel The data packet.
Wherein, the step 101, receive and be multiplexed the inlet flow of at least one channel data packet, tentatively cache described defeated Data packet in becoming a mandarin sends out the data packet institute to arrive earliest in the data packet for obtaining and tentatively caching to the memory management module It should be stored in the request of the storage unit base address in the external memory, as shown in Fig. 2, specifically including:
201, it receives the data packet in inlet flow and makees preliminary caching,
202, press arrival sequencing, first the data packet that arrives first in processing caching, judge packet it is long whether be 188 1 ~7 integral multiples, if it is with the corresponding data packet long value L in its affiliated channeliWhether identical compare, is updated if different The corresponding data packet long value L in the channeliAnd preserve, otherwise, the packet long value L is not updatediIf the data packet packet is long It is not 188 1~7 integral multiple, then discard processing is made to the data packet,
203, storage unit base address of the data packet described in acquisition request in external memory, wherein the data packet It is the data packet for encapsulating 1~7 integer TS packets.
Step 102, according to the request inside step 101, calculate data packet to be processed described in step 101 in outside Storage unit base address in memory, as shown in figure 3, specifically including:
301, the request for obtaining storage unit base address of the data packet in external memory is received,
302, base address C of the affiliated channel of data packet in external memory is calculatediAnd data packet offset ground Location Pi, then by the base address CiWith the offset address PiIt is added, you can obtain the outside that the data packet should be stored and deposit Storage unit base address in reservoir.
Wherein, base address C of the channel in external memoryi, as shown in figure 4, specifically including:
401, the maximal rate R of channel transport stream to be treated is obtained firstiWhen (unit bps) and maximum storage Between Si(unit s), this is that CPU is set dynamically in advance.
402, the default Number of Storage Units U in the channel is calculated according to formula (1)i, here one default to deposit Storage unit corresponds to a data packet for including 7 TS packets:
403, base address C of the channel in external memoryiIt is calculated by formula (2), it is assumed that be processed logical Road number is N, and channel position is 0 integer for arriving N-1, C0Initial value be pre-set, can be, but not limited to be 0,
C0=0, Ci=Ci-1+Ui-1,1≤i≤N-1 (2)
Meanwhile the default Number of Storage Units U in each channeliIt is empty that the summation of value must not exceed the external memory address Between summation, spilling when data packet being avoided to store.
Calculate the data packet offset address Pi, as shown in figure 5, specifically including:
501, the corresponding oldest stored data packet in the external memory in channel belonging to the data packet is obtained Offset address Fi(initial value 0).
502, the physical memory location number T in the channel is calculatedi
One default storage unit corresponds to a data packet for including 7 TS packets, and for including 1~6 TS packet Data packet, storage unit that need not be so big can be split, therefore press to make full use of external memory space Physical memory location number T is calculated according to formula (3)iValue, wherein LiFor the corresponding data packet packet long value in the channel:
503, the channel for obtaining last registration is stored in the data packet packet number D in the external memoryi
Wherein, ((further include during referring to step 104) referring to step 102) and reading in each data packet storage Count the data packet packet number D in each channel stored in the external memoryiAnd record, specially:
After completing the data packet storage in some channel, by the corresponding current packet number D in the channeliIt is preserved after adding 1.When It completes after reading a data packet in some channel in the external memory, by the corresponding current packet number D in the channeliSubtract 1 After preserve.
504, the F described in the step 501iWith D described in step 503iThe sum of be more than or equal to channel described in step 503 and actually depositing Storage unit number TiWhen, the offset address P of the data packetiIt is calculated by formula (4), is otherwise obtained by formula (5),
Pi=Fi+Di-Ti (4)
Pi=Fi+Di (5)
In step 104, specifically according to the principle for reading packet request and first in first out, calculating will read described The storage unit base address of oldest stored data packet in external memory where channel, as shown in fig. 6, specifically including:
601, it is wrapped and is asked according to the reading, while according to the principle of first in first out, sent out and obtain the data packet institute outside The request of storage unit base address in portion's memory,
602, base address C of the channel in external memory is obtainediAnd in the channel in external memory most The offset address F of early storage data packeti, by the base address CiWith the offset address F of the oldest stored data packetiIt is added, i.e., The storage unit base address of oldest stored data packet in the place external memory in the channel can be obtained, after the completion of reading packet, such as F described in fruitiWith Ti- 1 is equal, then by its FiOtherwise zero setting adds 1, and preserves new FiValue, wherein TiFor the corresponding reality in the channel Border Number of Storage Units.
Therefore in order to realize multiple channels using limited external memory, and compatible 1~7 TS packet Data packet stores, and external memory is that each channel is in the case of different code checks and data packet is by different number TS packet structures External memory space is dynamically distributed in the case of.
Step 103, the reading inter-packet gap for calculating each channel, and successively according to the reading inter-packet gap in each channel sometime The reading packet request to some channel is sent out, as shown in fig. 7, specifically including:
701, the reading inter-packet gap in each channel is calculated, the reading inter-packet gap in each channel is that the channel is corresponded in each measurement period Reading inter-packet gap calculation window in calculated, by taking the calculating process of the reading inter-packet gap in single channel as an example, be divided into following several A step, as shown in Figure 8:
801, first, in the reading inter-packet gap calculation window in the current statistic period of current channel, current channel is obtained most Receiver packet number W in each measurement period of nearly M measurement period, removes a maximum value and a minimum value, is calculated Receiver packet number average value V in nearest M measurement period, measurement period are set as t ',.
802, the current data packet number D in the channel stored in external memory is obtainedi,
803, by the current data packet number D in the channeliSubtract the physical memory location number T in the channeliHalf, obtain One difference Y;
804, the absolute value of the above-mentioned difference Y of receiver packet number average value V is subjected to plus and minus calculation, if Y is more than zero, is added Otherwise method operation carries out subtraction,
805, above-mentioned operation result is subjected to the division arithmetic that divisor is 32,32 is multiplied by after quotient rounding, by suitably dropping Low precision simplifies the complexity of operation, obtains the number-of-packet X that next measurement period plan is read from external memory;
806, the number-of-packet of next measurement period plan reading and measurement period t ' (unit s) and clock cycle t are utilized (unit s) can calculate the reading inter-packet gap G of next measurement period according to formula (6)i, using clock cycle number as unit.
What the reading inter-packet gap calculation window in the current statistic period of current channel described in step 801 was obtained by, such as Shown in Figure 15:
Assuming that port number to be processed is N, inter-packet gap calculation window is read to obtain, needs 3 counter auxiliary:Clock meter Number device, measurement period counter and reading inter-packet gap calculation window counter.The clock counter, carry out by the clock cycle based on Number, a measurement period is predefined as including cnt clock cycle, when the clock counter reaches maximum c nt, completes one A measurement period, the clock counter zero setting, starts next measurement period.Measurement period counter, it is current in order to safeguard Receiver packet number statistical value W in each measurement period of the nearest M measurement period in channel, then measurement period counter is from 0 to M-1 Variation, when clock counter is cnt and measurement period counter is less than M-1, measurement period counter adds 1, and entrance is next A measurement period, when clock counter is cnt and measurement period counter is maximum value M-1, measurement period counter is set to 0, i.e., Into measurement period 0, the wherein calculating of cnt is obtained by formula (7), and (unit s) is clock cycle, t ' (unit s) to wherein t For measurement period.Inter-packet gap calculation window counter is read to be used to a measurement period being divided into N number of reading inter-packet gap calculation window With non-reading inter-packet gap calculation window, each channel occupies one and reads inter-packet gap calculation window for calculating its reading inter-packet gap.Each The clock cycle that inter-packet gap calculation window includes predetermined number is read, such as each inter-packet gap calculation window of reading includes 32 clock weeks Phase reads inter-packet gap calculation window counter and changes from 0 to 32*N, and packet is read when it is equal to 32*N and clock counter is less than cnt Interval calculation window counter is constant, and clock cycle count is pressed when it is less than 32*N, when it is equal to 32*N and clock counter For cnt when, read inter-packet gap calculation window counter set to 0, start reading inter-packet gap of next measurement period from channel 0 to channel N-1 Calculating, wherein channel i (i be 0 arrive N-1 integer) reading inter-packet gap calculation window be in read inter-packet gap calculation window count Device numerical value is in the time range of 32*i~(32*i+31), and each measurement period has one section of corresponding time range conduct The reading inter-packet gap calculation window of channel i.
What the receiver packet number W in each measurement period of M measurement period described in step 801 was obtained by:
For some measurement period (being assumed to be measurement period 0) of channel i, in channel, i readings inter-packet gap calculation window terminates At the time of, for (measurement period 0,1,2 ... M-1) one-to-one each system in just past last M measurement period The receiver packet number W statistical values in the period are counted, needs to empty that corresponding W value of wherein measurement period 0 and then works as from the channel It is preceding to read this moment for terminating of inter-packet gap calculation window, next measurement period start before time in, carry out the channel The statistics of the new W values of corresponding measurement period 0.Measurement period M-1 is arrived for measurement period 1, also executes similar operation.Such Receiver packet number in each measurement period of M, the channel measurement period arrived be exactly nearest past M measurement period one by one Corresponding statistical value.
The acquisition process of the receiver packet number W in each channel is as follows in measurement period, by taking single channel as an example:The channel often receives One data packet, just according to channel number and measurement period counter values from obtaining the channel in the current statistic period in RAM Receiver packet number W, will after W plus 1 write-in be saved in it is identical with channel number and measurement period counter values be identify address in, The channel current statistic period corresponding final receiver packet number W is just obtained when to current statistic end cycle, W initial values are 0.
The reading inter-packet gap obtained by above-mentioned computational methods can not both have been spilt over ensureing the memory space of external memory Under the premise of not reading sky again, and reading package operation is carried out with the code check for approaching input average bit rate.When next statistics in some channel After the completion of period reads inter-packet gap calculating, preserved.
702, the reading packet request to some channel, institute are sometime being sent out according to the reading inter-packet gap in each channel successively It states and reads the reading package operation that packet request controls the channel, by taking some channel sends out the process for reading packet request as an example, as shown in figure 9, It specifically includes:
901, the reading packet deterministic process into current channel is waited for,
902, reading packet moment current channel last time is obtained,
903, it obtains current channel and reads inter-packet gap,
If 904, current time apart from when last time reading the time interval at packet moment more than or equal to inter-packet gap is read, initiates to this The reading packet in channel is asked, while will be preserved as this reading packet moment at current time, and enters the reading packet condition in next channel Judge, otherwise, is directly entered the reading packet condition judgment process in next channel.
What the current time was specifically obtained by:
In multichannel multiplexing process, carry out judging whether to meet to read to wrap successively from the 1st channel to a last channel wanting It asks.Because the judgement in each channel carries out successively, one shared counter is set for all channels, by clock week Phase counts, and maximum value must be over current channel and read inter-packet gap GiPossibility maximum value because the reading inter-packet gap be with when Clock number of cycles is unit, it is possible to using the counter current value as current time.
Embodiment 2:
Broadcasting and TV front end IP receiving devices at present, what is had can only realize the IP code check smoothing processings in less channel, some realizations More channel, but using the excessively high programmable logic device of cost and more external memory as cost.In order to overcome Existing broadcasting and TV front end IP receiving devices realize the weakness of multichannel IP code check smoothing processings with higher cost, can be, but not limited to, The present invention uses lower-cost programmable logic device (FPGA/CPLD etc.), and external memory is (in programmable logic device piece Memory other than memory) and CPU as hardware carrier, external memory is worked and dynamically distributed with software auxiliary logic Mode realize the more channel multiplexing transport stream input bit rate smoothing processing of IP-based.
A kind of device of IP-based transmission stream bit rate smoothing processing provided by the invention, as shown in Figure 10, including:Mutually Code stream memory module 10, reading speed computing module 20 and the output control module 30 of connection further include being stored with the code stream Module 10 connect external memory 40, it is described wherein,
The code stream memory module 10, for receiving the inlet flow for being multiplexed at least one channel data packet, and to described Data packet in inlet flow does preliminary caching, and calculating the data packet to arrive earliest in the data packet tentatively cached should store Storage unit base address in external memory 40, by the storage of data packet storage to the external memory 40 In unit base address, and the data packet place external storage for asking that each channel that will be read is calculated is wrapped according to the reading received The data packet in each channel is read from the external memory 40 and exported in the base address of storage unit in device 40,
Wherein, the data packet in each channel is after solution UDP is encapsulated in the input code flow that the code stream memory module 10 receives Payload data packets, 1~7 TS packet of the packet encapsulation are multiple logical in order to be realized using limited external memory The processing in road, and compatible 1~7TS packets, in the case of different code checks and the data packet is made of different number TS packets In the case of, memory space of each channel in external memory 40 is to dynamically distribute.
The reading speed computing module 20, the reading inter-packet gap for each channel to be calculated, and it is sent to the output Control module 30, the reading speed computing module 20 is according to each measurement period received data packet in the multiple measurement periods in each channel The average value of packet number, the data packet packet number D not read stored in external memory 40 in conjunction with the channeliAnd this is logical The physical memory location number T in roadi, a suitable reading inter-packet gap G is calculatedi(as unit of the clock cycle), thus may be used Equably the data packet in each channel to be read from external memory 40,
The output control module 30, for successively according to the reading inter-packet gap in each channel, storing mould to the code stream successively Block 10 sends out the reading packet request in each channel.
The code stream memory module 10, as shown in figure 11, including:Memory management module 11, and with the storage management mould Input buffer module 12 that block 11 is connected, output module 13, channel base address memory module 14, default Number of Storage Units are protected Storing module 15, the first offset address memory module 16, packet number statistical module 17 and the long memory module of packet 18, wherein
The input buffer module 12 is used to receive the inlet flow for being multiplexed one or more channel data packets, and to wherein Data packet preliminary caching is done in ram in slice, handle according to arrival order, when handling some data packet, sentence first one by one The correctness of the disconnected data packet packet length, if data packet packet length is 188 1~7 integral multiple, by the packet long value and the number It is sent to the memory management module 11 according to channel number belonging to packet, and is sent out to the memory management module 11 and obtains the data packet The request of storage unit base address in external memory 40, when storage of the acquisition data packet in external memory 40 Behind unit base address, by the data packet from reading and being written in the external memory 40 in ram in slice, after storing successfully simultaneously Inform the memory management module 11.
The output module 13 is used to, when the reading packet for receiving some channel is asked, be asked to described according to reading packet Memory management module 11 sends out the storage unit base address for obtaining channel oldest stored data packet in external memory 40 Request, behind the base address of the storage unit in the external memory 40 where obtaining the data packet, reading external memory In corresponding data packet and be converted to required data packet format output in 40, after reading successfully and inform the storage management mould Block 11.
The memory management module 11 is used to calculate the storage unit by data packet to be processed in external memory 40 Base address, including storage unit base address of the data packet in external memory 40 when storage and when reading in each channel, also Offset address for calculating the data packet when the base address for receiving the data packet that will be stored is asked, is additionally operable to connecing It receives the base address request for the data packet that some channel will store or read or receives the reading speed computing module 20 When to the physical memory location amount requests in some channel, physical memory location of the channel in external memory 40 is calculated Number Ti, it is additionally operable to count the data packet packet number D in each channel stored in external memory 40i, it is additionally operable to calculate and is deposited in outside Each channel oldest stored data packet offset address F in reservoir 40iAnd obtain the packet long value L of the data packet in each channeli, and By packet numerical value DiIt is stored in packet number statistical module 17, packet long value LiIt is stored in and wraps in long memory module 18, oldest stored data packet Offset address FiIt is stored in the first offset address memory module, specifically:
When the memory management module 11 receives from the input buffer module 12 current data packet in some channel Packet long value, by the data packet packet long value L in the channel in itself and the long memory module 18 of the packetiIt is compared, if it is different, then Update the L in the long memory module of packetiValue, does not otherwise update.
When the information that the memory management module 11 is informed according to the input buffer module 12 and output module 13, when complete After the data packet storage in some channel, by the corresponding current packet number D in the channel in the packet number statistical module 17iAdd 1 After preserve.After completing to read a data packet in some channel from the external memory 40, packet number statistical module will be stated The corresponding current packet number D in the channel in 17iIt is preserved after subtracting 1.
It will store receiving some channel or the request of the base address of read data packet or receive the reading speed When computing module 20 is to the physical memory location amount requests in some channel, reality of the channel in external memory 40 is calculated Border Number of Storage Units Ti, TiIt is the default Number of Storage Units U by the channeliWith data packet packet long value LiCome what is determined, institute It states a default storage unit and corresponds to a data packet for including 7 TS packets, and for including the data packet of 1~6 TS packet, no So big storage unit is needed, to make full use of external memory space, can be split, therefore is counted according to formula (3) Calculation obtains physical memory location number TiValue.
When the information that the memory management module 11 is informed according to the input buffer module 12 and output module 13, when complete After the data packet storage in some channel, if the current F in affiliated channeliWith Ti- 1 is equal, then by its FiZero setting, otherwise Add 1, later by new FiValue is stored in the first offset address memory module 16, each channel FiInitial value is 0.
When the memory management module 11 receives from the input buffer module 12 storage for the data packet that will be stored Unit base address calculates the offset address P of the data packet when askingi, PiBelonging to data packet described in external memory The offset address F of channel oldest stored data packetiAnd the corresponding current packet number D in the channeli, it is specifically shown in formula (4) and formula (5).
Channel base address memory module 14, default Number of Storage Units preserving module 15 are by CPU dynamic configurations , channel base address memory module 14 is used to store base of each channel of CPU settings in the external memory 40 Location, base address C of each channel in external memory 40iIt is corresponding depending on the base address in last channel and last channel Default Number of Storage Units, wherein the default Number of Storage Units in each channel is needed by pre-set each channel The maximal rate R of the transport stream of reasoni(unit bps) and maximum storage time Si(unit s) determines that CPU is counted according to formula (1) Calculate the default Number of Storage Units U for obtaining each channeli, and be stored in default Number of Storage Units preserving module 15, here A default storage unit correspond to a data packet for including 7 TS packets, base of each channel in external memory Location CiIt is calculated according to formula (2) by CPU, it is assumed that port number to be processed is N.Meanwhile the default storage list in each channel First number UiSummation must not exceed the external memory spatial summation, the spilling of memory space when data packet being avoided to store.
The memory management module 11 is used to calculate the base address by data packet to be processed in external memory 40, packet Storage unit base address of the data packet in external memory 40 when including storage and when reading in each channel, specifically:
When storing some data packet in some channel, base address C of the channel in external memory is obtainediAnd institute State data packet offset address Pi, then by the base address CiWith the offset address PiIt is added, you can obtain the data packet institute Storage unit base address in the external memory 40 that should be stored.
When reading some data packet in some channel, base address C of the channel in external memory is obtainediAnd institute State the offset address F of channel oldest stored data packet in external memoryi, reading packet is carried out according to the principle of first in first out, because And by the base address CiWith the offset address F of the oldest stored data packetiIt is added, you can obtaining the data packet should read Storage unit base address in the external memory 40 taken.
It can be, but not limited to, as shown in figure 12, the code stream memory module 10 further includes external memory arbitration modules 19, The external memory arbitration modules 19 are connect with the input buffer module 12 and output module 13 respectively, for realizing described The arbitration of the read operation of the write operation and output module 13 of input buffer module 12, i.e., according to certain priority orders, by data Packet write-in is read,
The code stream memory module 10 further includes being connected to the external memory arbitration modules 19 and the external storage External memory controller module 110 between device 40, the external memory controller module 110 are external memories 40 Controller, the connecting interface as external memory 40 and programmable logic device.
Specifically:
When the input buffer module 12 obtains storage unit base of the data packet that will be stored in external memory 40 Behind address, write request is initiated to external memory arbitration module 19, it, will be described in a manner of burst if request is responded The corresponding packet base data location of data packet, packet content and burst length are output to external memory arbitration modules 19.
It is obtained the base of the storage unit in external memory where the data packet of reading 40 in the output module 13 Behind location, read request is initiated to external memory arbitration module 19, if request is responded, by data in a manner of burst Packet base address, packet content and burst length are output to external memory arbitration modules 19.
The external memory arbitration modules 19 are received when the free time and are asked from writing for the input buffer module 12 It asks and (or) the read request from the output module 13 writes the data packet outer then according to certain read-write priority orders Portion's Memory Controller module 110.
Therefore by the code stream memory module, external memory is each channel in the case of different code checks, And the data packet be made of different number TS packets in the case of dynamically distribute external memory space, and can accurately deposit Store up and read the data packet in each channel.
As shown in figure 13, the reading speed computing module 20 includes the time control module 21 being connected with each other, receives packet Number statistical modules 22 and read inter-packet gap computing module 23, the reading inter-packet gap computing module 23 also with the packet number statistical module 17 And the long memory module 18 of packet connects, wherein
The current reading inter-packet gap that inter-packet gap computing module 23 is read for calculating each channel, with the reading parlor in single channel Every calculating process for:
The reading inter-packet gap computing module 23 obtains the nearest M system of current channel from the receiver packet number statistical module 22 Each measurement period receiver packet number W in the period is counted, and removes a maximum value and a minimum value, nearest M statistics is calculated Receiver packet number average value V in period, each measurement period are set as t '.
It is described to read what the acquisition from the packet number statistical module 17 of inter-packet gap computing module 23 stored in external memory The current data packet number D in the channeli, by the current data packet number D in the channeliSubtract the physical memory location number T in the channeli Half, obtain a difference Y;
The absolute value of receiver packet number average value V and above-mentioned difference Y are subjected to plus and minus calculation, if Y is more than zero, carry out addition Otherwise operation carries out subtraction,
Above-mentioned operation result is subjected to the division arithmetic that divisor is 32,32 are multiplied by after quotient rounding, by suitably reducing essence It spends to simplify the complexity of operation, obtains the number-of-packet that next measurement period plan is read from external memory;Using next The number-of-packet that measurement period plan is read can calculate the reading inter-packet gap of next measurement period, using the clock cycle as unit, Referring specifically to formula (6).After the completion of next measurement period in some channel reads inter-packet gap calculating, preserved.
The time control module 21 carries out the statistics of receiver packet number and described for auxiliary reception packet number statistical module 22 The calculating that reading inter-packet gap computing module 23 read inter-packet gap realizes three counters as shown in figure 15, is clock meter respectively Number device, measurement period counter and reading inter-packet gap calculation window counter.The clock counter, carry out by the clock cycle based on Number, a measurement period is predefined as including cnt clock cycle, when the clock counter reaches maximum c nt, completes one A measurement period, the clock counter zero setting, starts next measurement period.Measurement period counter, it is current in order to safeguard Receiver packet number statistical value W in each measurement period of the nearest M measurement period in channel, then measurement period counter is from 0 to M-1 Variation, when clock counter is cnt and measurement period counter is less than M-1, measurement period counter adds 1, and entrance is next A measurement period, when clock counter is cnt and measurement period counter is maximum value M-1, measurement period counter is set to 0, i.e., Into measurement period 0, the wherein calculating of cnt is obtained by formula (7), and (unit s) is clock cycle, t ' (unit s) to wherein t For measurement period.Inter-packet gap calculation window counter is read to be used to a measurement period being divided into N number of reading inter-packet gap calculation window With non-reading inter-packet gap calculation window, each channel occupies one and reads inter-packet gap calculation window for calculating its reading inter-packet gap.Each The clock cycle that inter-packet gap calculation window includes predetermined number is read, such as each inter-packet gap calculation window of reading includes 32 clock weeks Phase reads inter-packet gap calculation window counter and changes from 0 to 32*N, clock cycle count pressed when it is less than 32*N, when it is equal to Reading inter-packet gap calculation window counter is constant when 32*N and clock counter are less than cnt, when it is equal to 32*N and clock counter For cnt when, read inter-packet gap calculation window counter set to 0, start reading inter-packet gap of next measurement period from channel 0 to channel N-1 Calculating, wherein channel i (i be 0 arrive N-1 integer) reading inter-packet gap calculation window be in read inter-packet gap calculation window count Device numerical value is in the time range of 32*i~(32*i+31), and each measurement period has one section of corresponding time range conduct The reading inter-packet gap calculation window of channel i.
Receiver packet number statistical module 22 is used to count the receiver packet number W in the nearest each measurement period of M measurement period, right In some measurement period (being assumed to be measurement period 0) of channel i, at the time of in channel, i readings inter-packet gap calculation window terminates, for Connecing in (measurement period 0,1,2 ... M-1) one-to-one each measurement period in just past last M measurement period Packet receiving number W statistical values need to empty that corresponding W value of wherein measurement period 0 and then currently read inter-packet gap meter from the channel Calculate this moment for terminating of window, next measurement period start before time in, carry out the channel and correspond to measurement period 0 New W values statistics.Measurement period M-1 is arrived for measurement period 1, also executes similar operation.The obtained channel M Receiver packet number in each measurement period of measurement period is exactly the nearest past one-to-one statistical value of M measurement period .
Since input code flow is the code stream for being multiplexed each channel data packet, each channel data packet can not possibly arrive simultaneously, institute Often to receive a packet, current statistic value is obtained from RAM according to channel number and measurement period counter values, is write after adding 1 Enter identical address in RAM, the channel current statistic period corresponding final W systems have just been obtained when to current statistic end cycle Evaluation.
The reading inter-packet gap being calculated by the reading speed computing module 20 can ensure depositing for external memory Storage space had not only spilt over but also had not read to be read one by one under the premise of sky, and carried out reading packet behaviour to approach the code check of input average bit rate Make.
The output control module 30 as shown in figure 14, including reads packet request control module 31 and timing module 32, output The reading inter-packet gap that control module 30 is calculated using reading speed computing module 20 is sent out pair to the code stream memory module 10 The reading packet in the channel is asked, and then data packet is made to read simultaneously final output from external memory 40.
The reading package operation that packet request control module 31 is used to control each channel is read, it is logical from the 1st channel to last one Road carries out judging whether to meet successively reading packet requirement, at the time of reading packet from the acquisition current channel last time of timing module 32, from reading Speed calculation module 20 obtain current channel reading inter-packet gap, when the timing module 32 current time and current channel it is upper When the secondary interval read between the packet moment is more than or equal to the reading inter-packet gap in the channel, sent out to the code stream memory module 10 logical to this The reading packet in road is asked, and the current time that the reading packet request to the channel is sent out to the code stream memory module 10 is stored as institute This stated in timing module 32 reads the packet moment, enters the deterministic process to next channel later.
In multichannel multiplexing process, carry out judging whether to meet to read to wrap successively from the 1st channel to a last channel wanting It asks.Because the judgement in each channel carries out successively, timing module 32 is that a shared counting is arranged in all channels Device, by clock cycle count, maximum value must be over current channel GiPossibility maximum value, using counter current value as working as The preceding moment.
If during the reading packet condition judgment in some channel, current time read the time interval at packet moment apart from last time Less than inter-packet gap is read, then illustrates that current channel does not meet reading packet also and requires, do not continue waiting for channel satisfaction and read this when Packet requires, but redirects into the deterministic process to next channel, thus improves the ability of band-wise processing.
Stream bit rate smoothing processing mechanism is transmitted compared to conventional broadcasting and TV headend equipment IP-based, the present invention can be handled IP receiving stream bandwidth highers, band-wise processing ability is effectively promoted, and in the case of external limited memory, can be realized each logical The longer time storage of data in road.
Therefore the present invention realizes the multichannel multiplexing smoothing processing of code check and dynamically distributes and stores, and is patrolled with less Collecting resource and smaller memory realizes IP-based channel transmission stream bit rate smoothing processing, reduces hardware cost.
Embodiments described above does not constitute the restriction to the technical solution protection domain.It is any in above-mentioned implementation Modifications, equivalent substitutions and improvements etc., should be included in the protection model of the technical solution made by within the spirit and principle of mode Within enclosing.

Claims (9)

1. a kind of method of IP-based transmission stream bit rate smoothing processing, which is characterized in that including:
The inlet flow for being multiplexed at least one channel data packet is received,
The data packet in the inlet flow is tentatively cached,
Calculate the storage list that the data packet to arrive earliest in the data packet tentatively cached should be stored in external memory First base address stores the data packet into the storage unit base address of the external memory,
The reading inter-packet gap in each channel is calculated, the reading packet for sending out each channel according to the reading inter-packet gap in each channel successively is asked It asks, the reading inter-packet gap in each channel, specifically according to each measurement period received data packet packet in each channel predetermined number measurement period The corresponding physical memory location of data packet packet number and each channel in each channel stored in several average value, the external memory What number was calculated,
External memory where calculating the data packet that each channel will be read according to the principle of the reading packet request and first in first out In storage unit base address, the data packet in each channel is read and exported from the external memory.
2. a kind of method of IP-based transmission stream bit rate smoothing processing as described in claim 1, which is characterized in that
The data packet to arrive earliest in the data packet tentatively cached should be stored in the storage unit base in external memory Address depends on the offset address of base address and the data packet of the affiliated channel of the data packet in external memory,
The base address of storage unit in external memory where the data packet in each channel that will be read exists depending on each channel The offset address of the channel oldest stored data packet in base address and external memory in external memory,
Base address of each channel in external memory depends on the base address in last channel and the last channel corresponds to Default Number of Storage Units,
The default Number of Storage Units depends on the maximal rate of each channel transfer stream of correspondence of CPU dynamic configurations and maximum is deposited Store up the time.
3. a kind of method of IP-based transmission stream bit rate smoothing processing as claimed in claim 2, which is characterized in that by one Measurement period is divided into the reading inter-packet gap calculation window of predetermined number and non-reading inter-packet gap calculation window, the current system from each channel The meter period reads the time before inter-packet gap calculation window terminates to next measurement period to start, for counting each channel current statistic Period corresponding received data packet packet number, by the reception data in each channel that each measurement period in predetermined number measurement period obtains The average value of the received data packet packet number in each channel in the predetermined number measurement period is calculated in packet number.
4. a kind of method of IP-based transmission stream bit rate smoothing processing as claimed in claim 3, which is characterized in that described pre- The reading inter-packet gap calculation window for determining number is corresponded with each channel, for calculating each channel successively in the measurement period Reading inter-packet gap.
5. a kind of method of IP-based transmission stream bit rate smoothing processing as described in any in Claims 1-4, feature exist In each channel distance is asked, in particular to judged successively to the reading packet for sending out each channel according to each channel reading inter-packet gap successively Whether the interval that last time reads packet has reached the reading inter-packet gap in the channel, if it is, the reading packet request in the channel is initiated, otherwise, Into the judgement in next channel.
6. a kind of device of IP-based transmission stream bit rate smoothing processing, which is characterized in that including:The code stream of interconnection stores Module, reading speed computing module, output control module, and the external memory that is connect with the code stream memory module, wherein
The code stream memory module, for receiving the inlet flow for being multiplexed at least one channel data packet, and to the inlet flow In data packet do preliminary caching, outside should be stored in by calculating the data packet to arrive earliest in the data packet tentatively cached Storage unit base address in memory, by data packet storage to the storage unit base address of the external memory In, and the storage in the data packet place external memory for asking that each channel that will be read is calculated is wrapped according to the reading received The data packet in each channel is read from the external memory and exported in the base address of unit,
The reading speed computing module, the reading inter-packet gap for each channel to be calculated, and it is sent to the output control mould Block, the reading inter-packet gap in each channel, specifically according to each measurement period received data packet in each channel predetermined number measurement period The corresponding actual storage list of the data packet packet number in each channel stored in the average value of packet number, the external memory and each channel What first number was calculated,
The output control module, the reading for sending out each channel to the code stream memory module according to the reading inter-packet gap in each channel Packet request,
The external memory for storing the data packet in input code flow, and is waited for and being read.
7. a kind of device of IP-based transmission stream bit rate smoothing processing as claimed in claim 6, which is characterized in that the code Memory module is flowed, including:Memory management module, for calculating the data packet institute to arrive earliest in the data packet tentatively cached It should be stored in the storage unit base address in external memory,
Storage unit base address in the preliminary caching by data packet to be processed in external memory depends on the number According to the offset address of the base address in external memory and the data packet of channel belonging to packet,
The base address of storage unit in external memory where being additionally operable to the data packet for calculating each channel that will be read,
The base address of storage unit in external memory where the data packet in each channel that will be read exists depending on each channel The offset address of the channel oldest stored data packet in base address and external memory in external memory,
The default storage in base address and each channel that base address of each channel in external memory depends on last channel is single First number, the default Number of Storage Units depend on the maximal rate and maximum storage time of the transport stream of CPU dynamic configurations.
8. a kind of device of IP-based transmission stream bit rate smoothing processing as claimed in claim 7, which is characterized in that the code Memory module is flowed, further includes that the input buffer module being connected with the memory management module, output module, channel base address are deposited Store up module, default Number of Storage Units preserving module, the first offset address memory module, packet number statistical module and the long storage mould of packet Block, wherein
The input buffer module, for receiving the inlet flow for being multiplexed at least one channel data packet, and to the inlet flow In data packet do preliminary caching, the number for obtaining and arriving earliest in the data packet that tentatively caches is sent out to the memory management module The request of the storage unit base address in the external memory is stored according to Bao Suoying,
The output module is used to receive the reading packet request of the reading speed computing module, and according to the request to the storage Storage unit base address in external memory where the data packet that management module acquisition request will be read,
Channel base address memory module is used to preserve base address of each channel in external memory,
The default Number of Storage Units preserving module, for preserving the maximal rate and most by the transport stream of CPU dynamic configurations Number of Storage Units of each channel that big storage time determines in external memory,
The first offset address memory module, for storing in each channel external memory the offset of oldest stored data packet Location,
The packet number statistical module is used to count the number of data packets that each channel is stored in external memory,
The packet that the long memory module of packet preserves the currently processed data packet in each channel is grown.
9. a kind of device of IP-based transmission stream bit rate smoothing processing as described in any in claim 6 to 8, feature exist In the reading speed computing module includes the time control module being connected with each other, receiver packet number statistical module and reading inter-packet gap Computing module, wherein
The receiver packet number statistical module is for counting the input that each measurement period receives in the measurement period of predetermined number The data packet packet number in each channel in stream,
The reading inter-packet gap read inter-packet gap computing module and be used to calculate each channel in each measurement period,
The time control module is for assisting the receiver packet number statistical module to be counted the measurement period in predetermined number The data packet packet number in each channel in the inlet flow that interior each measurement period receives, and the auxiliary reading inter-packet gap computing module into Row reads the calculating of inter-packet gap, realizes three counters, is clock counter, measurement period counter and reading inter-packet gap meter respectively Window counter is calculated,
The output control module includes the reading packet request control module and timing module of interconnection, wherein
It is described read packet request control module be used for judge successively each channel current time apart from last time read packet the moment interval whether The reading inter-packet gap in the channel is had reached, if it is, the reading packet request in the channel is initiated, otherwise, into sentencing for next channel It is disconnected,
The timing module is for generating a counter, for defining the current time and reading the packet moment.
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