CN105306403A - Method and system for reducing peak-to-average ratio of transmitting signal of OFDM system - Google Patents
Method and system for reducing peak-to-average ratio of transmitting signal of OFDM system Download PDFInfo
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- CN105306403A CN105306403A CN201510710472.0A CN201510710472A CN105306403A CN 105306403 A CN105306403 A CN 105306403A CN 201510710472 A CN201510710472 A CN 201510710472A CN 105306403 A CN105306403 A CN 105306403A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2614—Peak power aspects
- H04L27/2615—Reduction thereof using coding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2614—Peak power aspects
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Abstract
The invention discloses a method and a system for reducing a peak-to-average ratio of a transmitting signal of an OFDM system. The system comprises an FPGA module; a digital to analog converter, which is connected with the FPGA module and is used for achieving digital to analog conversion and processing a signal with a high front-end data rate; and a power module, which is connected with the FPGA module and the digital to analog converter and is used for providing a direct current working voltage. A fast Fourier transformation unit of the system disclosed by the invention achieves multi-carrier mapping; a butterfly computing unit adopts 4 pairs of RAM*2 to store operands of butterfly computing to greatly improve the computing speed; a twiddle factor unit adopts a look-up table method to accelerate the algorithm execution speed; a ping-pang cache structure is configured to a ping-pang structure to improve the computing speed; and a pre-encoding unit adopts the Zadoff-Chu sequences algorithm, which is conducive to reduce intersymbol interference (ISI), and meanwhile, a Zadoff-Chu sequence has symmetry, so that the sequence generation complexity can be reduced.
Description
Technical field
The invention belongs to communication technical field, specifically, is a kind of method and system of the peak-to-average force ratio that transmits for reducing ofdm system.
Background technology
In wireless communication system, the transmitter of wireless base station utilizes power amplifier to transmit, and object compensates the signal attenuation brought because propagation distance is long.Power amplifier has certain range of linearity, and the cost of power amplifier depends on the size of its range of linearity.The signal with high peak-to-average power ratio can reduce the efficiency of power amplifier and increase power loss, and this proposes very high requirement to the linearity of power amplifier.In order to guaranteed output amplifier operation is in the range of linearity, and improve its efficiency, this just requires that the signal peak-to-average ratio of ingoing power amplifier must within certain limit.In a wireless communication system, the normal signal peak-to-average ratio using chopping techniques to reduce ingoing power amplifier, but the introducing of unfortunately chopping techniques, may bring distorted signals to a certain degree, and the problem such as out of band spectrum expansion or monkey chatter.Ofdm system peak-to-average force ratio average power is higher, very sensitive to nonlinear effect, and this just requires some parts of transmitter, and such as high power amplifier, A/D and D/A converter etc. have very large linear dynamic range, and making to realize cost increases.Meanwhile, the non-linear of these parts also can produce nonlinear distortion to the larger signal of dynamic range, causes that subchannel disturbs, the distortion of signal amplitude and phase place, thus affects the performance of ofdm system.Therefore, the peak-to-average force ratio how reducing ofdm system is theoretical conversion is the key put into practice.
Summary of the invention
The object of the present invention is to provide a kind of method and system of the peak-to-average force ratio that transmits for reducing ofdm system, be intended to solve the easy distortion of the signal existed in existing wireless communication system, cause that subchannel disturbs, the distortion of signal amplitude and phase place, thus affect the problem of ofdm system performance.
The present invention is achieved in that a kind of method of the peak-to-average force ratio that transmits for reducing ofdm system, describedly comprises for reducing the transmit method of peak-to-average force ratio of ofdm system:
Realize combination sequential logic;
Realize digital-to-analogue conversion, the signal that process front end data speed is high.
Further, described realization combination sequential logic comprises:
To input signal conversion and the inverse Fourier signal of process;
Also signal is turned to string and first carries out constellation mapping process, then be parallel signal serial conversion;
To the process of precoding unit output signal;
Signal amplitude is estimated;
First circulation prefix processing is added to the signal of parallel-serial conversion, parallel signal is being converted to serial signal.
Further, described invert fast fourier transformation module comprises:
Butterfly arithmetic element, for passing through coefficient
symmetry, periodicity and reducibility abbreviation, as long as obtain the DFT of 4 N/4 points, i.e. X
1(K), X
2(K), X
3and X (K)
4(K), just whole X can be obtained
(K)value, operand greatly reduces;
Filter, is connected with described butterfly arithmetic element, for the noise that filtering produces inside and outside the outer frequency of band and system of conversion;
Twiddle factor unit, is connected with described butterfly arithmetic element, and for storing complex constant required in butterfly computation, this constant is positioned on the unit circle of complex number plane;
Ping-pang cache structure, is connected with described filter, for solving the contradiction between burst reception high data rate and reduction process speed, realizes generating date;
Further, described signal amplitude estimation comprises:
Obtain each sampling number certificate of signal;
Calculate the signal amplitude of each sampled point signal.
Further, described again process parallel-serial conversion output signal comprises:
The threshold value of each modulated carrier is judged by look-up table;
The gain coefficient of each carrier wave is calculated according to threshold value.
Further, described input signal conversion and the inverse Fourier signal of process to be comprised:
Realize the star-like simplifying plan of signal, leggy modulation;
Changing down is carried out to the signal of input;
The time delay anticipation of signal;
Raising speed is carried out to input signal.
The described peak-to-average force ratio system that transmits comprises:
FPGA module, by writing precoding method and companding method program, processes signal, realizes the function reducing ofdm signal peak-to-average force ratio;
Digital to analog converter, is connected with described FPGA module, for realizing digital-to-analogue conversion, and the signal that process front end data speed is high;
Power module, is connected with described FPGA module and digital to analog converter, for providing direct-current working volts.
Further, described FPGA module comprises:
Serioparallel exchange unit, for converting input signal and the inverse Fourier signal of process;
Precoding unit, is connected with described serioparallel exchange unit, carries out preliminary treatment for turning also signal to string;
Invert fast fourier transformation unit, is connected with described precoding unit and serioparallel exchange unit, for processing precoding unit output signal;
Signal amplitude estimation unit, is connected with described precoding unit, for estimating signal amplitude;
Companding unit, is connected with described serioparallel exchange unit and signal amplitude estimation unit, for again processing parallel-serial conversion output signal;
Further, described invert fast fourier transformation unit comprises:
Butterfly arithmetic element, for passing through coefficient
symmetry, periodicity and reducibility abbreviation, as long as obtain the DFT of 4 N/4 points, i.e. X
1(K), X
2(K), X
3and X (K)
4(K), just whole X can be obtained
(K)value, operand greatly reduces;
Filter, is connected with described butterfly arithmetic element, for the noise that filtering produces inside and outside the outer frequency of band and system of conversion;
Twiddle factor unit, is connected with described butterfly arithmetic element, and for storing complex constant required in butterfly computation, this constant is positioned on the unit circle of complex number plane;
Ping-pang cache structure, is connected with described filter, for solving the contradiction between burst reception high data rate and reduction process speed, realizes generating date;
Described precoding unit uses adder and multiplier;
Further, described signal amplitude estimation unit comprises:
Signal acquisition subelement, for obtaining each sampling number certificate of signal;
Signal amplitude computation subunit, connects described signal acquisition subelement, for calculating the amplitude of each sampled point signal.
Further, described companding unit comprises:
Threshold judgement subelement, for judging the threshold value of each modulated carrier by look-up table;
Gain modulation subelement, is connected with described threshold judgement subelement, calculates the gain coefficient of each carrier wave according to threshold value.
Further, described serioparallel exchange unit comprises:
Constellation mapping block, for realizing star-like simplifying plan, the leggy modulation of signal;
String turns and module, is connected, for reducing the speed of input signal with described constellation mapping block;
Cyclic prefix module, turns and model calling with described string, for the time delay anticipation of signal;
And turn string module, be connected with described cyclic prefix module, for improving the speed of input signal.
The method and system of the peak-to-average force ratio that transmits for reducing ofdm system provided by the invention, invert fast fourier transformation unit comprises butterfly processing element, filter, twiddle factor unit and ping-pang cache structure further, achieves multicarrier and maps; Butterfly arithmetic element adopts 4 couples of RAM*2 to store the operand of butterfly computing, thus significantly improves arithmetic speed; Twiddle factor unit uses look-up table, also accelerates the execution speed of algorithm; Ping-pang cache structure, is configured to ping-pong structure, further increases arithmetic speed; Precoding unit adopts excellent Zadoff-Chusequences algorithm, has good autocorrelation and cross correlation, is conducive to reducing intersymbol interference, and Zadoff-Chu sequence has symmetry simultaneously, can reduce the complexity that sequence generates.
Compared with prior art, technical advantage of the present invention is as follows:
1, the present invention greatly simplify Zadoff-Chusequences algorithm, greatly reduces the complexity that program realizes.
2, the present invention has lower peak-to-average force ratio than single Zadoff-Chusequences precoding method and single companding method.
3, the present invention adopts extensive field programmable device to make, can by configuring different programs, and realize the flexible amendment to running parameter, device structure is simplified, and cost significantly reduces.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the reduction ofdm system transmitter peak-to-average force ratio system that the embodiment of the present invention provides;
In figure: 1, field programmable gate array (FPGA) module; 2, digital to analog converter; 3, power module.
Fig. 2 is the system program structured flowchart of the peak-to-average force ratio that transmits for reducing ofdm system that the embodiment of the present invention provides.
Fig. 3 is four Program modual graphs of the serioparallel exchange module that the embodiment of the present invention provides.
Fig. 4 is four Program modual graphs of the invert fast fourier transformation module that the embodiment of the present invention provides.
Fig. 5 is two Program modual graphs of the signal amplitude estimation module that the embodiment of the present invention provides.
Fig. 6 is two Program modual graphs of the companding module that the embodiment of the present invention provides.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with embodiment, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
Below in conjunction with drawings and the specific embodiments, application principle of the present invention is further described.
Fig. 1 shows the structure chart of reduction ofdm system transmitter peak-to-average force ratio algorithm of the present invention, and as shown in Figure 1, this system comprises: FPGA module 1, digital to analog converter 2 and voltage module 3.Wherein FPGA module 1 comprises serioparallel exchange unit, precoding unit, invert fast fourier transformation (IFFT) unit, signal amplitude estimation unit and companding unit supervisor module.The present invention is applicable to the less LTE of sub-carrier number, digital audio broadcasting (DAB), digital video broadcasting (DVB) and WLAN etc. system transmitter especially.
Serioparallel exchange unit in Fig. 2, for by port input signal and output signal, wherein inner composition as shown in Figure 3, comprises constellation mapping unit, string turns and unit, cyclic prefix unit and and turn string location.
Constellation mapping unit, for realizing star-like simplifying plan, the leggy modulation of signal.
String turns and unit, for carrying out changing down to the signal of input, facilitates FPGA process.
Cyclic prefix unit, for the time delay anticipation of signal, plays the effect of protection valid data.
And turn string location, for carrying out raising speed to input signal, so that high-speed transfer.
Precoding unit in Fig. 2, connects the port of serioparallel exchange unit, input signal data by port, connect invert fast fourier transformation unit port, output signal data by port.Adopt Zadoff-Chu sequence, there is good autocorrelation and cross correlation, be conducive to the mutual interference reducing unlike signal, and self has symmetry, reduce the complexity that sequence generates.Adopt the quantification look-up table of 2048, simplify the complexity of computing, improve arithmetic speed.
Invert fast fourier transformation unit in Fig. 3, connects precoding unit port by port, input signal data, by port connection signal Amplitude Estimation unit port, connect serioparallel exchange unit port by port, export and turn string data, realize OFDM, multi-carrier modulation.
Fig. 4 shows the concrete structure of invert fast fourier transformation unit in Fig. 2, comprising: butterfly processing element, filter, twiddle factor unit and ping-pang cache structure.As shown in Figure 4, signal enters butterfly processing element by port, twiddle factor unit connects butterfly processing element port by port, filter connects the port of butterfly processing element by port, ping-pang cache structure unit connects port of wave filter by port, and last ping-pang cache structure passes through port output signal.
Described invert fast fourier transformation unit comprises further:
Butterfly arithmetic element, for passing through coefficient
symmetry, periodicity and reducibility abbreviation, as long as obtain the DFT of 4 N/4 points, i.e. X
1(K), X
2(K), X
3and X (K)
4(K), just whole X can be obtained
(K)value, operand greatly reduces;
Filter, is connected with described butterfly arithmetic element, for the noise that filtering produces inside and outside the outer frequency of band and system of conversion;
Twiddle factor unit, is connected with described butterfly arithmetic element, and for storing complex constant required in butterfly computation, this constant is positioned on the unit circle of complex number plane;
Ping-pang cache structure, is connected with described filter, for solving the contradiction between burst reception high data rate and reduction process speed, realizes generating date;
Described precoding unit uses adder and multiplier;
Butterfly arithmetic element, adopts 4 couples of RAM*2 to store the operand of butterfly computing, thus significantly improves arithmetic speed.
Twiddle factor unit, uses look-up table, also accelerates the execution speed of algorithm, greatly reduce algorithm complex.
Filter, for the noise that filtering produces inside and outside the outer frequency of band and system of conversion.
Ping-pang cache structure, in FPGA, opens up RAMX and RAMY, is configured to ping-pong structure, and when RAMX is in mode of operation, RAMY is in input state; When RAMX is in input pattern, RAMY is in running order, forms pipelining-stage project organization, improves arithmetic speed further.
Signal amplitude estimation unit in Fig. 2, for connecting invert fast fourier transformation unit port by port, input signal data, connect companding unit port by port, output signal data, realizes the calculating of signal amplitude.
Fig. 5 shows the concrete structure of Amplitude Estimation unit in Fig. 2, comprising: signal acquisition subelement and amplitude computation subunit.As shown in Figure 5, signal obtains subelement by port input signal, and signal acquisition subelement connects amplitude estimation subelement port by port, and export data to amplitude computation subunit, last amplitude computation subunit is by port output signal data.
Signal acquisition subelement, for extracting signal, adopts fifo structure.
Amplitude computation subunit, for calculating the amplitude of signal.
Companding unit in Fig. 2, for connecting serioparallel exchange unit port by port, connect Amplitude Estimation unit port by port, successively from port input data, then connect ADC unit port by port, output signal data, this unit adopts quantization method heterogeneous, and averages instead of peak value in companding flex point, i.e. so-called C converter technique, realize compression large-signal, expansion small-signal.
Fig. 6 shows the concrete structure of companding unit in Fig. 2, comprising: threshold judgement subelement and gain modulation subelement.
As shown in Figure 6, signal is by port input threshold judgement subelement, and threshold judgement subelement connects gain modulation subelement port by port, and then gain modulation subelement is by port output signal data.
Threshold judgement subelement, for being judged the threshold value of each modulated carrier by look-up table, improves arithmetic speed.
Gain modulation subelement, calculates the gain coefficient of each carrier wave according to threshold value.
Power module 3 in Fig. 1, for providing the direct-current working volts of each parts, embodiment adopts commercially available general integrated voltage-stabilized DC power supply chip LM1085, and its output voltage is+3.3V, supply current is 1000mA.
Digital to analog converter 2 in Fig. 1, realizes digital-to-analogue conversion, and directly high to front end data speed signal processes, and does not need to add plug-in unit again.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, all any amendments done within the spirit and principles in the present invention, equivalent replacement and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. transmit for reducing ofdm system the method for peak-to-average force ratio, it is characterized in that, describedly comprises for reducing the transmit method of peak-to-average force ratio of ofdm system:
Realize combination sequential logic;
Realize digital-to-analogue conversion, the signal that process front end data speed is high;
Direct-current working volts are provided.
2. the method for the peak-to-average force ratio that transmits for reducing ofdm system as claimed in claim 1, is characterized in that, described realization combination sequential logic comprises further:
To input signal conversion and the inverse Fourier signal of process;
Also signal is turned to string and first carries out constellation mapping process, then be parallel signal serial conversion;
To the process of precoding unit output signal;
Signal amplitude is estimated;
First circulation prefix processing is added to the signal of parallel-serial conversion, parallel signal is being converted to serial signal.
3. the method for the peak-to-average force ratio that transmits for reducing ofdm system as claimed in claim 2, it is characterized in that, described invert fast fourier transformation module comprises further:
Butterfly arithmetic element, for passing through coefficient
symmetry, periodicity and reducibility abbreviation, obtain the DFT of 4 N/4 points, i.e. X
1(K), X
2(K), X
3and X (K)
4(K), whole X is just obtained
(K)value;
Filter, is connected with described butterfly arithmetic element, for the noise that filtering produces inside and outside the outer frequency of band and system of conversion;
Twiddle factor unit, is connected with described butterfly arithmetic element, and for storing complex constant required in butterfly computation, this constant is positioned on the unit circle of complex number plane;
Ping-pang cache structure, is connected with described filter, for solving the contradiction between burst reception high data rate and reduction process speed, realizes generating date.
4. the method for the as claimed in claim 2 peak-to-average force ratio that transmits for reducing ofdm system, is characterized in that, describedly comprises further signal amplitude estimation:
Obtain each sampling number certificate of signal;
Calculate the signal amplitude of each sampled point signal.
5. the method for the peak-to-average force ratio that transmits for reducing ofdm system as claimed in claim 2, is characterized in that, described again process parallel-serial conversion output signal comprises further:
The threshold value of each modulated carrier is judged by look-up table;
The gain coefficient of each carrier wave is calculated according to threshold value.
6. the method for the as claimed in claim 2 peak-to-average force ratio that transmits for reducing ofdm system, is characterized in that, describedly comprises further input signal conversion and the inverse Fourier signal of process:
Realize the star-like simplifying plan of signal, leggy modulation;
Changing down is carried out to the signal of input;
The time delay anticipation of signal;
Raising speed is carried out to input signal.
7. transmit for reducing ofdm system as claimed in claim 1 the peak-to-average force ratio system that transmits of method of peak-to-average force ratio, and it is characterized in that, described in the peak-to-average force ratio system that transmits comprise:
FPGA module, by writing precoding method and companding method program, processes signal, realizes reducing ofdm signal peak-to-average force ratio;
Digital to analog converter, is connected with described FPGA module, for realizing digital-to-analogue conversion, and the signal that process front end data speed is high;
Power module, is connected with described FPGA module and digital to analog converter, for providing direct-current working volts.
8. transmit peak-to-average force ratio system as claimed in claim 7, and it is characterized in that, described FPGA module comprises further:
Serioparallel exchange unit, for converting input signal and the inverse Fourier signal of process;
Precoding unit, is connected with described serioparallel exchange unit, carries out preliminary treatment for turning also signal to string;
Invert fast fourier transformation unit, is connected with described precoding unit and serioparallel exchange unit, for processing precoding unit output signal;
Signal amplitude estimation unit, is connected with described precoding unit, for estimating signal amplitude;
Companding unit, is connected with described serioparallel exchange unit and signal amplitude estimation unit, for again processing parallel-serial conversion output signal;
Described invert fast fourier transformation unit comprises further:
Butterfly arithmetic element, for passing through coefficient
symmetry, periodicity and reducibility abbreviation, obtain the DFT of 4 N/4 points, i.e. X
1(K), X
2(K), X
3and X (K)
4, then obtain whole X (K)
(K)value;
Filter, is connected with described butterfly arithmetic element, for the noise that filtering produces inside and outside the outer frequency of band and system of conversion;
Twiddle factor unit, is connected with described butterfly arithmetic element, and for storing complex constant required in butterfly computation, this constant is positioned on the unit circle of complex number plane;
Ping-pang cache structure, is connected with described filter, for solving the contradiction between burst reception high data rate and reduction process speed, realizes generating date;
Described precoding unit uses adder and multiplier;
Described signal amplitude estimation unit comprises further:
Signal acquisition subelement, for obtaining each sampling number certificate of signal;
Signal amplitude computation subunit, connects described signal acquisition subelement, for calculating the amplitude of each sampled point signal;
Described companding unit comprises further:
Threshold judgement subelement, for judging the threshold value of each modulated carrier by look-up table;
Gain modulation subelement, is connected with described threshold judgement subelement, calculates the gain coefficient of each carrier wave according to threshold value;
Described serioparallel exchange unit comprises further:
Constellation mapping block, for realizing star-like simplifying plan, the leggy modulation of signal;
String turns and module, is connected, for reducing the speed of input signal with described constellation mapping block;
Cyclic prefix module, turns and model calling with described string, for the time delay anticipation of signal;
And turn string module, be connected with described cyclic prefix module, for improving the speed of input signal.
9. an application rights requires to transmit for reducing ofdm system described in 1-6 any one the digital audio broadcasting transmitter of method of peak-to-average force ratio.
10. an application rights requires to transmit for reducing ofdm system described in 1-6 any one the WLAN (wireless local area network) transmitter of method of peak-to-average force ratio.
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| CN107135057A (en) * | 2017-05-03 | 2017-09-05 | 哈尔滨工业大学 | A kind of efficient frequency division multiplexing Waveform generation method expanded based on zero hangover DFT |
| CN107943133A (en) * | 2018-01-17 | 2018-04-20 | 湖北师范大学 | A kind of novel automatic cooling system |
| CN108768240A (en) * | 2018-07-09 | 2018-11-06 | 广东水利电力职业技术学院（广东省水利电力技工学校） | A kind of AC induction motor servo drive system and control method |
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| CN106534025A (en) * | 2016-10-14 | 2017-03-22 | 西安电子科技大学 | Carrier injection peak-to-average power ratio suppression method based on improved cross entropy |
| CN106534025B (en) * | 2016-10-14 | 2019-07-16 | 西安电子科技大学 | Carrier signal injection method for suppressing peak to average ratio based on modified cross entropy |
| CN106899343A (en) * | 2017-03-28 | 2017-06-27 | 东南大学 | A kind of method of assessment Flip OFDM visible light communication system signal peak-to-average ratios |
| CN107135057A (en) * | 2017-05-03 | 2017-09-05 | 哈尔滨工业大学 | A kind of efficient frequency division multiplexing Waveform generation method expanded based on zero hangover DFT |
| CN107943133A (en) * | 2018-01-17 | 2018-04-20 | 湖北师范大学 | A kind of novel automatic cooling system |
| CN110163883A (en) * | 2018-03-29 | 2019-08-23 | 长春工业大学 | A kind of tensioning integrated wheel type train of mechanism |
| CN108768240A (en) * | 2018-07-09 | 2018-11-06 | 广东水利电力职业技术学院（广东省水利电力技工学校） | A kind of AC induction motor servo drive system and control method |
| CN110071890A (en) * | 2019-04-24 | 2019-07-30 | 哈尔滨工业大学（深圳） | A kind of low peak average ratio FBMC-OQAM signal processing method and system |
| CN110071890B (en) * | 2019-04-24 | 2021-11-02 | 哈尔滨工业大学（深圳） | Low peak-to-average power ratio FBMC-OQAM signal processing method and system |
| CN113100739A (en) * | 2021-03-15 | 2021-07-13 | 桂林电子科技大学 | Portable multi-frequency electrical impedance imaging front-end data acquisition and processing method |
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Application publication date: 20160203 |