CN105277255A - Capacitive testing circuit, liquid level detecting circuit, use method thereof, cup and equipment - Google Patents
Capacitive testing circuit, liquid level detecting circuit, use method thereof, cup and equipment Download PDFInfo
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- CN105277255A CN105277255A CN201510800189.7A CN201510800189A CN105277255A CN 105277255 A CN105277255 A CN 105277255A CN 201510800189 A CN201510800189 A CN 201510800189A CN 105277255 A CN105277255 A CN 105277255A
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Abstract
A capacitive testing circuit is characterized by comprising a first resistor (R1), a second resistor (R2), a directional diode (D2), a first testing point (ca1), a second testing point (ca2), a power supply point (VCC9), a power supply ground point (GND9), a sampling diode (D1), a sampling point (Q), a sampling capacitor (C1), a sampling connecting point (P1), a single-chip microcomputer (PIC12F510), a testing signal switch (MOS1) and a testing signal control point (P1). The liquid level detecting circuit is provided with the capacitive testing circuit and two polar plates. The invention further provides a use method of the liquid level detecting circuit. The cup has the technical characteristic provided by a random solution in the technical solutions, and is also provided with an Internet communication module. The equipment has the technical characteristic provided by a random solution in the technical solutions, and is also provided with the Internet communication module. The capacitive testing circuit has advantages of low cost, high flexibility in application, long service life, high stability and high reliability.
Description
Technical field
The invention belongs to electricity field, be specifically related to capacitance test circuit, liquid level detection circuit, the using method of liquid level detection circuit, cup, equipment.
Background technology
Smart Home is the embodiment of the Internet of Things produced under the influence on development of internet, the major embodiment mode of Smart Home is human lives's household objects to carry out intellectuality, networking, the life staying idle at home that Smart Home can improve the mankind strengthens convenience, comfortableness, security, artistry, the feature of environmental protection, economy, its many benefit makes Smart Home start to enter huge numbers of families, and Smart Home correlation technique is just in vigorous growth will be more flourishing.
Water is Source of life, the life of the mankind is closely bound up with water, because water is liquid, generally need when the mankind use to there is stable shaped container contain, the many household articles of the mankind are relevant to having stable shaped container, such as cup, water bottle, bucket, bathtub, washing machine, water heater, water dispenser, fish jar etc.; For having the household articles of liquid container in use, the volume due to liquid container is fixed often, so the degree of depth of liquid is important indicator, otherwise easily overflows; For having for stable shaped liquid container, its liquid depth often may be used for the assessment of liquid volume, liquid weight.
The monitoring technology of the liquid level of existing liquid container mainly contains ball float, resistance-type, condenser type, and this several mode respectively has its relative merits.
Existing capacitance testing circuit cost is higher, there is room for improvement.
Existing capacitance type liquid level testing circuit cost is higher, there is room for improvement.
Capacitance type liquid level testing circuit is mainly assessed with measured capacitance, although this mode precision is high, but testing result is easily subject to, and temperature is waftd, the impact of component ageing, and the mankind when using water the water temperature of different occasion require it is different, cause the level sensing the possibility of result of existing capacitance type liquid level testing circuit can be different because of the difference of different use occasions like this, so the stability of existing capacitance type liquid level testing circuit, versatility exist room for improvement for Smart Home.
Summary of the invention
For the problem described in technical solution background, the present invention proposes capacitance test circuit, liquid level detection circuit, the using method of liquid level detection circuit, cup, equipment.
The present invention has following technology contents.
1, a capacitance test circuit, is characterized in that: comprise a resistance (R1), No. two resistance (R2), No. three resistance (R3), limit to diode (D2), test point (ca1), No. two test points (ca2), power supply point (VCC9), power supply place (GND9), sampling diode (D1), sampled point (Q), sampling capacitance (C1), sampling tie point (P1), single-chip microcomputer (PIC12F510), test signal switch (MOS1), test signal reference mark (P1);
Test signal switch (MOS1) has a switching channels, a control end, the level controlling the control end of test signal switch (MOS1) can realize disconnection and the UNICOM of switching channels, and the control end of test signal switch (MOS1) is connected with test signal reference mark (P1);
Test signal reference mark (P1) is connected with an IO pin of single-chip microcomputer (PIC12F510);
One end of a resistance (R1) is connected with a test point (ca1), and the other end of a resistance (R1) is connected to power supply point (VCC9) via the switching channels of test signal switch (MOS1);
One end of No. two resistance (R2) is connected with a test point (CA1);
One end of No. three resistance (R3) is connected with No. two test points (CA2);
Limit the positive pole to diode (D2) to be connected with No. two test points (CA2), limit the negative pole to diode (D2) to be connected with power supply place (GND9);
The end that the end that No. three resistance (R3) are not connected with No. two test points (CA2) and No. two resistance (R2) are not connected with a test point (ca1) is connected;
The points of common connection of No. three resistance (R3), No. two resistance (R2) is connected with the positive pole of sampling diode (D1);
The negative pole of sampling diode (D1) is connected with sampled point (Q);
One end of sampling capacitance (C1) is connected with sampled point (Q), and the other end of sampling capacitance (C1) is connected with power supply place (GND9);
Sampling tie point (P1) is connected with sampled point (Q);
Sampling tie point (P1) is connected with a pin that can be set to AD sampling pattern of single-chip microcomputer (PIC12F510), can gather to make single-chip microcomputer (PIC12F510) magnitude of voltage that sampled point (Q) namely adopts the charging end of electric capacity (C1);
Sampling tie point (P1) with one of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode be connected, the electric charge that single-chip microcomputer (PIC12F510) can have excretion sampled point (Q) is the ability that new test is prepared; When this of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode is set to high impedance mode time, this of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode can not affect the magnitude of voltage of sampled point (Q); When this of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode be set to IO output mode and output low level time, the effect that the electric charge that single-chip microcomputer (PIC12F510) can play excretion sampled point (Q) reduces sampled point (Q) magnitude of voltage thinks that new test is prepared;
The supply pin (VDD) of single-chip microcomputer (PIC12F510) is connected with power supply point (VCC9), and the grounding leg (VSS) of single-chip microcomputer (PIC12F510) is connected with power supply place (GND9);
The IO pin of the single-chip microcomputer (PIC12F510) be connected with test signal reference mark (P1) can export high level, low level, control with the break-make realizing the switching channels of test signal switch (MOS1), and the PWM test signal for testing capacitor can be formed;
The test philosophy of realization of the present invention to the capacitance of testing capacitance (CS) is: of the present invention when testing application testing capacitance (CS) of the present invention, the two ends of testing capacitance (CS) respectively with a test point (ca1), No. two test points (ca2) are connected, because test signal is pwm signal, testing capacitance has virtual impedance for pwm signal can be considered as equivalent resistance, for same test signal, the equivalent resistance of the testing capacitance of different capacitance is different, the testing capacitance (CS) of different capacitance can cause a test point (ca1), pressure drop between No. two test points (ca2) is different, thus cause the magnitude of voltage that in the equal unit interval, sampling capacitance (C1) fills different, those of ordinary skill in the art can according to the corresponding relation of testing capacitance value (CS) with sampling capacitance (C1) institute charging voltage value in the unit interval, electric capacity (C1) institute charging voltage value is adopted to calculate the capacitance of testing capacitance (CS) in unit interval, appropriately should control the test duration when the present invention applies avoids sampling capacitance (C1) to be completely filled in as far as possible, limit can play to diode (D2) effect preventing testing capacitance (CS) to charge to sampling capacitance (C1) when inter-train pause discharges via No. two resistance (R2), No. three resistance (R3).
2, a kind of capacitance test circuit as described in technology contents 1, is characterized in that: also comprise Single Chip Microcomputer (SCM) program; Single Chip Microcomputer (SCM) program burning is in single-chip microcomputer (PIC12F510).
3, a kind of capacitance test circuit as described in technology contents 1, is characterized in that: the pin that the part pin of described single-chip microcomputer (PIC12F510) both can be set to AD sampling pattern also can be set to IO input pattern and also can be set to IO output mode.
4, a liquid level detection circuit, is characterized in that: the technical scheme described in the content that possesses skills 1, also has a pole plate (121), No. two pole plates (120); A pole plate (121) is connected with a test point (ca1) of capacitance test circuit; No. two pole plates (120) are connected with No. two test points (ca2) of capacitance test circuit; Pole plate (121), No. two pole plates (120) all make the good conductor of electricity consumption make.
The using method of a kind of liquid level detection circuit 5, as described in technology contents 4, it is characterized in that: pole plate (121), No. two pole plates (120) are attached on the outer wall of insulating vessel (140) respectively, it is the arrangement of longitudinally staggering that a pole plate (121), No. two pole plates (120) do not have contour point i.e. pole plate (121), No. two pole plates (120) in lengthwise position.
The using method of a kind of liquid level detection circuit 6, as described in technology contents 4, it is characterized in that: by longitudinal arrangement paired to a pole plate (121) of multiple liquid level detection circuit as described in technology contents 4, No. two pole plates (120) on the differing heights position of the outer wall of insulating vessel (140), and the single-chip microcomputer (PIC12F510) of each liquid level detection circuit is merged into same single-chip microcomputer in conjunction with common practise, judge liquid level (150) position according to the difference in size of each composition to the capacitance of pole plate; The each composition being positioned at liquid level (150) top is very little to the capacitance between pole plate, and the voltage that single-chip microcomputer (PIC12F510) collects at sampled point (Q) is higher; The each composition being positioned at liquid level (150) below is comparatively large to the capacitance between pole plate, and the voltage that single-chip microcomputer (PIC12F510) collects at sampled point (Q) is lower; Testing result is not vulnerable to that temperature is waftd, the impact of component ageing, and testing result is reliable and stable.
7, a cup, is characterized in that: all technical characteristic of the technical scheme in the content 1-6 that possesses skills described in arbitrary technology contents, also has communication module and can be connected to internet and liquid level information can be made to transmit on the internet.
8, an equipment, is characterized in that: all technical characteristic of the technical scheme in the content 1-7 that possesses skills described in arbitrary technology contents, also has communication module and can be connected to internet and liquid level information can be made to transmit on the internet.
Technology contents illustrates and beneficial effect.
The present invention is with low cost, applying flexible, long service life, reliable and stable.
Accompanying drawing explanation
Accompanying drawing 1 is the schematic diagram of embodiment 1.
Accompanying drawing 2 is the schematic diagram of embodiment 2.
As the schematic diagram that Fig. 3 is embodiment 3.
concrete embodiment
Below in conjunction with embodiment, the present invention will be described.
Embodiment 1, as shown in Figure 1, a kind of capacitance test circuit, is characterized in that: comprise a resistance (R1), No. two resistance (R2), No. three resistance (R3), limit to diode (D2), test point (ca1), No. two test points (ca2), power supply point (VCC9), power supply place (GND9), sampling diode (D1), sampled point (Q), sampling capacitance (C1), sampling tie point (P1), single-chip microcomputer (PIC12F510), test signal switch (MOS1), test signal reference mark (P1);
Test signal switch (MOS1) has a switching channels, a control end, the level controlling the control end of test signal switch (MOS1) can realize disconnection and the UNICOM of switching channels, and the control end of test signal switch (MOS1) is connected with test signal reference mark (P1);
Test signal reference mark (P1) is connected with an IO pin of single-chip microcomputer (PIC12F510);
One end of a resistance (R1) is connected with a test point (ca1), and the other end of a resistance (R1) is connected to power supply point (VCC9) via the switching channels of test signal switch (MOS1);
One end of No. two resistance (R2) is connected with a test point (CA1);
One end of No. three resistance (R3) is connected with No. two test points (CA2);
Limit the positive pole to diode (D2) to be connected with No. two test points (CA2), limit the negative pole to diode (D2) to be connected with power supply place (GND9);
The end that the end that No. three resistance (R3) are not connected with No. two test points (CA2) and No. two resistance (R2) are not connected with a test point (ca1) is connected;
The points of common connection of No. three resistance (R3), No. two resistance (R2) is connected with the positive pole of sampling diode (D1);
The negative pole of sampling diode (D1) is connected with sampled point (Q);
One end of sampling capacitance (C1) is connected with sampled point (Q), and the other end of sampling capacitance (C1) is connected with power supply place (GND9);
Sampling tie point (P1) is connected with sampled point (Q);
Sampling tie point (P1) is connected with a pin that can be set to AD sampling pattern of single-chip microcomputer (PIC12F510), can gather to make single-chip microcomputer (PIC12F510) magnitude of voltage that sampled point (Q) namely adopts the charging end of electric capacity (C1);
Sampling tie point (P1) with one of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode be connected, the electric charge that single-chip microcomputer (PIC12F510) can have excretion sampled point (Q) is the ability that new test is prepared; When this of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode is set to high impedance mode time, this of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode can not affect the magnitude of voltage of sampled point (Q); When this of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode be set to IO output mode and output low level time, the effect that the electric charge that single-chip microcomputer (PIC12F510) can play excretion sampled point (Q) reduces sampled point (Q) magnitude of voltage thinks that new test is prepared;
The supply pin (VDD) of single-chip microcomputer (PIC12F510) is connected with power supply point (VCC9), and the grounding leg (VSS) of single-chip microcomputer (PIC12F510) is connected with power supply place (GND9);
The IO pin of the single-chip microcomputer (PIC12F510) be connected with test signal reference mark (P1) can export high level, low level, control with the break-make realizing the switching channels of test signal switch (MOS1), and the PWM test signal for testing capacitor can be formed;
The test philosophy of realization of the present invention to the capacitance of testing capacitance (CS) is: of the present invention when testing application testing capacitance (CS) of the present invention, the two ends of testing capacitance (CS) respectively with a test point (ca1), No. two test points (ca2) are connected, because test signal is pwm signal, testing capacitance has virtual impedance for pwm signal can be considered as equivalent resistance, for same test signal, the equivalent resistance of the testing capacitance of different capacitance is different, the testing capacitance (CS) of different capacitance can cause a test point (ca1), pressure drop between No. two test points (ca2) is different, thus cause the magnitude of voltage that in the equal unit interval, sampling capacitance (C1) fills different, those of ordinary skill in the art can according to the corresponding relation of testing capacitance value (CS) with sampling capacitance (C1) institute charging voltage value in the unit interval, electric capacity (C1) institute charging voltage value is adopted to calculate the capacitance of testing capacitance (CS) in unit interval, appropriately should control the test duration when the present invention applies avoids sampling capacitance (C1) to be completely filled in as far as possible,
Limit can play to diode (D2) effect preventing testing capacitance (CS) to charge to sampling capacitance (C1) when inter-train pause discharges via No. two resistance (R2), No. three resistance (R3).
Also comprise Single Chip Microcomputer (SCM) program; Single Chip Microcomputer (SCM) program burning is in single-chip microcomputer PIC12F510.
The pin that the part pin of described single-chip microcomputer PIC12F510 both can be set to AD sampling pattern also can be set to IO input pattern and also can be set to IO output mode.
Embodiment 2, as shown in Figure 2, a kind of liquid level detection circuit, is characterized in that: have the technical scheme described in embodiment 1, also have a pole plate 121, No. two pole plates 120; A pole plate 121 is connected with a test point ca1 of capacitance test circuit; No. two pole plates 120 are connected with No. two test point ca2 of capacitance test circuit; A pole plate 121, No. two pole plates 120 all make the good conductor of electricity consumption make.
Embodiment 3, as shown in Figure 3, the using method of a kind of liquid level detection circuit as described in embodiment 2, it is characterized in that: a pole plate 121, No. two pole plates 120 are attached on the outer wall of insulating vessel 140 respectively, it is the arrangement of longitudinally staggering that a pole plate 121, No. two pole plates 120 do not have a contour point i.e. pole plate 121, No. two pole plates 120 in lengthwise position.
The using method of embodiment 4, a kind of liquid level detection circuit as described in embodiment 2, it is characterized in that: by a pole plate 121, No. two longitudinal arrangements that pole plate 120 is paired of multiple liquid level detection circuit as described in embodiment 2 on the differing heights position of the outer wall of insulating vessel 140, and the single-chip microcomputer PIC12F510 of each liquid level detection circuit is merged into same single-chip microcomputer in conjunction with common practise, judge liquid level 150 position according to the difference in size of each composition to the capacitance of pole plate; Each composition above liquid level 150 is very little to the capacitance between pole plate, and the voltage that single-chip microcomputer PIC12F510 collects at sampled point Q is higher; Each composition below liquid level 150 is comparatively large to the capacitance between pole plate, and the voltage that single-chip microcomputer PIC12F510 collects at sampled point Q is lower; Testing result is not vulnerable to that temperature is waftd, the impact of component ageing, and testing result is reliable and stable.
Embodiment 5, a kind of cup, is characterized in that: all technical characteristic with the technical scheme in embodiment 1-6 described in arbitrary embodiment, also has communication module and can be connected to internet and liquid level information can be made to transmit on the internet.
Embodiment 6, a kind of equipment, is characterized in that: all technical characteristic with the technical scheme in embodiment 1-6 described in arbitrary embodiment, also has communication module and can be connected to internet and liquid level information can be made to transmit on the internet.
This illustrates that not quite clear place is prior art or common practise, therefore does not repeat.
Claims (8)
1. a capacitance test circuit, is characterized in that: comprise a resistance (R1), No. two resistance (R2), No. three resistance (R3), limit to diode (D2), test point (ca1), No. two test points (ca2), power supply point (VCC9), power supply place (GND9), sampling diode (D1), sampled point (Q), sampling capacitance (C1), sampling tie point (P1), single-chip microcomputer (PIC12F510), test signal switch (MOS1), test signal reference mark (P1);
Test signal switch (MOS1) has a switching channels, a control end, the level controlling the control end of test signal switch (MOS1) can realize disconnection and the UNICOM of switching channels, and the control end of test signal switch (MOS1) is connected with test signal reference mark (P1);
Test signal reference mark (P1) is connected with an IO pin of single-chip microcomputer (PIC12F510);
One end of a resistance (R1) is connected with a test point (ca1), and the other end of a resistance (R1) is connected to power supply point (VCC9) via the switching channels of test signal switch (MOS1);
One end of No. two resistance (R2) is connected with a test point (CA1);
One end of No. three resistance (R3) is connected with No. two test points (CA2);
Limit the positive pole to diode (D2) to be connected with No. two test points (CA2), limit the negative pole to diode (D2) to be connected with power supply place (GND9);
The end that the end that No. three resistance (R3) are not connected with No. two test points (CA2) and No. two resistance (R2) are not connected with a test point (ca1) is connected;
The points of common connection of No. three resistance (R3), No. two resistance (R2) is connected with the positive pole of sampling diode (D1);
The negative pole of sampling diode (D1) is connected with sampled point (Q);
One end of sampling capacitance (C1) is connected with sampled point (Q), and the other end of sampling capacitance (C1) is connected with power supply place (GND9);
Sampling tie point (P1) is connected with sampled point (Q);
Sampling tie point (P1) is connected with a pin that can be set to AD sampling pattern of single-chip microcomputer (PIC12F510), can gather to make single-chip microcomputer (PIC12F510) magnitude of voltage that sampled point (Q) namely adopts the charging end of electric capacity (C1);
Sampling tie point (P1) with one of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode be connected, the electric charge that single-chip microcomputer (PIC12F510) can have excretion sampled point (Q) is the ability that new test is prepared; When this of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode is set to high impedance mode time, this of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode can not affect the magnitude of voltage of sampled point (Q); When this of single-chip microcomputer (PIC12F510) can be set to high impedance mode and the pin that can be set to IO output mode be set to IO output mode and output low level time, the effect that the electric charge that single-chip microcomputer (PIC12F510) can play excretion sampled point (Q) reduces sampled point (Q) magnitude of voltage thinks that new test is prepared;
The supply pin (VDD) of single-chip microcomputer (PIC12F510) is connected with power supply point (VCC9), and the grounding leg (VSS) of single-chip microcomputer (PIC12F510) is connected with power supply place (GND9);
The IO pin of the single-chip microcomputer (PIC12F510) be connected with test signal reference mark (P1) can export high level, low level, control with the break-make realizing the switching channels of test signal switch (MOS1), and the PWM test signal for testing capacitor can be formed;
The test philosophy of realization of the present invention to the capacitance of testing capacitance (CS) is: of the present invention when testing application testing capacitance (CS) of the present invention, the two ends of testing capacitance (CS) respectively with a test point (ca1), No. two test points (ca2) are connected, because test signal is pwm signal, testing capacitance has virtual impedance for pwm signal can be considered as equivalent resistance, for same test signal, the equivalent resistance of the testing capacitance of different capacitance is different, the testing capacitance (CS) of different capacitance can cause a test point (ca1), pressure drop between No. two test points (ca2) is different, thus cause the magnitude of voltage that in the equal unit interval, sampling capacitance (C1) fills different, those of ordinary skill in the art can according to the corresponding relation of testing capacitance value (CS) with sampling capacitance (C1) institute charging voltage value in the unit interval, electric capacity (C1) institute charging voltage value is adopted to calculate the capacitance of testing capacitance (CS) in unit interval, appropriately should control the test duration when the present invention applies avoids sampling capacitance (C1) to be completely filled in as far as possible, limit can play to diode (D2) effect preventing testing capacitance (CS) to charge to sampling capacitance (C1) when inter-train pause discharges via No. two resistance (R2), No. three resistance (R3).
2. a kind of capacitance test circuit as claimed in claim 1, is characterized in that: also comprise Single Chip Microcomputer (SCM) program; Single Chip Microcomputer (SCM) program burning is in single-chip microcomputer (PIC12F510).
3. a kind of capacitance test circuit as claimed in claim 1, is characterized in that: the pin that the part pin of described single-chip microcomputer (PIC12F510) both can be set to AD sampling pattern also can be set to IO input pattern and also can be set to IO output mode.
4. a liquid level detection circuit, is characterized in that: have technical scheme according to claim 1, also has a pole plate (121), No. two pole plates (120); A pole plate (121) is connected with a test point (ca1) of capacitance test circuit; No. two pole plates (120) are connected with No. two test points (ca2) of capacitance test circuit; Pole plate (121), No. two pole plates (120) all make the good conductor of electricity consumption make.
5. the using method of a kind of liquid level detection circuit as claimed in claim 4, it is characterized in that: pole plate (121), No. two pole plates (120) are attached on the outer wall of insulating vessel (140) respectively, it is the arrangement of longitudinally staggering that a pole plate (121), No. two pole plates (120) do not have contour point i.e. pole plate (121), No. two pole plates (120) in lengthwise position.
6. the using method of a kind of liquid level detection circuit as claimed in claim 4, it is characterized in that: by longitudinal arrangement paired to a pole plate (121) of multiple liquid level detection circuit as claimed in claim 4, No. two pole plates (120) on the differing heights position of the outer wall of insulating vessel (140), and the single-chip microcomputer (PIC12F510) of each liquid level detection circuit is merged into same single-chip microcomputer in conjunction with common practise, judge liquid level (150) position according to the difference in size of each composition to the capacitance of pole plate; The each composition being positioned at liquid level (150) top is very little to the capacitance between pole plate, and the voltage that single-chip microcomputer (PIC12F510) collects at sampled point (Q) is higher; The each composition being positioned at liquid level (150) below is comparatively large to the capacitance between pole plate, and the voltage that single-chip microcomputer (PIC12F510) collects at sampled point (Q) is lower; ; Testing result is not vulnerable to that temperature is waftd, the impact of component ageing, and testing result is reliable and stable.
7. a cup, is characterized in that: all technical characteristic with the technical scheme in claim 1-6 described in arbitrary claim, also has communication module and can be connected to internet and liquid level information can be made to transmit on the internet.
8. an equipment, is characterized in that: all technical characteristic with the technical scheme in claim 1-7 described in arbitrary claim, also has communication module and can be connected to internet and liquid level information can be made to transmit on the internet.
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| CN201510800189.7A CN105277255A (en) | 2015-11-19 | 2015-11-19 | Capacitive testing circuit, liquid level detecting circuit, use method thereof, cup and equipment |
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| CN201510800189.7A CN105277255A (en) | 2015-11-19 | 2015-11-19 | Capacitive testing circuit, liquid level detecting circuit, use method thereof, cup and equipment |
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| CN202083436U (en) * | 2011-05-13 | 2011-12-21 | 嘉兴学院 | Sectional capacitor type liquid level sensor |
| CN103575360A (en) * | 2012-07-19 | 2014-02-12 | 北京航天试验技术研究所 | Circuit measuring achieving method for segmentation capacitor liquid level sensor |
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- 2015-11-19 CN CN201510800189.7A patent/CN105277255A/en active Pending
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| CN201497543U (en) * | 2009-05-21 | 2010-06-02 | 浙江达峰科技有限公司 | Capacitance induction type water temperature and level sensor |
| CN101625251A (en) * | 2009-07-31 | 2010-01-13 | 佛山市中协电器有限公司 | Capacitance induction type liquid level sensor |
| CN201917376U (en) * | 2011-01-14 | 2011-08-03 | 苏州路之遥科技股份有限公司 | Capacitive liquid level sensor |
| CN202083436U (en) * | 2011-05-13 | 2011-12-21 | 嘉兴学院 | Sectional capacitor type liquid level sensor |
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Application publication date: 20160127 |