CN105264494B - Authentication processing device and method - Google Patents

Authentication processing device and method Download PDF

Info

Publication number
CN105264494B
CN105264494B CN201480000227.4A CN201480000227A CN105264494B CN 105264494 B CN105264494 B CN 105264494B CN 201480000227 A CN201480000227 A CN 201480000227A CN 105264494 B CN105264494 B CN 105264494B
Authority
CN
China
Prior art keywords
functional unit
shared resource
request message
unit
idle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201480000227.4A
Other languages
Chinese (zh)
Other versions
CN105264494A (en
Inventor
杜森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Publication of CN105264494A publication Critical patent/CN105264494A/en
Application granted granted Critical
Publication of CN105264494B publication Critical patent/CN105264494B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)

Abstract

The invention relates to an authentication processing device and method. The method comprises the following steps: receiving a request message for accessing the shared resource sent by a first functional unit; the request message carries information of a first functional unit; inquiring the operation state of the shared resource, and sending an authorization message to the first functional unit when the shared resource is idle so that the first functional unit can access the shared resource; and receiving the permission release request message of the first functional unit, and setting the shared resource to be idle according to the permission release request message. The embodiment of the invention solves the mutual exclusion problem when the first functional unit accesses the shared resource, and improves the robustness of the system.

Description

Authentication processing device and method
Technical Field
The present invention relates to the field of information security, and in particular, to an authentication processing apparatus and method.
Background
In multi-core chip applications, a scenario in which multiple core software or threads operate the same hardware or software is common, where the hardware includes, but is not limited to, a Random Access Memory (RAM), a register, and an Input/Output (IO) channel, and the software generally refers to sharing data among cores. The chip design generally requires that the read and write operations on the same hardware unit or shared data must be serial, otherwise, an error in reading or writing dirty data may occur. If a hardware channel register is configured with a shared area M1, the chip requires that write operations to M1 must be serialized, if two threads a1 and B1 both need to operate the shared area M1 (write first and read second), if a obtains scheduling execution first, it must perform write and read operations to M according to a first, and after a finishes the operations to M, B performs the operations to M in sequence.
In general DSP software, the mutual exclusion of software and hardware is generally solved by a semaphore mechanism, the semaphore ensures that only one thread operates on the mutually exclusive resource at the same time, and the semaphore can be realized by software or hardware. Assuming that the shared region M2 is protected by semaphore S, no matter whether thread a2 or thread B2 is operating, the right to use S of M2 needs to be acquired first, i.e., S-pend is performed, the system determines to give S to a2 or B2 according to scheduling, assuming that a2 acquires the thread of S, i.e., the read-write operation on M2 can be completed, and the thread B2 that does not acquire S needs to wait; after the operation is completed, A2 needs to release the use right S of M2, namely, S-post, B2 and the like are carried out to S, and then the operation on M2 is carried out, so that the serial operation of A2 and B2 on M2 is ensured by the use of S. Software or hardware semaphores are introduced to solve the mutual exclusion problem of shared resources, but the semaphore itself is also a shared resource.
Assuming that an exception occurs while either A2 or B2 is operating M2, i.e., semaphore S has not been released, then no other thread has had a chance to access M2.
In a multi-core application system, the probability of core exception is high, and assuming that a2 and B2 are located on two cores, and the exception hangs up when core a2 operates M2, then an application such as core B2 never acquires S.
Disclosure of Invention
The embodiment of the invention provides an authentication processing device and method, which can be used for realizing the purpose that when the serial operation of multithreading, multi-core or multi-mode operation is carried out, the access to shared resources can not conflict, and the access authority of the shared resources can be recovered under the abnormal condition.
In a first aspect, an embodiment of the present invention provides an authentication processing apparatus, where the apparatus includes: the device comprises a receiving unit, a query unit and a sending unit;
the receiving unit is used for receiving a request message for accessing the shared resource, which is sent by a first functional unit, wherein the request message carries information of the first functional unit, and sending the request message to the query unit;
the query unit is used for querying the operation state of the shared resource according to the received request information sent by the receiving unit;
the sending unit is configured to send an authorization message to the first functional unit when the shared resource is idle, so that the first functional unit accesses the shared resource;
the receiving unit is further configured to receive an authority release request message of the first functional unit, and set the shared resource to be idle according to the authority release request message.
With reference to the first aspect, in a first possible implementation manner of the first aspect, the receiving unit is specifically configured to receive a request message for accessing a shared resource, where the request message is sent by a plurality of first functional units, and the request message carries information of each first functional unit.
With reference to the first aspect, in a second possible implementation manner of the first aspect, the querying unit is specifically configured to generate a scheduling order list according to the information of the first functional unit, and send an authorization message to a first functional unit in the scheduling order list when the shared resource is idle.
With reference to the first aspect, in a third possible implementation manner of the first aspect, the apparatus further includes: and the judging unit is used for terminating the access of the first functional unit to the shared resource and setting the state of the shared resource to be idle when the access time of the first functional unit to access the shared resource exceeds the threshold time.
With reference to the third possible implementation manner of the first aspect, in a fourth possible implementation manner of the first aspect, the determining unit is specifically configured to set a software flag of the first functional unit for accessing the shared resource to be invalid, so as to terminate the access of the first functional unit to the shared resource.
In a second aspect, the present invention provides an authentication processing apparatus, including:
a network interface;
a processor;
a memory;
an application program physically stored in the memory, the application program comprising instructions operable to cause the processor and the system to perform the following:
receiving a request message for accessing the shared resource sent by a first functional unit; the request message carries information of a first functional unit;
inquiring the operation state of the shared resource, and sending an authorization message to the first functional unit when the shared resource is idle so that the first functional unit can access the shared resource;
and receiving the permission release request message of the first functional unit, and setting the shared resource to be idle according to the permission release request message.
With reference to the second aspect, in a first possible implementation manner of the second aspect, the application program may be configured to enable the processor and the system to execute a command that receives a request message for accessing a shared resource, where the request message carries information of a first functional unit, and the command that sends the request message to a query unit is:
receiving request messages for accessing shared resources sent by a plurality of first functional units, wherein the request messages carry information of the first functional units.
With reference to the second aspect, in a second possible implementation manner of the second aspect, the application program is operable to cause the processor and the system to execute the instruction for querying the operation state of the shared resource according to the received request information sent by the receiving unit to:
and generating a scheduling order list according to the information of the first functional unit, and sending an authorization message to the first functional unit in the scheduling order list when the shared resource is idle.
With reference to the second aspect, in a third possible implementation manner of the second aspect, the application program further includes instructions operable to cause the processor and the system to perform the following processes:
when the access time of the first functional unit for accessing the shared resource exceeds the threshold time, the first functional unit terminates the access of the shared resource, and the state of the shared resource is set to be idle.
With reference to the third possible implementation manner of the second aspect, in a fourth possible implementation manner of the second aspect, the application program is operable to cause the processor and the system to execute instructions that, when an access time for the first functional unit to access the shared resource exceeds a threshold time, terminate access to the shared resource by the first functional unit, and set a state of the shared resource to idle:
and setting the software mark of the first functional unit for accessing the shared resource to be invalid to terminate the access of the first functional unit to the shared resource.
In a third aspect, an embodiment of the present invention provides an authentication processing method, where the method includes:
receiving a request message for accessing the shared resource sent by a first functional unit; the request message carries information of a first functional unit;
inquiring the operation state of the shared resource, and sending an authorization message to the first functional unit when the shared resource is idle so that the first functional unit can access the shared resource;
and receiving the permission release request message of the first functional unit, and setting the shared resource to be idle according to the permission release request message.
With reference to the third aspect, in a first possible implementation manner of the third aspect, the receiving the request message for accessing the shared resource, where the request message is sent by the first functional unit, specifically includes: receiving request messages for accessing shared resources sent by a plurality of first functional units, wherein the request messages carry information of the first functional units.
With reference to the third aspect, in a second possible implementation manner of the third aspect, the querying an operation state of the shared resource, and when the shared resource is idle, sending an authorization message to the first functional unit specifically includes: and generating a scheduling order list according to the information of the first functional unit, and sending an authorization message to the first functional unit in the scheduling order list when the shared resource is idle.
With reference to the third aspect, in a third possible implementation manner of the third aspect, the method further includes: when the access time of the first functional unit for accessing the shared resource exceeds the threshold time, the first functional unit terminates the access of the shared resource, and the state of the shared resource is set to be idle.
With reference to the third possible implementation manner of the third aspect, in a fourth possible implementation manner of the third aspect, the terminating, by the first functional unit, the access to the shared resource specifically includes: and setting the software mark of the first functional unit for accessing the shared resource to be invalid.
The device and the method provided by the embodiment of the invention have the beneficial effects that: the serial operation of multithreading or multinuclear is realized by using an authentication message mechanism, so that the access to the shared resource is ensured not to conflict; shared resources are not unavailable due to operation abnormity of other threads or cores, single-core reset and recovery are supported, and system robustness is improved.
Drawings
Fig. 1 is a first schematic diagram of an authentication processing apparatus according to an embodiment of the present invention;
fig. 2 is a second schematic diagram of an authentication processing apparatus according to an embodiment of the present invention;
fig. 3 is a flowchart of an authentication processing method according to an embodiment of the present invention;
FIG. 4 is a diagram of a first authentication processing application interaction provided by an embodiment of the present invention;
fig. 5 is a diagram of a second authentication processing application interaction according to an embodiment of the present invention.
Detailed Description
The technical solution of the present invention is further described in detail by the accompanying drawings and embodiments.
Fig. 1 is a schematic diagram of an authentication processing apparatus according to an embodiment of the present invention. As shown in fig. 1, the present embodiment includes: a receiving unit 101, an inquiring unit 102, a transmitting unit 103 and a judging unit 104.
A receiving unit 101, configured to receive a request message for accessing a shared resource, where the request message carries information of a first functional unit, and send the request message to an inquiring unit;
in this embodiment, the second functional unit may be a main thread in a multi-thread system, a main core in a multi-core system, or a main standard in a multi-mode system. Correspondingly, the first functional unit may be a slave thread in a multi-thread system, or other cores in a multi-core system, or other systems in a multi-mode system.
Further, the receiving unit is specifically configured to receive request messages sent by the plurality of first functional units to access the shared resource, where the request messages carry information of the respective first functional units.
The query unit 102 is configured to query an operation state of the shared resource according to the received request information sent by the receiving unit.
Further, the query unit is specifically configured to generate a scheduling order list according to the information of the first functional unit, and send an authorization message to the first functional unit in the scheduling order list when the shared resource is idle.
A sending unit 103, configured to send an authorization message to the first functional unit when the shared resource is idle, so that the first functional unit accesses the shared resource.
The receiving unit 101 is further configured to receive an authority release request message of the first functional unit, and set the shared resource to be idle according to the authority release request message.
Further, the embodiment of the present invention further includes: a determining unit 104, configured to terminate the access to the shared resource by the first functional unit when the access time for the first functional unit to access the shared resource exceeds a threshold time, and set the state of the shared resource to idle.
Further, the determining unit is specifically configured to set a software flag of the first functional unit for accessing the shared resource to be invalid to terminate the access of the first functional unit to the shared resource.
Fig. 2 is a schematic diagram of an authentication processing apparatus according to an embodiment of the present invention. As shown in fig. 2, the present embodiment includes a network interface 21, a processor 22, and a memory 23. The system bus 24 is used to connect the network interface 21, the processor 22, and the memory 23.
The network interface 21 is used for communicating with an internet of things terminal, an internet of things access gateway, a bearer network, an internet of things service gateway and an application server.
The memory 23 may be a permanent memory such as a hard disk drive and a flash memory, with software modules and device drivers in the memory 23. The software module can execute various functional modules of the method; the device drivers may be network and interface drivers.
At start-up, these software components are loaded into memory 23 and then accessed by processor 22 and execute the following instructions:
receiving a request message for accessing the shared resource sent by a first functional unit; the request message carries information of a first functional unit;
inquiring the operation state of the shared resource, and sending an authorization message to the first functional unit when the shared resource is idle so that the first functional unit can access the shared resource;
and receiving the permission release request message of the first functional unit, and setting the shared resource to be idle according to the permission release request message.
The instruction process is applied to the authentication processing device to perform authentication processing, and the request information of the shared resource is accessed through the authentication processing device to process the request information, so that the access efficiency of the shared resource is improved.
Further, the processor, after accessing the software components of the memory 23, executes the instructions of the following process:
receiving request messages for accessing shared resources sent by a plurality of first functional units, wherein the request messages carry information of the first functional units.
Further, the processor, after accessing the software components of the memory 23, executes the instructions of the following process:
and generating a scheduling order list according to the information of the first functional unit, and sending an authorization message to the first functional unit in the scheduling order list when the shared resource is idle.
Further, the processor, after accessing the software components of the memory 23, executes the instructions of the following process:
when the access time of the first functional unit for accessing the shared resource exceeds the threshold time, the first functional unit terminates the access of the shared resource, and the state of the shared resource is set to be idle.
Further, the processor, after accessing the software components of the memory 23, executes the instructions of the following process:
and setting the software mark of the first functional unit for accessing the shared resource to be invalid to terminate the access of the first functional unit to the shared resource.
The instruction process realizes that the access to the shared resources can not conflict, and the access authority is forcibly recovered under the abnormal condition.
Fig. 3 is a flowchart of an authentication processing method according to an embodiment of the present invention. The main body of this embodiment is a second functional unit, and details of the setting process of the authority attribute of the first functional unit by the second functional unit are described. As shown in fig. 3, this embodiment includes the steps of:
step 301, the second functional unit receives a request message for accessing the shared resource sent by the first functional unit; the request message carries information of the first functional unit.
In this embodiment, the second functional unit may be configured as a main thread in a multi-thread system, a main core in a multi-core system, or a main system in a multi-mode system. Correspondingly, the first functional unit may be configured as a slave thread in multithreading, or other cores in a multi-core system, or other systems in a multi-mode system.
Further, receiving the request message for accessing the shared resource sent by the first functional unit specifically includes: receiving request messages for accessing shared resources sent by a plurality of first functional units, wherein the request messages carry information of the first functional units.
Step 302, the second functional unit queries the operating status of the shared resource, and sends an authorization message to the first functional unit when the shared resource is idle, so that the first functional unit can access the shared resource.
The second functional unit inquires whether the shared resource is in the operated state, if the shared resource is not operated, namely is idle, the second functional unit replies that the first functional unit can operate, and if the shared resource is in operation, the second functional unit waits for the end of the last processing. In the embodiment, by adding the authorization flow of the first functional unit to the second functional unit, the resource operation conflict among multiple threads, multiple cores or multiple modes is solved, the bus or system abnormality caused by the simultaneous rewriting or unlocking of the hardware register by the multiple functional units is avoided, and the software shared resource is prevented from being wrongly written or wrongly read by the multiple functional units.
Further, the querying the operation state of the shared resource, and when the shared resource is idle, sending an authorization message to the first functional unit specifically includes: and generating a scheduling order list according to the information of the first functional unit, and sending an authorization message to the first functional unit in the scheduling order list when the shared resource is idle. At this time, the first functional unit in the non-first order of the scheduling order table may perform other operations such as loading, unloading or upgrading, which do not affect the operation and use of other first functional units.
Step 303, the second functional unit receives the permission release request message of the first functional unit, and sets the shared resource to be idle according to the permission release request message.
After the first functional unit initiating the application obtains the authorization, the shared resource is operated, and after the operation is finished, the second functional unit receives the permission release request message initiated by the first functional unit.
Further, the method further comprises: when the access time of the first functional unit for accessing the shared resource exceeds the threshold time, the first functional unit terminates the access of the shared resource, and the state of the shared resource is set to be idle.
Further, terminating the access of the first functional unit to the shared resource specifically includes: and setting the software mark of the first functional unit for accessing the shared resource to be invalid.
Specifically, when the first functional unit accesses the shared resource, the software flag of the first functional unit is set to be valid, at this time, the second functional unit performs timing monitoring on the authorized operation, when the timing is exceeded, the software flag of the first functional unit becomes invalid, the second functional unit forcibly withdraws the operation authority, sets the state of the shared resource to be idle, and authorizes the shared resource to other first functional units waiting for authorization. The process improves the availability ratio of the single board, reduces the risk that certain resources are unavailable due to the fact that the certain resources are possibly hung up randomly originally to the extent that only the second functional unit is hung up and shared resources are unavailable, supports the reset and recovery of the single core, and provides system robustness. For a multi-mode system, if one system fails, the operation of the other system and the use of the resources of the same type are not influenced, and the other system can be loaded, unloaded or upgraded when the one system operates. Single-core reset is supported in the multi-core system, and specification and resource dynamic adjustment of core granularity are supported.
Fig. 4 is a first authentication processing application interaction diagram provided in the embodiment of the present invention. As shown in fig. 4, the first functional unit is thread a and thread B, the second functional unit is MAIN functional unit BB _ MAIN, and the shared resource is M. The application interaction process in the authentication processing system is as follows:
step 401, a plurality of first functional units initiate an operation application to a second functional unit. And the thread A and the thread B initiate operation application to the BB _ MAIN.
In step 402, the second functional unit checks the operating status of the shared resource. The BB _ MAIN receives and processes the request message of step 401, generates a scheduling order schedule according to the time when the thread a and the thread B initiate the operation application, and checks the M operation state.
And 403, when the shared resource is idle, the second functional unit authorizes the plurality of first functional units according to the scheduling order. When the M is idle without other operations, the BB _ MAIN authorizes the thread A and the thread B according to the scheduling order, and the thread A is supposed to obtain the authorization message earlier than the thread B, so that the thread A accesses the shared resource. At this point, thread B may perform other operations, such as upgrading, loading, etc. of thread B.
In step 404, the first functional unit accesses the shared resource. The operation of the thread on M is encapsulated in step 404.
Step 405, after the first functional unit finishes operating, the first functional unit sends an authority idle message to the second functional unit. And after finishing accessing the shared resource, the thread A sends an authority idle message to the BB _ MAIN. Under normal conditions, BB _ MAIN receives the authorization release message sent by the thread A, recovers the authority, grants the operation authority to the required thread B, and B receives the authorization message and then executes the operation of the step 404.
The embodiment further comprises step 406, the second functional unit enforces the withdrawal of the authorization rights.
It should be noted that the exception condition includes, but is not limited to, exception and loss of the permission release message when the thread a operates the shared resource. And BB _ MAIN monitors the timing when the thread A operates the M, and forcibly withdraws the operation authority of the thread A to the M when the time threshold is exceeded, and continues the next authority distribution processing.
Compared with the prior semaphore mechanism, the method has the advantages that many chip inter-core or inter-thread messages are realized by hardware, so that the loss of the semaphore on efficiency is not much larger than that of the semaphore directly by the hardware; meanwhile, the semaphore pend generally adopts a dead mode and the like, the thread B cannot process other tasks when waiting for the S, and after a message mechanism is adopted, the thread B can also process other tasks when waiting for the message authorization, so that the parallelism of the system can be increased. By adding the authorization flow of the first functional unit to the second functional unit, the resource operation conflict among multiple threads, multiple cores or multiple modes is solved, and the bus or system abnormity caused by the simultaneous rewriting or unlocking of a hardware register by the multiple first functional units and the error writing or error reading of the software shared resource by the multiple first functional units are avoided; the availability ratio of the single board is improved, the risk that certain resources are unavailable due to the fact that the single board can be hung at will is reduced, only the second functional unit is hung, and shared resources are unavailable, and system robustness is provided; furthermore, for a multi-mode system, when one system runs, the other system can be loaded, unloaded or upgraded, and when one system fails, the running of the other system and the use of similar resources are not influenced.
Fig. 5 is a diagram of a second authentication processing application interaction according to an embodiment of the present invention. As shown in fig. 5, the multimode resource management of the ethernet ETH channel is taken as an example to illustrate the application interaction process in the authentication processing system. The first functional unit is application software APP, the second functional unit is a baseband BB, and the shared resource is a driver DRV.
By using the technical scheme of the invention, the register operation of the ETH is brought into the management of an authorization mechanism, and the hardware can be operated only by obtaining the authorized APP, thereby ensuring the serial. Meanwhile, the authorization mechanism is realized in BB, which is invisible to APP, and for DRV, as BB is used to ensure mutual exclusion, DRV can not use semaphore any more, DRV realization is simplified, and overall system efficiency is improved.
Compared with using semaphores, the upper layer software BB isolates the multimode resources, but the bottom layer driving DRV still uses the semaphores to ensure that the multi-core operation is not conflicted when the channel priority register is operated, the lock is operated and the unlock is operated, coupling is introduced, and the condition that one thread is operated abnormally (the core is hung up) to cause the other thread to be abnormal exists. The embodiment simplifies the bottom-layer DRV, does not need various considerations of service scenes, and improves the DRV efficiency.
It is understood that the present embodiment is not limited to baseband L1 software applications, as L2/L3 software may be used. The high-level software also has the requirements of mutual exclusion of shared resources and isolation of multi-mode resources, and the same problems can be solved by the same method.
All multimode soft systems can refer to the application, and the system related to multimode resource management and fault isolation can be technically designed by the scheme of the invention.
The embodiment of the invention can be applied to various scenes such as single-core reset, multi-mode fault, fault single-board loading, single-system loading and the like, when the first functional unit accesses the shared resource, the authentication processing method and the authentication processing device are adopted, solves the resource operation conflict among multiple threads, multiple cores or multiple modes by adding an authorization flow, avoids the bus or system abnormity caused by the simultaneous rewriting or unlocking of a hardware register by a plurality of functional units, avoids the error writing or the error reading of the software shared resource by a plurality of functional units, for the multi-mode system, if one system fails, the operation of other systems and the use of the same kind of resources are not influenced, for a multi-mode system, when one system runs, the other system can be loaded, unloaded and upgraded, and in the DSP, the implementation of a bottom driver is simplified, various considerations of a service scene are not needed, and the efficiency of the bottom driver is improved; the availability ratio of the single board is improved through an authority recovery mechanism, the risk that any core is hung to death and certain resources are unavailable is reduced to the risk that the resources are hung to death only by a main core (the core where the authorization management is located), single-core reset is supported in multi-core, the specification of core granularity and dynamic adjustment of resources are supported, and the system robustness is improved.
Those of skill would further appreciate that the various illustrative components and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied in hardware, a software module executed by a processor, or a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (15)

1. An authentication processing apparatus, the apparatus being a second functional unit, the second functional unit being a main thread in a multi-thread, or a main core in a multi-core system, or a main standard in a multi-mode system, the apparatus comprising: the device comprises a receiving unit, a query unit and a sending unit;
the receiving unit is used for receiving a request message for accessing the shared resource, which is sent by a first functional unit, wherein the request message carries information of the first functional unit, and sending the request message to the query unit; the first functional unit is a slave thread except the master thread in the multithreading, or other cores except the master core in the multi-core system, or other systems except the master system in the multi-mode system;
the query unit is used for querying the operation state of the shared resource according to the received request information sent by the receiving unit;
the sending unit is configured to send an authorization message to the first functional unit when the shared resource is idle, so that the first functional unit accesses the shared resource;
the receiving unit is further configured to receive an authority release request message of the first functional unit, and set the shared resource to be idle according to the authority release request message.
2. The authentication processing apparatus according to claim 1, wherein the receiving unit is specifically configured to receive a request message for accessing the shared resource, where the request message carries information of each first functional unit, and the request message is sent by a plurality of first functional units.
3. The authentication processing apparatus according to claim 1, wherein the querying unit is specifically configured to generate a scheduling order list according to the information of the first functional unit, and send an authorization message to a first functional unit in the scheduling order list when the shared resource is idle.
4. The authentication processing apparatus according to claim 1, wherein said apparatus further comprises: and the judging unit is used for terminating the access of the first functional unit to the shared resource and setting the state of the shared resource to be idle when the access time of the first functional unit to access the shared resource exceeds the threshold time.
5. The authentication processing apparatus according to claim 4, wherein the determining unit is specifically configured to set a software flag of the first functional unit for accessing the shared resource to be invalid to terminate the access of the first functional unit to the shared resource.
6. An authentication processing apparatus, the apparatus being a second functional unit, the second functional unit being a main thread in a multi-thread, or a main core in a multi-core system, or a main standard in a multi-mode system, the apparatus comprising:
a network interface;
a processor;
a memory;
an application program physically stored in the memory, the application program comprising instructions operable to cause the processor and the system to perform the following:
receiving a request message for accessing the shared resource sent by a first functional unit; the request message carries information of a first functional unit; the first functional unit is a slave thread except the master thread in the multithreading, or other cores except the master core in the multi-core system, or other systems except the master system in the multi-mode system;
inquiring the operation state of the shared resource, and sending an authorization message to the first functional unit when the shared resource is idle so that the first functional unit can access the shared resource;
and receiving the permission release request message of the first functional unit, and setting the shared resource to be idle according to the permission release request message.
7. The authentication processing apparatus according to claim 6, wherein the application program is operable to cause the processor and the system to execute an instruction for receiving a request message for accessing the shared resource sent by the first functional unit, where the request message carries information of the first functional unit, and sending the request message to the query unit, where the instruction is:
receiving request messages for accessing shared resources sent by a plurality of first functional units, wherein the request messages carry information of the first functional units.
8. The authentication processing device of claim 6, wherein the application program is operable to cause the processor and the system to execute the instructions to query the operating state of the shared resource based on the received request message sent by the receiving unit to:
and generating a scheduling order list according to the information of the first functional unit, and sending an authorization message to the first functional unit in the scheduling order list when the shared resource is idle.
9. The authentication processing device of claim 6, wherein the application program further comprises instructions operable to cause the processor and the system to:
when the access time of the first functional unit for accessing the shared resource exceeds the threshold time, the first functional unit terminates the access of the shared resource, and the state of the shared resource is set to be idle.
10. The authentication processing apparatus of claim 9 wherein the application is operable to cause the processor and the system to execute instructions that terminate access to the shared resource by the first functional unit when an access time for the first functional unit to access the shared resource exceeds a threshold time, the instructions to set the state of the shared resource to idle:
and setting the software mark of the first functional unit for accessing the shared resource to be invalid to terminate the access of the first functional unit to the shared resource.
11. An authentication processing method, executed by a second functional unit, where the second functional unit is a main thread in a multi-thread, a main core in a multi-core system, or a main standard in a multi-mode system, the method comprising:
receiving a request message for accessing the shared resource sent by a first functional unit; the request message carries information of a first functional unit; the first functional unit is a slave thread except the master thread in the multithreading, or other cores except the master core in the multi-core system, or other systems except the master system in the multi-mode system;
inquiring the operation state of the shared resource, and sending an authorization message to the first functional unit when the shared resource is idle so that the first functional unit can access the shared resource;
and receiving the permission release request message of the first functional unit, and setting the shared resource to be idle according to the permission release request message.
12. The authentication processing method according to claim 11, wherein the receiving the request message for accessing the shared resource sent by the first functional unit specifically includes: receiving request messages for accessing shared resources sent by a plurality of first functional units, wherein the request messages carry information of the first functional units.
13. The authentication processing method according to claim 11, wherein said querying the operation state of the shared resource, and when the shared resource is idle, sending an authorization message to the first functional unit specifically includes: and generating a scheduling order list according to the information of the first functional unit, and sending an authorization message to the first functional unit in the scheduling order list when the shared resource is idle.
14. The authentication processing method of claim 11, wherein the method further comprises: when the access time of the first functional unit for accessing the shared resource exceeds the threshold time, the first functional unit terminates the access of the shared resource, and the state of the shared resource is set to be idle.
15. The authentication processing method of claim 14, wherein said terminating access of said first functional unit to said shared resource specifically comprises: and setting the software mark of the first functional unit for accessing the shared resource to be invalid.
CN201480000227.4A 2014-03-18 2014-03-18 Authentication processing device and method Active CN105264494B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2014/073593 WO2015139198A1 (en) 2014-03-18 2014-03-18 Authentication processing device and method

Publications (2)

Publication Number Publication Date
CN105264494A CN105264494A (en) 2016-01-20
CN105264494B true CN105264494B (en) 2020-04-28

Family

ID=54143630

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480000227.4A Active CN105264494B (en) 2014-03-18 2014-03-18 Authentication processing device and method

Country Status (2)

Country Link
CN (1) CN105264494B (en)
WO (1) WO2015139198A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110941591A (en) * 2019-11-22 2020-03-31 浪潮电子信息产业股份有限公司 File deletion method, device and equipment and readable storage medium
CN111679599B (en) * 2020-05-22 2022-01-25 中国航空工业集团公司西安航空计算技术研究所 High-reliability exchange method for CPU and DSP data

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101236509A (en) * 2007-01-30 2008-08-06 国际商业机器公司 System and method for managing locks
CN101446909A (en) * 2007-11-30 2009-06-03 国际商业机器公司 Method and system for managing task events
CN102316117A (en) * 2011-09-29 2012-01-11 中兴通讯股份有限公司南京分公司 Resource processing method and device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8095657B2 (en) * 2002-07-24 2012-01-10 Oracle America, Inc. First thread lock management for distributed data systems
CN102298539A (en) * 2011-06-07 2011-12-28 华东师范大学 Method and system for scheduling shared resources subjected to distributed parallel treatment
CN103297456B (en) * 2012-02-24 2016-09-28 阿里巴巴集团控股有限公司 Access method and the distributed system of resource is shared under a kind of distributed system
CN103458036B (en) * 2013-09-03 2017-02-15 杭州华三通信技术有限公司 Access device and method of cluster file system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101236509A (en) * 2007-01-30 2008-08-06 国际商业机器公司 System and method for managing locks
CN101446909A (en) * 2007-11-30 2009-06-03 国际商业机器公司 Method and system for managing task events
CN102316117A (en) * 2011-09-29 2012-01-11 中兴通讯股份有限公司南京分公司 Resource processing method and device

Also Published As

Publication number Publication date
CN105264494A (en) 2016-01-20
WO2015139198A1 (en) 2015-09-24

Similar Documents

Publication Publication Date Title
US9411646B2 (en) Booting secondary processors in multicore system using kernel images stored in private memory segments
US8561064B2 (en) Retaining ownership of a virtual function while an adapter is replaced
US9690737B2 (en) Systems and methods for controlling access to a shared data structure with reader-writer locks using multiple sub-locks
CN106874125B (en) Method and device for sharing system resources among multi-container systems
CN106354687B (en) Data transmission method and system
CN108025685B (en) Vehicle-mounted control device
US20080288691A1 (en) Method and apparatus of lock transactions processing in single or multi-core processor
CN112948321A (en) Method for managing the operation of a system-on-chip and corresponding system-on-chip
WO2014173364A1 (en) Shared resource access method and device
US20100312972A1 (en) Method, apparatus and system for enabling processor to access shared data
US20150254113A1 (en) Lock Spin Wait Operation for Multi-Threaded Applications in a Multi-Core Computing Environment
KR20110047753A (en) Method and system of data processing for deadlock free
CN105138310A (en) Concurrent access control method and system
US9063929B2 (en) Information processing apparatus, information processing method, computer-readable recording medium having stored therein program
US20190250942A1 (en) Storage Device Operation Method and Physical Server
CN111897666A (en) Method, device and system for communication among multiple processes
CN102801686B (en) Apparatus control method, main equipment, from equipment and master-slave equipment group
CN105264494B (en) Authentication processing device and method
KR102450133B1 (en) Distributed sysetm for managing distributed lock and operating method thereof
KR102053849B1 (en) Airplane system and control method thereof
US20130247065A1 (en) Apparatus and method for executing multi-operating systems
CN113961364A (en) Large-scale lock system implementation method and device, storage medium and server
US8935700B2 (en) Efficient lock hand-off in a symmetric multiprocessor system
KR101029788B1 (en) Method for delivering message between layers of middleware and computer readable medium recording program for performing the method
JP2014241124A (en) Exclusive control system

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant