CN105260239A - Function and performance balanced scheduling method for fault indicators - Google Patents

Function and performance balanced scheduling method for fault indicators Download PDF

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Publication number
CN105260239A
CN105260239A CN201510675700.5A CN201510675700A CN105260239A CN 105260239 A CN105260239 A CN 105260239A CN 201510675700 A CN201510675700 A CN 201510675700A CN 105260239 A CN105260239 A CN 105260239A
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task
line number
fault detector
columns
scheduling method
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CN105260239B (en
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梁安韬
王军锋
江伟
郑骁凌
赵晖
吴孝彬
孙振业
徐士华
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FUJIAN AUTOMATION ELECTRIC POWER TECHNOLOGY Co Ltd
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FUJIAN AUTOMATION ELECTRIC POWER TECHNOLOGY Co Ltd
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Abstract

The present invention provides a function and performance balanced scheduling method for fault indicators. The method comprises: setting a priority level of tasks of the fault indicators; calculating a line number and a column number of each task in a two-dimensional array according to the priority level of the tasks; and storing a task entry of the task into a corresponding two-dimensional array position according to the obtained line number and column number, and storing the line number and the column number. When an event happens suddenly, a CPU obtains a task corresponding to the event, the task entry of the task is obtained according to the line number and the column number stored by the task, a PC value is assigned to the task entry, and the CPU starts to implement the task, so that use convenience is brought for users, and scheduling efficiency is improved.

Description

A kind of for fault detector functional performance equalization scheduling method
Technical field
The present invention relates to a kind of for fault detector functional performance equalization scheduling method.
Background technology
Existing fault detector CPU taking cost into account generally adopts FLASH space large, the matching way that RAM is little, and it needs functional task many, in this case, micro operation system is used to carry out management role very difficult, and micro operation system needs to take ram space, such application task number will tail off, cannot the bring into play scheduling resource of whole CPU and the demand of application function.Traditional fault detector software design approach be adopt multiple task in order stream carry out, when there being accident to produce, must sequential execution of programmed task in turn, not only efficiency is low but also task action result possibly cannot meet, so just, cannot accomplish that accident produces application task scheduled for executing immediately, thus affect construction cycle and cost input.
Summary of the invention
The technical problem to be solved in the present invention, is to provide a kind of for fault detector functional performance equalization scheduling method.
The present invention is achieved in that a kind of for fault detector functional performance equalization scheduling method, comprises the steps:
Step 1, set the priority of the task of each fault detector;
Step 2, to calculate the line number of each task in two bit array and columns according to the priority of task;
Line number and columns by the position of the task entrance of this task stored in the two-dimensional array of correspondence, and store by the line number that step 3, basis obtain and columns;
Step 4, when the burst of a certain event, CPU obtains task corresponding to this event, and the line number stored according to this task and columns obtain the task entrance of this task, and task entrance is assigned to PC value, and CPU starts to perform this task.
Further, in described step 2, described line number is: priority is moved to right 3, carries out and computing afterwards with 0x07; Described columns is: priority and 0x07 are carried out and computing.
Further, the number of tasks of described fault detector is less than 64.
Further, in described step 3, line number and columns are deposited in a byte, and in this byte, two positions are empty.
Further, also comprise step 5, after CPU executes this task, recover other tasks carryings.
Tool of the present invention has the following advantages: the present invention's one is used for fault detector functional performance equalization scheduling method, adopt the inventive method to meet and use ram space little, the effect that after meeting again accident response, application task performs immediately, when not increasing cost overhead, meet the requirement of real-time performance and function, improve the competitive power of product.
Accompanying drawing explanation
The present invention is further illustrated in conjunction with the embodiments with reference to the accompanying drawings.
Fig. 1 is the inventive method flowchart.
Embodiment
As shown in Figure 1, the present invention is used for fault detector functional performance equalization scheduling method, comprises the steps:
Step 1, set the priority of the task of each fault detector, the number of tasks of described fault detector is less than 64;
Step 2, to calculate the line number of each task in two bit array and columns according to the priority of task, described line number is: priority is moved to right 3, carries out and computing afterwards with 0x07; Described columns is: priority and 0x07 are carried out and computing;
Line number and columns by the position of the task entrance of this task stored in the two-dimensional array of correspondence, and store by the line number that step 3, basis obtain and columns, and line number and columns are deposited in a byte, and in this byte, two positions are empty;
Step 4, when the burst of a certain event, CPU obtains task corresponding to this event, and the line number stored according to this task and columns obtain the task entrance of this task, and task entrance is assigned to PC value, and CPU starts to perform this task.
After step 5, CPU execute this task, recover other tasks carryings.
Wherein a kind of embodiment of the present invention is as follows:
Limit number of tasks for being less than 64, for small single sheet machine, the actual number of tasks that uses is certainly much smaller than 64.
This algorithm adopts matrix thought, namely 64 task distribution are amounted in 8 row and 8 row, task entrance is kept in two-dimensional array TaskEntry [Row] [Col] respectively, the priority of task adopts TaskPriority byte to represent, wherein BIT7BIT6 need not, BIT5BIT4BIT3 represents task column Col as Row that task is expert at, BIT2BIT1BIT0.Computing method Row=that task is expert at (TaskPriority>>3) & 0x07, task column computing method Col=TaskPriority & 0x07.
First arrange according to priority level from 1 to 64 tasks carrying entrances, and stored in TaskEntry two-dimensional array.
When being in the event N burst under low-power consumption, CPU performs equalization scheduling method, and the ranks at event N place are calculated, and wakes CPU up and enters state at full speed, the ranks task entrance at place is assigned to PC value, the application of then executing the task in N.After task N is complete, then call equalized scheduling algorithm, recover to other tasks carryings, or task reenters dormant state.
Although the foregoing describe the specific embodiment of the present invention; but be familiar with those skilled in the art to be to be understood that; specific embodiment described by us is illustrative; instead of for the restriction to scope of the present invention; those of ordinary skill in the art, in the modification of the equivalence done according to spirit of the present invention and change, should be encompassed in scope that claim of the present invention protects.

Claims (5)

1., for a fault detector functional performance equalization scheduling method, it is characterized in that: comprise the steps:
Step 1, set the priority of the task of each fault detector;
Step 2, to calculate the line number of each task in two bit array and columns according to the priority of task;
Line number and columns by the position of the task entrance of this task stored in the two-dimensional array of correspondence, and store by the line number that step 3, basis obtain and columns;
Step 4, when the burst of a certain event, CPU obtains task corresponding to this event, and the line number stored according to this task and columns obtain the task entrance of this task, and task entrance is assigned to PC value, and CPU starts to perform this task.
2. one according to claim 1 is used for fault detector functional performance equalization scheduling method, and it is characterized in that: in described step 2, described line number is: priority is moved to right 3, carries out and computing afterwards with 0x07; Described columns is: priority and 0x07 are carried out and computing.
3. one according to claim 1 is used for fault detector functional performance equalization scheduling method, it is characterized in that: the number of tasks of described fault detector is less than 64.
4. one according to claim 3 is used for fault detector functional performance equalization scheduling method, and it is characterized in that: in described step 3, line number and columns are deposited in a byte, and in this byte, two positions are empty.
5. one according to claim 1 is used for fault detector functional performance equalization scheduling method, it is characterized in that: also comprise step 5, after CPU executes this task, recover other tasks carryings.
CN201510675700.5A 2015-10-19 2015-10-19 One kind being used for fault detector functional performance equalization scheduling method Active CN105260239B (en)

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CN109067699A (en) * 2018-06-22 2018-12-21 中国建设银行股份有限公司 The distribution of login task executes system and method, storage medium

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CN103424666A (en) * 2013-07-18 2013-12-04 广东电网公司电力科学研究院 Overhead line fault indicator with voltage detection function
CN103607042A (en) * 2013-07-17 2014-02-26 国电南瑞科技股份有限公司 Power distribution network fault processing method for suburb long overhead line-oriented fault indicator
CN103683511A (en) * 2013-12-23 2014-03-26 国家电网公司 Method and system for processing fault of integrated monitoring platform based on power distribution network
CN104102572A (en) * 2013-04-01 2014-10-15 中兴通讯股份有限公司 Method and device for detecting and processing system faults

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US5210871A (en) * 1988-07-15 1993-05-11 The Charles Stark Draper Labroatory, Inc. Interprocessor communication for a fault-tolerant, mixed redundancy distributed information processing system
CN102183952A (en) * 2011-03-28 2011-09-14 杭州电子科技大学 Method for diagnosing embedded nonfatal fault in PLC (programmable logic controller)
CN104102572A (en) * 2013-04-01 2014-10-15 中兴通讯股份有限公司 Method and device for detecting and processing system faults
CN103336255A (en) * 2013-06-09 2013-10-02 福建奥通迈胜电力科技有限公司 Calibration method for high-precision failure indicator
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CN109067699A (en) * 2018-06-22 2018-12-21 中国建设银行股份有限公司 The distribution of login task executes system and method, storage medium
CN109067699B (en) * 2018-06-22 2021-09-28 中国建设银行股份有限公司 Login task distribution execution system and method, and storage medium

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