CN105242090A - Zero frequency suppression circuit and method for super-heterodyne signal receiving and analyzing instrument - Google Patents
Zero frequency suppression circuit and method for super-heterodyne signal receiving and analyzing instrument Download PDFInfo
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- CN105242090A CN105242090A CN201510734229.2A CN201510734229A CN105242090A CN 105242090 A CN105242090 A CN 105242090A CN 201510734229 A CN201510734229 A CN 201510734229A CN 105242090 A CN105242090 A CN 105242090A
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Abstract
The invention provides a zero frequency suppression circuit for a super-heterodyne signal receiving and analyzing instrument. Up-conversion channels of the super-heterodyne signal receiving and analyzing instrument are designed into a topological structure of double variable frequency channels with opposite phases, and reverse phase cancellation is performed on local oscillator leakage signals; a signal load to be detected is added to the radio frequency input port of one of the up-conversion channels, an amplitude and phase modulation circuit is added to the other up-conversion channel, and amplitude and phase modulation is performed on the local oscillator leakage signals to compensate load pull. According to the zero frequency suppression circuit and method for the super-heterodyne signal receiving and analyzing instrument, zero frequency suppression is improved by compensating the load pull, the load connection condition in practical use can be sufficiently considered, and the zero frequency suppression can be improved more effectively.
Description
Technical field
The present invention relates to technical field of measurement and test, particularly a kind of superheterodyne signal receiving and analyzing instrument zero-frequency suppresses circuit, also relates to a kind of superheterodyne signal receiving and analyzing instrument zero-frequency suppressing method.
Background technology
Superheterodyne signal receiving and analyzing instrument comprises up-converter circuit, and in up-converter circuit, local oscillation signal is operated in frequency sweep mode, and local frequency past high frequency sweep from IF-FRE.In the not loading of rf inputs mouth, and when local oscillation signal swept frequency equals intermediate frequency, local oscillation signal can be leaked to intermediate-frequency channel and form zero-frequency glitch because the local oscillator-intermediate frequency port isolation of frequency converter is limited.And when rf inputs mouth adds load, zero-frequency glitch can change thereupon, be called load balance factor effect, be called for short load balance factor.The existence of zero-frequency glitch limits the low-frequency test scope of superheterodyne signal receiving and analyzing instrument.
The method suppressed for the zero-frequency realizing superheterodyne signal receiving and analyzing instrument is at present, first local oscillation signal is extracted out by coupling mechanism, then phase shift and amplitude modulation(PAM) are carried out to the local oscillation signal be coupled out, again the local oscillation signal after modulation is inversely coupled to intermediate frequency output channel, thus disappear mutually with the local oscillation signal being leaked to intermediate-frequency channel is anti-phase, reach the object that zero-frequency suppresses.
Prior art often ignores load balance factor effect.Rf inputs mouth is not added any load by prior art, and zero-frequency glitch is suppressed to enough low by employing amplitude and phase-modulation.When reality is tested, rf inputs mouth needs to add load, and now, zero-frequency glitch can be worsened because adding load.
Summary of the invention
The present invention is directed to load balance factor problem of the prior art, propose a kind of traction by compensating load and the zero-frequency that effectively improves superheterodyne signal receiving and analyzing instrument suppresses circuit and method.
Technical scheme of the present invention is achieved in that
A kind of superheterodyne signal receiving and analyzing instrument zero-frequency suppresses circuit, the up-conversion via design of superheterodyne signal receiving and analyzing instrument is become two frequency conversion path topological structures that phase place is contrary, is carried out by local oscillator leakage signal anti-phasely disappearing mutually; The rf inputs mouth of frequency conversion path adds measured signal load on the way wherein, and another road up-conversion path increasing degree and phase-modulation circuit, by carrying out amplitude to local oscillator leakage signal and phase-modulation draws with compensating load.
Alternatively, adopt two frequency conversion path topological structure, two frequency converters are just the same, and local oscillator input signals is added in two frequency conversion paths through 90 degree of power splitters respectively, two-way IF output signal is superimposed as a road through 90 degree of power splitters again, and local oscillator leakage signal inversion is disappeared mutually.
Alternatively, measured signal load is added to the rf inputs mouth of wherein arbitrary road frequency conversion path, the rf inputs mouth of another road frequency conversion path connects reference load.
Alternatively, in connection reference load Na mono-tunnel frequency conversion path, controllable phase shifter and controllable attenuator is increased.
Alternatively, described controllable phase shifter and controllable attenuator adopt analog or digital integrated device.
Alternatively, regulate the numerical value of controllable phase shifter and controllable attenuator to draw with compensating load by programmable logic device (PLD), realize the suppression of zero-frequency glitch.
Present invention also offers a kind of superheterodyne signal receiving and analyzing instrument zero-frequency suppressing method, comprise the following steps:
First, adopt two frequency conversion path topological structure, and two frequency converters are just the same, local oscillator input signals is added in two frequency conversion paths through 90 degree of power splitters respectively, two-way IF output signal is superimposed as a road through 90 degree of power splitters again, and local oscillator leakage signal inversion is disappeared mutually;
Secondly, measured signal load is added to the rf inputs mouth of wherein arbitrary road frequency conversion path, the rf inputs mouth of another road frequency conversion path connects reference load;
Again, in connection reference load Na mono-tunnel frequency conversion path, controllable phase shifter and controllable attenuator is increased;
Finally, regulate the numerical value of controllable phase shifter and controllable attenuator to draw with compensating load by programmable logic device (PLD), realize the suppression of zero-frequency glitch.
Alternatively, described controllable phase shifter and controllable attenuator adopt analog or digital integrated device.
The invention has the beneficial effects as follows:
Effectively can be suppressed zero-frequency glitch in the load-carrying situation of rf inputs mouth of superhet testing tool by circuit of the present invention and method, obtain traditional unapproachable effect of method of carrying out zero-frequency suppression only by amplitude modulation and phase modulation.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the frequency converter topological circuit structural drawing of up-conversion path;
Fig. 2 is of the present invention pair of frequency conversion path topology diagram;
Fig. 3 is of the present invention pair of frequency conversion path loading principle schematic diagram;
Fig. 4 increases the circuit structure diagram of controllable phase shifter and controllable attenuator for circuit shown in Fig. 3;
Fig. 5 is the circuit structure diagram being regulated controllable phase shifter and controllable attenuator by programmable logic device (PLD);
Fig. 6 is the electrical block diagram of the present invention's specific embodiment.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
The present invention proposes a kind of superheterodyne signal receiving and analyzing instrument zero-frequency suppress circuit and method, drawn by compensating load and effectively improve superheterodyne signal receiving and analyzing instrument zero-frequency suppress.Two frequency conversion topological structures that the present invention adopts phase place contrary, are realized local oscillator leakage signal inversion and disappear mutually, and drawn with compensating load by amplitude and phase-modulation, final effectively suppression zero-frequency glitch.
Below in conjunction with accompanying drawing, circuit of the present invention and method are described in detail.
Zero-frequency glitch mainly because up-conversion path frequency converter local oscillator-intermediate frequency port isolation is limited and produce, for this reason, frequency converter often adopts balanced structure, the two balance converter of such as typical diode.In the two balance converter of diode, local oscillation signal drives the turn-on and turn-off of diode, and when wherein a road diode is switched on, frequency converter can describe by the topological circuit structure shown in Fig. 1.
In Fig. 1, U1 ~ U4 is each reference point voltage, and Uz is diode both end voltage, and I1 ~ I3 is each branch current, and N1, N2 are transformer voltage no-load voltage ratio, Z
lo, Z
rF, Z
iFbe respectively the loaded impedance of local oscillator input port, rf inputs mouth and medium frequency output end mouth.Following relational expression can be derived according to kirchhoff Circuit theory and volt-ampere of characteristic diode:
U2=N1 × U1 (formula 1)
U4=N2 × U3 (formula 2)
U3=U2-Uz-I2 × Z
rF(formula 3)
I2=Is × e
uz/Ut(formula 4)
Formula 4 obtains under the condition of Uz much larger than Ut (local oscillation signal voltage is often very large, so this condition meets), and in formula, Is is diode reverse saturation current, the temperature voltage equivalent (Ut ≈ 26mV) when Ut is diode normal temperature.Formula 1, formula 3 and formula 4 are substituted into formula 2 respectively and arrange to obtain following formula:
U4=N2 × N1 × U1-N2 × Uz-N2 × Is × e
uz/Ut× Z
rF(formula 5)
Formula 5 represents the transformational relation of local oscillator input port voltage U 1 to medium frequency output end mouth voltage U 4, also represents the leak degree of local oscillation signal to medium frequency output end mouth simultaneously.
From formula 5, medium frequency output end mouth voltage U 4 is not only relevant with local oscillator input port voltage U 1, but also with rf inputs mouth loaded impedance Z
rFrelevant, so zero-frequency glitch will be eliminated, local oscillation signal to be suppressed to the leakage of medium frequency output end mouth on the one hand, rf inputs mouth loaded impedance Z will be compensated on the other hand
rFto the deterioration that zero-frequency glitch causes.
So mentality of designing of the present invention is, on the one hand, the two frequency conversion topological structures becoming phase place contrary the up-conversion via design of superheterodyne signal receiving and analyzing instrument, can be undertaken local oscillator leakage signal anti-phasely disappearing mutually like this; On the other hand, the rf inputs mouth of frequency conversion path adds measured signal load on the way wherein, and another road up-conversion path increasing degree and phase-modulation circuit, like this by carrying out amplitude to local oscillator leakage signal and phase-modulation draws with compensating load, finally effectively suppress zero-frequency glitch.
Superheterodyne signal receiving and analyzing instrument zero-frequency of the present invention suppresses the specific implementation of circuit, as shown in Figure 2, adopt two frequency conversion path topological structure, and two frequency converters are just the same, local oscillator input signals is added in two frequency conversion paths through 90 degree of power splitters respectively, two-way IF output signal is superimposed as a road through 90 degree of power splitters again, and local oscillator leakage signal inversion is disappeared mutually.
Next, as shown in Figure 3, measured signal load is added to the rf inputs mouth of wherein arbitrary road frequency conversion path, the rf inputs mouth of another road frequency conversion path connects reference load (such as typical 50 ohm load).
Then, as shown in Figure 4, in connection reference load Na mono-tunnel frequency conversion path, controllable phase shifter and controllable attenuator is increased, wherein controllable phase shifter and the general analog or digital integrated device of controllable attenuator.
Finally, as shown in Figure 5, the numerical value of controllable phase shifter and controllable attenuator is regulated to draw with compensating load by programmable logic device, realize the suppression of zero-frequency glitch, embodiment shown in Fig. 5 is for digital controllable phase shifter and controllable attenuator, if adopt analog device, need first with general digital/analog device, the domination number of programmable logic device (PLD) to be converted to analog voltage, then implement to control by analog voltage.
According to the circuit shown in above-mentioned Fig. 2-Fig. 5, present invention also offers a kind of superheterodyne signal receiving and analyzing instrument zero-frequency suppressing method, specific implementation step comprises:
First, adopt two frequency conversion path topological structure, and two frequency converters are just the same, local oscillator input signals is added in two frequency conversion paths through 90 degree of power splitters respectively, two-way IF output signal is superimposed as a road through 90 degree of power splitters again, and local oscillator leakage signal inversion is disappeared mutually;
Secondly, measured signal load is added to the rf inputs mouth of wherein arbitrary road frequency conversion path, the rf inputs mouth of another road frequency conversion path connects reference load (such as typical 50 ohm load);
Again, in connection reference load Na mono-tunnel frequency conversion path, controllable phase shifter and controllable attenuator is increased, wherein controllable phase shifter and the general analog or digital integrated device of controllable attenuator;
Finally, regulate the numerical value of controllable phase shifter and controllable attenuator to draw with compensating load by programmable logic device, realize the suppression of zero-frequency glitch.
In order to illustrate in greater detail technical scheme of the present invention, provide a specific embodiment below, as shown in Figure 6.
In certain model superheterodyne signal receiving and analyzing instrument, upconverter local oscillator swept frequency range is 3GHz ~ 3.5GHz, and IF-FRE is 3GHz, radio-frequency input signals frequency range DC ~ 500MHz, and the typical port impedance in radio-frequency input signals source is 50 ohm.
Frequency converter adopts two balance diode converters of a frequency coverage 2.8GHz ~ 5GHz of Mini-circuits company, and local oscillation power is+10dBm, and when 3GHz, local oscillator-intermediate frequency port isolation is 24dB; 90 degree of power splitters adopt 90 degree of power splitters of a frequency coverage 2.5 ~ 3.4GHz of Mini-circuits company; Programmable logic device (PLD) adopts the CPLD device of the MAXII family of altera corp; Controllable phase shifter adopts a 6 digital phase shifters of ADI company, can spend from 5.625 degree of phase shifts to 360; Controllable attenuator adopts a 6 numerical-control attenuators of ADI company, can step to 31.5dB from 0.5dB.
As shown in Figure 6, when local oscillation signal frequency is 3GHz, power is+10dBm, be leaked to the signal amplitude of intermediate-frequency channel by frequency converter for-14dBm (=local oscillation power-interport isolation).Suppose that the local oscillation signal leakage amplitude that load balance factor causes reduces Δ dB, phase offset Φ degree, then by regulating controllable phase shifter to dephase Φ degree, regulate controllable attenuator to make damping capacity be Δ dB.After adjustment, the amplitude of the local oscillator leakage signal of two-way up-conversion path is identical with phase place, then cancels out each other through former and later two 90 degree of power splitters, thus inhibits zero-frequency glitch.
It should be noted that, if reference load and measured signal load consistance good, the local oscillation signal that load balance factor causes reveals amplitude and phase place change is often very little, so very little to the controlled quentity controlled variable of controllable phase shifter and controllable attenuator applying, if zero-frequency suppresses index request not to be very high, then controllable phase shifter and controllable attenuator can be removed, and become shown in Fig. 3, thus simplify circuit.
The superheterodyne signal receiving and analyzing instrument zero-frequency that the present invention proposes suppresses circuit and method, is drawn and improve zero-frequency suppression by compensating load, connects loading condition when can take into full account actual use, more effectively can improve zero-frequency and suppress.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. superheterodyne signal receiving and analyzing instrument zero-frequency suppresses a circuit, it is characterized in that, the up-conversion via design of superheterodyne signal receiving and analyzing instrument is become two frequency conversion path topological structures that phase place is contrary, is carried out by local oscillator leakage signal anti-phasely disappearing mutually; The rf inputs mouth of frequency conversion path adds measured signal load on the way wherein, and another road up-conversion path increasing degree and phase-modulation circuit, by carrying out amplitude to local oscillator leakage signal and phase-modulation draws with compensating load.
2. superheterodyne signal receiving and analyzing instrument zero-frequency as claimed in claim 1 suppresses circuit, it is characterized in that, adopt two frequency conversion path topological structure, two frequency converters are just the same, local oscillator input signals is added in two frequency conversion paths through 90 degree of power splitters respectively, two-way IF output signal is superimposed as a road through 90 degree of power splitters again, and local oscillator leakage signal inversion is disappeared mutually.
3. superheterodyne signal receiving and analyzing instrument zero-frequency as claimed in claim 2 suppresses circuit, it is characterized in that, measured signal load is added to the rf inputs mouth of wherein arbitrary road frequency conversion path, and the rf inputs mouth of another road frequency conversion path connects reference load.
4. superheterodyne signal receiving and analyzing instrument zero-frequency as claimed in claim 3 suppresses circuit, it is characterized in that, in connection reference load Na mono-tunnel frequency conversion path, increase controllable phase shifter and controllable attenuator.
5. superheterodyne signal receiving and analyzing instrument zero-frequency as claimed in claim 4 suppresses circuit, it is characterized in that, described controllable phase shifter and controllable attenuator adopt analog or digital integrated device.
6. superheterodyne signal receiving and analyzing instrument zero-frequency as claimed in claim 4 suppresses circuit, it is characterized in that, regulates the numerical value of controllable phase shifter and controllable attenuator to draw with compensating load, realize the suppression of zero-frequency glitch by programmable logic device (PLD).
7. a superheterodyne signal receiving and analyzing instrument zero-frequency suppressing method, is characterized in that, comprise the following steps:
First, adopt two frequency conversion path topological structure, and two frequency converters are just the same, local oscillator input signals is added in two frequency conversion paths through 90 degree of power splitters respectively, two-way IF output signal is superimposed as a road through 90 degree of power splitters again, and local oscillator leakage signal inversion is disappeared mutually;
Secondly, measured signal load is added to the rf inputs mouth of wherein arbitrary road frequency conversion path, the rf inputs mouth of another road frequency conversion path connects reference load;
Again, in connection reference load Na mono-tunnel frequency conversion path, controllable phase shifter and controllable attenuator is increased;
Finally, regulate the numerical value of controllable phase shifter and controllable attenuator to draw with compensating load by programmable logic device (PLD), realize the suppression of zero-frequency glitch.
8. a kind of superheterodyne signal receiving and analyzing instrument zero-frequency suppressing method as claimed in claim 7, is characterized in that, described controllable phase shifter and controllable attenuator adopt analog or digital integrated device.
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Cited By (1)
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| CN113258947A (en) * | 2021-07-15 | 2021-08-13 | 成都玖锦科技有限公司 | Device and method for reducing false signal amplitude of receiver |
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