CN105207693A - RS485 repeater with pure hardware arbitration function - Google Patents
RS485 repeater with pure hardware arbitration function Download PDFInfo
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- CN105207693A CN105207693A CN201510638600.5A CN201510638600A CN105207693A CN 105207693 A CN105207693 A CN 105207693A CN 201510638600 A CN201510638600 A CN 201510638600A CN 105207693 A CN105207693 A CN 105207693A
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Abstract
The invention discloses an RS485 repeater with a pure hardware arbitration function. The RS485 repeater comprises a first RS485 interface chip U1 and a first wiring terminal J1 which are arranged in a host, a second RS485 interface chip U2 and a second wiring terminal J2 which are arranged on a first slave, a third RS485 interface chip U3 and a third wiring terminal J3 which are arranged on a second slave, a first monostable trigger U4A, a second monostable trigger U5A and a third monostable trigger U5B. When the host is in a transmitting state, the two slaves are automatically switched to be in an output state; when the two slaves are in a transmitting state, the slave to which data arrives earlier enters a transmitting state, the host is switched to be in an output state, and the other slave is locked. Pure hardware is used for arbitration, no programming is needed, the Baud rate range is wide, one input ports and two output ports can achieve mutual independence, on-site wiring is convenient, and the monostable triggers can be repeatedly triggered.
Description
Technical field:
The invention belongs to communication technical field, specifically relate to a kind of RS485 repeater with pure hardware mediation function.
Background technology:
Repeater (RPrepeater) is a kind of device of interconnection network circuit, is usually used in the two-way converting work of physical signalling between two network nodes.Repeater mainly completes the function of physical layer, is responsible for step-by-step transmission of information in the physical layer of two nodes, the copying of settling signal, adjusts and enlarging function, extends the length of network with this.Owing to there is loss, the signal power transmitted on the line can decay gradually, will cause distorted signals when decaying to a certain degree, therefore can cause receiving mistake, and repeater designs for addressing this problem.It completes the docking of physical circuit, amplifies, keep identical with former data to the signal of decay.What generally the two ends of repeater connected is identical media, but some repeaters also can complete the transit working of different media.
RS485 repeater is the data relay communication products of RS-485, can extend the communication distance of RS-485 bus network by relaying, strengthen the number of RS-485 bus network equipment.Existing RS485 repeater is all one enter one and go out, do not need to send arbitration from machine, but entering the two RS485 repeaters gone out for one needs programming to realize to send arbitration from machine, can not realize baud rate self-adapting, and 1 enters two outbound ports and can not accomplish separate, field wiring is inconvenient.
Summary of the invention:
For this reason, technical problem to be solved by this invention be of the prior art one enter the two RS485 repeaters gone out need programming to realize from machine send arbitration, baud rate self-adapting can not be realized, and 1 enters two outbound ports and can not accomplish separate, field wiring is inconvenient, thus proposes a kind of RS485 repeater with pure hardware mediation function.
For achieving the above object, technical scheme of the present invention is as follows:
There is a RS485 repeater for pure hardware mediation function, comprising:
Be arranged on a RS485 interface chip U1 of host side and the first binding post J1, be arranged on first from the 2nd RS485 interface chip U2 of machine end and the second binding post J2, be arranged on second from the 3rd RS485 interface chip U3 of machine end and the 3rd binding post J3, the first monostable flipflop U4A, the second monostable flipflop U5A, the 3rd monostable flipflop U5B.
The side a and b of a described RS485 interface chip U1 connects 3 pin and 4 pin of described first binding post J1 respectively by resistance R1, resistance R2, the R end of a described RS485 interface chip U1 connects the A end of described first monostable flipflop U4A, and the D end of a described RS485 interface chip U1 connects the R end of described 2nd RS485 interface chip U2 and the R end of described 3rd RS485 interface chip U3 respectively by diode D7, diode D8.
The side a and b of described 2nd RS485 interface chip U2 connects 1 pin and 2 pin of described second binding post J2 respectively by resistance R3, resistance R4, the D end of described 2nd RS485 interface chip U2 connects the R end of a described RS485 interface chip U1 by diode D9.
The side a and b of described 3rd RS485 interface chip U3 connects 1 pin and 2 pin of described 3rd binding post J3 respectively by resistance R5, resistance R6, the D end of described 3rd RS485 interface chip U3 connects the R end of a described RS485 interface chip U1 by diode D10.
The B end of described first monostable flipflop U4A is connected power supply with CLR end, the Cext end of described first monostable flipflop U4A and RCext end are connected with the first timing circuit that resistance R29 and electric capacity C6 is formed, the Q end of described first monostable flipflop U4A connects the non-end of RE and the DE end of described 2nd RS485 interface chip U2 by diode D15, the Q end of described first monostable flipflop U4A connects the non-end of RE and the DE end of described 3rd RS485 interface chip U3 by diode D16.
The A end of described second monostable flipflop U5A connects the R end of described 2nd RS485 interface chip U2, the B end of described second monostable flipflop U5A connects the non-end of Q of described first monostable flipflop U4A, the Cext end of described second monostable flipflop U5A and RCext end are connected with the second timing circuit that resistance R32 and electric capacity C9 is formed, the Q end of described second monostable flipflop U5A connects the non-end of RE and the DE end of described 3rd RS485 interface chip U3 by diode D18, the Q end of described second monostable flipflop U5A passes through resistance R39 successively by diode D13, triode Q2, diode D12, triode Q1 connects the non-end of RE and the DE end of a described RS485 interface chip U1, the non-end of Q of described second monostable flipflop U5A connects the CLR end of described 3rd monostable flipflop U5B.
The A end of described 3rd monostable flipflop U5B connects the R end of described 3rd RS485 interface chip U3, the B end of described 3rd monostable flipflop U5B connects the non-end of Q of described first monostable flipflop U4A, the Cext end of described 3rd monostable flipflop U5B and RCext end are connected with the 3rd timing circuit that resistance R33 and electric capacity C10 is formed, the Q end of described 3rd monostable flipflop U5B connects the non-end of RE and the DE end of described 2nd RS485 interface chip U2 by diode D17, the Q end of described 3rd monostable flipflop U5B passes through resistance R39 successively by diode D14, triode Q2, diode D12, triode Q1 connects the non-end of RE and the DE end of a described RS485 interface chip U1, the non-end of Q of described 3rd monostable flipflop U5B connects the CLR end of described second monostable flipflop U5A.
Preferred as technique scheme, is in series with TVS pipe D1 between 3 pin of described first binding post J1 and ground, is in series with TVS pipe D2 between 4 pin of described first binding post J1 and ground; Be in series with TVS pipe D3 between 1 pin of described second binding post J2 and ground, between 2 pin of described second binding post J2 and ground, be in series with TVS pipe D4; Be in series with TVS pipe D5 between 1 pin of described first binding post J3 and ground, between 2 pin of described first binding post J3 and ground, be in series with TVS pipe D6.
Preferred as technique scheme, the timing tW1=0.45 × R29 × C6 of described first monostable flipflop U4A; Timing tW2=0.45 × R32 × the C9 of described second monostable flipflop U5A; Timing tW3=0.45 × R33 × the C10 of described 3rd monostable flipflop U5B.
Preferred as technique scheme, also comprise power circuit, described power circuit adopts that power supply chip 78M05 is a described RS485 interface chip U1, described 2nd RS485 interface chip U2, described 3rd RS485 interface chip U3, described first monostable flipflop U4A, described second monostable flipflop U5A, described 3rd monostable flipflop U5B provide power supply.
Preferred as technique scheme, also comprise indicating circuit, described indicating circuit comprises light-emitting diode L1, light-emitting diode L2, light-emitting diode L3, light-emitting diode L4, light-emitting diode L5, light-emitting diode L6, light-emitting diode L7.
The positive pole of described light-emitting diode L1 connects power supply, and the negative pole of described light-emitting diode L1 connects the D end of a described RS485 interface chip U1 by resistance R22, described light-emitting diode L1 is used to indicate a described RS485 interface chip U1 in transmission data.
The positive pole of described light-emitting diode L2 connects power supply, and the negative pole of described light-emitting diode L2 connects the R end of a described RS485 interface chip U1 by resistance R23, described light-emitting diode L2 is used to indicate a described RS485 interface chip U1 in reception data.
The positive pole of described light-emitting diode L3 connects power supply, and the negative pole of described light-emitting diode L3 connects the D end of described 2nd RS485 interface chip U2 by resistance R24, described light-emitting diode L3 is used to indicate described 2nd RS485 interface chip U2 in transmission data.
The positive pole of described light-emitting diode L4 connects power supply, and the negative pole of described light-emitting diode L4 connects the R end of described 2nd RS485 interface chip U2 by resistance R25, described light-emitting diode L4 is used to indicate described 2nd RS485 interface chip U2 in reception data.
The positive pole of described light-emitting diode L5 connects power supply, and the negative pole of described light-emitting diode L5 connects the D end of described 3rd RS485 interface chip U3 by resistance R26, described light-emitting diode L5 is used to indicate described 3rd RS485 interface chip U3 in transmission data.
The positive pole of described light-emitting diode L6 connects power supply, and the negative pole of described light-emitting diode L6 connects the R end of described 3rd RS485 interface chip U3 by resistance R27, described light-emitting diode L6 is used to indicate described 3rd RS485 interface chip U3 in reception data.
The positive pole of described light-emitting diode L7 connects power supply, and the negative pole of described light-emitting diode L7 is by resistance R36 ground connection, and whether described light-emitting diode L7 is used to indicate power circuit and normally works.
Preferred as technique scheme, a described RS485 interface chip U1, described 2nd RS485 interface chip U2, described 3rd RS485 interface chip U3 all adopt model to be the RS485 interface chip of SN65LBC184D.
Preferred as technique scheme, described first monostable flipflop U4A, described second monostable flipflop U5A, described 3rd monostable flipflop U5B all adopt model be 74HC123 can the monostable flipflop of repeated trigger.
Preferred as technique scheme, described diode D7, described diode D8, described diode D9, described diode D10, described diode D12, described diode D13, described diode D14, described diode D15, described diode D16, described diode D17, described diode D18 all adopt model to be the diode of LL4148.
Beneficial effect of the present invention is: it makes host side by arranging monostable flipflop and mutually switch between transmission state and accepting state from the RS485 interface chip of machine end, when host side sends, two automatically switch to output state from machine end, two when sending from machine end, what first have data to arrive enters transmission state from machine end, host side switches to output state, another locks from machine end, use pure hardware mediation, without the need to programming, baud rate scope is wide, and 1 enters 2 outbound ports and can realize separate, field wiring is convenient, monostable flipflop can repeated trigger, according to RS485 communication baud rate, freely can adjust timing, it is by arranging indicating circuit, achieves and utilizes light-emitting diode to indicate the operating state of RS485 interface chip, intuitive display.
Accompanying drawing illustrates:
The following drawings is only intended to schematically illustrate the present invention and explain, not delimit the scope of the invention.Wherein:
Fig. 1 is a kind of RS485 repeater frame diagram with pure hardware mediation function of one embodiment of the invention;
Fig. 2 is a kind of RS485 repeater circuit figure with pure hardware mediation function of one embodiment of the invention;
Fig. 3 is RS485 interface chip and the monostable flipflop connecting circuit figure of one embodiment of the invention;
Fig. 4 is a RS485 interface chip U1 and the first binding post J1 connecting circuit figure of one embodiment of the invention;
Fig. 5 is the power circuit diagram of one embodiment of the invention;
Fig. 6 is the indicating circuit figure of one embodiment of the invention.
Embodiment:
As shown in Figure 1, Figure 2, Figure 3, Figure 4, the RS485 repeater with pure hardware mediation function of the present invention, framework comprises: power input DC12V-24V, host side a, first are from machine end b, second from machine end c.Specifically comprise: be arranged on a RS485 interface chip U1 of host side and the first binding post J1, be arranged on first from the 2nd RS485 interface chip U2 of machine end and the second binding post J2, be arranged on second from the 3rd RS485 interface chip U3 of machine end and the 3rd binding post J3, the first monostable flipflop U4A, the second monostable flipflop U5A, the 3rd monostable flipflop U5B.A described RS485 interface chip U1, described 2nd RS485 interface chip U2, described 3rd RS485 interface chip U3 all adopt model to be the RS485 interface chip of SN65LBC184D.Described first monostable flipflop U4A, described second monostable flipflop U5A, described 3rd monostable flipflop U5B all adopt model be 74HC123 can the monostable flipflop of repeated trigger.
The side a and b of a described RS485 interface chip U1 connects 3 pin and 4 pin of described first binding post J1 respectively by resistance R1, resistance R2, the R end of a described RS485 interface chip U1 connects the A end of described first monostable flipflop U4A, and the D end of a described RS485 interface chip U1 connects the R end of described 2nd RS485 interface chip U2 and the R end of described 3rd RS485 interface chip U3 respectively by diode D7, diode D8.
The side a and b of described 2nd RS485 interface chip U2 connects 1 pin and 2 pin of described second binding post J2 respectively by resistance R3, resistance R4, the D end of described 2nd RS485 interface chip U2 connects the R end of a described RS485 interface chip U1 by diode D9.
The side a and b of described 3rd RS485 interface chip U3 connects 1 pin and 2 pin of described 3rd binding post J3 respectively by resistance R5, resistance R6, the D end of described 3rd RS485 interface chip U3 connects the R end of a described RS485 interface chip U1 by diode D10.
The B end of described first monostable flipflop U4A is connected power supply with CLR end, the Cext end of described first monostable flipflop U4A and RCext end are connected with the first timing circuit that resistance R29 and electric capacity C6 is formed, the Q end of described first monostable flipflop U4A connects the non-end of RE of described 2nd RS485 interface chip U2 and DE end (i.e. 2 pin of U2 and 3 pin) by diode D15,2 pin of the 2nd RS485 interface chip U2 are for receiving control end, and 3 pin are for sending control end.The Q end of described first monostable flipflop U4A connects the non-end of RE and the DE end of described 3rd RS485 interface chip U3 by diode D16.
The A end of described second monostable flipflop U5A connects the R end of described 2nd RS485 interface chip U2, the B end of described second monostable flipflop U5A connects the non-end of Q of described first monostable flipflop U4A, the Cext end of described second monostable flipflop U5A and RCext end are connected with the second timing circuit that resistance R32 and electric capacity C9 is formed, the Q end of described second monostable flipflop U5A connects the non-end of RE of described 3rd RS485 interface chip U3 and DE end (i.e. 2 pin of U3 and 3 pin) by diode D18, 2 pin of the 3rd RS485 interface chip U3 are for receiving control end, 3 pin are for sending control end.The Q end of described second monostable flipflop U5A connects the non-end of RE and the DE end of a described RS485 interface chip U1 successively by resistance R39, triode Q2, diode D12, triode Q1 by diode D13, the non-end of Q of described second monostable flipflop U5A connects the CLR end of described 3rd monostable flipflop U5B.
The A end of described 3rd monostable flipflop U5B connects the R end of described 3rd RS485 interface chip U3, the B end of described 3rd monostable flipflop U5B connects the non-end of Q of described first monostable flipflop U4A, the Cext end of described 3rd monostable flipflop U5B and RCext end are connected with the 3rd timing circuit that resistance R33 and electric capacity C10 is formed, the Q end of described 3rd monostable flipflop U5B connects the non-end of RE and the DE end of described 2nd RS485 interface chip U2 by diode D17, the Q end of described 3rd monostable flipflop U5B passes through resistance R39 successively by diode D14, triode Q2, diode D12, triode Q1 connects the non-end of RE and the DE end of a described RS485 interface chip U1, the non-end of Q of described 3rd monostable flipflop U5B connects the CLR end of described second monostable flipflop U5A.
Be in series with TVS pipe D1 between 3 pin of described first binding post J1 and ground, between 4 pin of described first binding post J1 and ground, be in series with TVS pipe D2.Be in series with TVS pipe D3 between 1 pin of described second binding post J2 and ground, between 2 pin of described second binding post J2 and ground, be in series with TVS pipe D4.Be in series with TVS pipe D5 between 1 pin of described first binding post J3 and ground, between 2 pin of described first binding post J3 and ground, be in series with TVS pipe D6.Described TVS pipe D1, described TVS pipe D2, described TVS pipe D3, described TVS pipe D4, described TVS pipe D5, described TVS pipe D6 all adopt model to be the TVS pipe of SMBJ6.0CA.By series connection TVS pipe, a described RS485 interface chip U1, described 2nd RS485 interface chip U2, described 3rd RS485 interface chip U3 and RS485 bus communication chip is protected not to be punctured chip by the forward and reverse high-voltage great-current of circuit.
Timing tW1=0.45 × R29 × the C6 of described first monostable flipflop U4A.Timing tW2=0.45 × R32 × the C9 of described second monostable flipflop U5A.Timing tW3=0.45 × R33 × the C10 of described 3rd monostable flipflop U5B.Described resistance R29, electric capacity C6, resistance R32, electric capacity C9, resistance R33, electric capacity C10, according to RS485 communication baud rate, freely can adjust timing, and bus release time=last frame data start timing after distributing.
Also comprise power circuit, as shown in Figure 5, described power circuit adopts inner all devices such as power supply chip 78M05 is a described RS485 interface chip U1, described 2nd RS485 interface chip U2, described 3rd RS485 interface chip U3, described first monostable flipflop U4A, described second monostable flipflop U5A, described 3rd monostable flipflop U5B to provide power supply.
Also comprise indicating circuit, as shown in Figure 6, described indicating circuit comprises light-emitting diode L1, light-emitting diode L2, light-emitting diode L3, light-emitting diode L4, light-emitting diode L5, light-emitting diode L6, light-emitting diode L7.Above-mentioned light-emitting diode can glimmer when the port of correspondence has data transmit-receive.
The positive pole of described light-emitting diode L1 connects power supply, and the negative pole of described light-emitting diode L1 connects the D end of a described RS485 interface chip U1 by resistance R22, described light-emitting diode L1 is used to indicate a described RS485 interface chip U1 in transmission data.
The positive pole of described light-emitting diode L2 connects power supply, and the negative pole of described light-emitting diode L2 connects the R end of a described RS485 interface chip U1 by resistance R23, described light-emitting diode L2 is used to indicate a described RS485 interface chip U1 in reception data.
The positive pole of described light-emitting diode L3 connects power supply, and the negative pole of described light-emitting diode L3 connects the D end of described 2nd RS485 interface chip U2 by resistance R24, described light-emitting diode L3 is used to indicate described 2nd RS485 interface chip U2 in transmission data.
The positive pole of described light-emitting diode L4 connects power supply, and the negative pole of described light-emitting diode L4 connects the R end of described 2nd RS485 interface chip U2 by resistance R25, described light-emitting diode L4 is used to indicate described 2nd RS485 interface chip U2 in reception data.
The positive pole of described light-emitting diode L5 connects power supply, and the negative pole of described light-emitting diode L5 connects the D end of described 3rd RS485 interface chip U3 by resistance R26, described light-emitting diode L5 is used to indicate described 3rd RS485 interface chip U3 in transmission data.
The positive pole of described light-emitting diode L6 connects power supply, and the negative pole of described light-emitting diode L6 connects the R end of described 3rd RS485 interface chip U3 by resistance R27, described light-emitting diode L6 is used to indicate described 3rd RS485 interface chip U3 in reception data.
The positive pole of described light-emitting diode L7 connects power supply, and the negative pole of described light-emitting diode L7 is by resistance R36 ground connection, and whether described light-emitting diode L7 is used to indicate power circuit and normally works.
Described diode D7, described diode D8, described diode D9, described diode D10, described diode D12, described diode D13, described diode D14, described diode D15, described diode D16, described diode D17, described diode D18 all adopt model to be the diode of LL4148.
RS485 repeater operation principle in the present embodiment is as follows:
1) power-up state:
Host side, first is all operated in accepting state from machine end, second from machine end, makes bus be in idle condition.
2) host side send → is received from machine termination:
Host side sends initial signal, first becomes output state with second from machine end force handoff from machine end, and after host side sends last frame ED, first exits sending mode from machine end and second from machine end, switch to accepting state, make bus be in idle condition.
3) receive from machine end transmission → host side:
When first sends information to host side from machine end and second from machine end simultaneously, if second first arrives repeater chips end than first from machine end from machine end, second is transmission state from machine end, host side is made to switch to transmission state, described first from the locking of machine end, and 3 port statuss lock mutually, until second distributes from machine end last frame, described host side, first is operated in accepting state from machine end, second again from machine end, makes bus be in idle condition.
The circuit analysis of the RS485 repeater in the present embodiment is as follows:
1) host side send → is received from machine termination:
After one RS485 interface chip U1 of host side receives signal by the first binding post J1, the R of a described RS485 interface chip U1 is utilized to hold (i.e. 1 pin of U1) to control A end (i.e. 1 pin of U4A) of described first monostable flipflop U4A, the Q of described first monostable flipflop U4A is made to hold (i.e. 13 pin of U4A) to export high level, the non-end of Q (i.e. 4 pin of the U4A) output low level of described first monostable flipflop U4A.The Q end of described first monostable flipflop U4A controls the non-end of RE and DE end (the i.e. transmitting-receiving control pin of U2 of described 2nd RS485 interface chip U2 through diode D15,2 pin and 3 pin), the Q end of described first monostable flipflop U4A controls the non-end of RE and DE end (i.e. the transmitting-receiving control pin of U3,2 pin and 3 pin) of described 3rd RS485 interface chip U3 through diode D16.Meanwhile, the non-end of Q of described first monostable flipflop U4A controls B end (i.e. triggering pin 2 pin of U5A) of described second monostable flipflop U5A, makes the Q of the second monostable flipflop U5A hold (i.e. 13 pin of U5A) to export high level.The non-end of Q of described first monostable flipflop U4A controls B end (i.e. triggering pin 10 pin of U5B) of described 3rd monostable flipflop U5B, makes the Q of the 3rd monostable flipflop U5B hold (i.e. 5 pin of U5B) to export high level.Thus ensure that described 2nd RS485 interface chip U2 and described 3rd RS485 interface chip U3 is operated in transmission state.Logic locks mutually, improves antijamming capability, improves data transmit-receive stability.
After the last frame data on a described RS485 interface chip U1 send, according to the resistance R29 on the first monostable flipflop U4A, electric capacity C6, resistance R33 on resistance R32 on second monostable flipflop U5A, electric capacity C9, the 3rd monostable flipflop U5B, the timing of electric capacity C10, to being first all switch to accepting state from machine end and second from machine end later, bus is discharged, is in idle condition.
2) first send → host side reception (hardware mediation) from machine end and second from machine end simultaneously:
Second first receives data from the 3rd RS485 interface chip U3 of machine end, make the Q of the 3rd monostable flipflop U5B hold (i.e. 5 pin of U5B) to export high level, make the non-end of Q (i.e. 12 pin of the U5B) output low level of the 3rd monostable flipflop U5B.High level one tunnel of the Q end of the 3rd monostable flipflop U5B controls the non-end of RE and DE end (the i.e. transmitting-receiving control pin of U2 of the 2nd RS485 interface chip U2 through diode D17,2 pin and 3 pin) be high level, the 2nd RS485 interface chip U2 is closed.Another road of high level of the Q end of the 3rd monostable flipflop U5B controls triode Q2 conducting through diode D14, triode Q1 ends, thus control the non-end of RE and DE end (the i.e. transmitting-receiving control pin of U1 of a RS485 interface chip U1,2 pin and 3 pin) be high level, make a RS485 interface chip U1 be operated in transmission state (namely second sending data from machine end to host side).CLR end (i.e. resetting pin 3 pin of U5A) of the low level control second monostable flipflop U5A of the non-end of Q (i.e. 12 pin of U5B) of the 3rd monostable flipflop U5B, make the Q of the second monostable flipflop U5A hold (i.e. 13 pin of U5A) output low level, make the non-end of Q of the second monostable flipflop U5A (i.e. 4 pin of U5A) export high level.Guarantee can only send data by the second RS485 interface chip U1 from from the 3rd RS485 interface chip U3 of machine end to host side, and described first does not participate in from the 2nd RS485 interface chip of machine end.
From inside modules, ensure clump machine end only have one and host port together with, idle clump machine end can not send data as host side, until exit transmission state what send from machine end, each logic state inner is mutual locking, can only be host side <-> first from machine end or host side <-> second from machine end at every turn.
A kind of RS485 repeater with pure hardware mediation function described in the present embodiment, comprising: be arranged on a RS485 interface chip U1 of host side and the first binding post J1, be arranged on first from the 2nd RS485 interface chip U2 of machine end and the second binding post J2, be arranged on second from the 3rd RS485 interface chip U3 of machine end and the 3rd binding post J3, the first monostable flipflop U4A, the second monostable flipflop U5A, the 3rd monostable flipflop U5B.It makes host side by arranging monostable flipflop and mutually switches between transmission state and accepting state from the RS485 interface chip of machine end, when host side sends, two automatically switch to output state from machine end, two when sending from machine end, what first have data to arrive enters transmission state from machine end, host side switches to output state, another locks from machine end, use pure hardware mediation, without the need to programming, baud rate scope is wide, and 1 enters 2 outbound ports and can realize separate, field wiring is convenient, monostable flipflop can repeated trigger, according to RS485 communication baud rate, freely can adjust timing.
Obviously, above-described embodiment is only for clearly example being described, and the restriction not to execution mode.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without the need to also giving all execution modes.And thus the apparent change of extending out or variation be still among the protection range of the invention.
Claims (8)
1. there is a RS485 repeater for pure hardware mediation function, it is characterized in that, comprising:
Be arranged on a RS485 interface chip U1 of host side and the first binding post J1, be arranged on first from the 2nd RS485 interface chip U2 of machine end and the second binding post J2, be arranged on second from the 3rd RS485 interface chip U3 of machine end and the 3rd binding post J3, the first monostable flipflop U4A, the second monostable flipflop U5A, the 3rd monostable flipflop U5B;
The side a and b of a described RS485 interface chip U1 connects 3 pin and 4 pin of described first binding post J1 respectively by resistance R1, resistance R2, the R end of a described RS485 interface chip U1 connects the A end of described first monostable flipflop U4A, and the D end of a described RS485 interface chip U1 connects the R end of described 2nd RS485 interface chip U2 and the R end of described 3rd RS485 interface chip U3 respectively by diode D7, diode D8;
The side a and b of described 2nd RS485 interface chip U2 connects 1 pin and 2 pin of described second binding post J2 respectively by resistance R3, resistance R4, the D end of described 2nd RS485 interface chip U2 connects the R end of a described RS485 interface chip U1 by diode D9;
The side a and b of described 3rd RS485 interface chip U3 connects 1 pin and 2 pin of described 3rd binding post J3 respectively by resistance R5, resistance R6, the D end of described 3rd RS485 interface chip U3 connects the R end of a described RS485 interface chip U1 by diode D10;
The B end of described first monostable flipflop U4A is connected power supply with CLR end, the Cext end of described first monostable flipflop U4A and RCext end are connected with the first timing circuit that resistance R29 and electric capacity C6 is formed, the Q end of described first monostable flipflop U4A connects the non-end of RE and the DE end of described 2nd RS485 interface chip U2 by diode D15, the Q end of described first monostable flipflop U4A connects the non-end of RE and the DE end of described 3rd RS485 interface chip U3 by diode D16;
The A end of described second monostable flipflop U5A connects the R end of described 2nd RS485 interface chip U2, the B end of described second monostable flipflop U5A connects the non-end of Q of described first monostable flipflop U4A, the Cext end of described second monostable flipflop U5A and RCext end are connected with the second timing circuit that resistance R32 and electric capacity C9 is formed, the Q end of described second monostable flipflop U5A connects the non-end of RE and the DE end of described 3rd RS485 interface chip U3 by diode D18, the Q end of described second monostable flipflop U5A passes through resistance R39 successively by diode D13, triode Q2, diode D12, triode Q1 connects the non-end of RE and the DE end of a described RS485 interface chip U1, the non-end of Q of described second monostable flipflop U5A connects the CLR end of described 3rd monostable flipflop U5B,
The A end of described 3rd monostable flipflop U5B connects the R end of described 3rd RS485 interface chip U3, the B end of described 3rd monostable flipflop U5B connects the non-end of Q of described first monostable flipflop U4A, the Cext end of described 3rd monostable flipflop U5B and RCext end are connected with the 3rd timing circuit that resistance R33 and electric capacity C10 is formed, the Q end of described 3rd monostable flipflop U5B connects the non-end of RE and the DE end of described 2nd RS485 interface chip U2 by diode D17, the Q end of described 3rd monostable flipflop U5B passes through resistance R39 successively by diode D14, triode Q2, diode D12, triode Q1 connects the non-end of RE and the DE end of a described RS485 interface chip U1, the non-end of Q of described 3rd monostable flipflop U5B connects the CLR end of described second monostable flipflop U5A.
2. the RS485 repeater with pure hardware mediation function according to claim 1, is characterized in that:
Be in series with TVS pipe D1 between 3 pin of described first binding post J1 and ground, between 4 pin of described first binding post J1 and ground, be in series with TVS pipe D2;
Be in series with TVS pipe D3 between 1 pin of described second binding post J2 and ground, between 2 pin of described second binding post J2 and ground, be in series with TVS pipe D4;
Be in series with TVS pipe D5 between 1 pin of described first binding post J3 and ground, between 2 pin of described first binding post J3 and ground, be in series with TVS pipe D6.
3. the RS485 repeater with pure hardware mediation function according to claim 1, is characterized in that:
Timing tW1=0.45 × R29 × the C6 of described first monostable flipflop U4A;
Timing tW2=0.45 × R32 × the C9 of described second monostable flipflop U5A;
Timing tW3=0.45 × R33 × the C10 of described 3rd monostable flipflop U5B.
4. the RS485 repeater with pure hardware mediation function according to claim 1, is characterized in that:
Also comprise power circuit, described power circuit adopts that power supply chip 78M05 is a described RS485 interface chip U1, described 2nd RS485 interface chip U2, described 3rd RS485 interface chip U3, described first monostable flipflop U4A, described second monostable flipflop U5A, described 3rd monostable flipflop U5B provide power supply.
5. the RS485 repeater with pure hardware mediation function according to claim 1, is characterized in that:
Also comprise indicating circuit, described indicating circuit comprises light-emitting diode L1, light-emitting diode L2, light-emitting diode L3, light-emitting diode L4, light-emitting diode L5, light-emitting diode L6, light-emitting diode L7;
The positive pole of described light-emitting diode L1 connects power supply, and the negative pole of described light-emitting diode L1 connects the D end of a described RS485 interface chip U1 by resistance R22, described light-emitting diode L1 is used to indicate a described RS485 interface chip U1 in transmission data;
The positive pole of described light-emitting diode L2 connects power supply, and the negative pole of described light-emitting diode L2 connects the R end of a described RS485 interface chip U1 by resistance R23, described light-emitting diode L2 is used to indicate a described RS485 interface chip U1 in reception data;
The positive pole of described light-emitting diode L3 connects power supply, and the negative pole of described light-emitting diode L3 connects the D end of described 2nd RS485 interface chip U2 by resistance R24, described light-emitting diode L3 is used to indicate described 2nd RS485 interface chip U2 in transmission data;
The positive pole of described light-emitting diode L4 connects power supply, and the negative pole of described light-emitting diode L4 connects the R end of described 2nd RS485 interface chip U2 by resistance R25, described light-emitting diode L4 is used to indicate described 2nd RS485 interface chip U2 in reception data;
The positive pole of described light-emitting diode L5 connects power supply, and the negative pole of described light-emitting diode L5 connects the D end of described 3rd RS485 interface chip U3 by resistance R26, described light-emitting diode L5 is used to indicate described 3rd RS485 interface chip U3 in transmission data;
The positive pole of described light-emitting diode L6 connects power supply, and the negative pole of described light-emitting diode L6 connects the R end of described 3rd RS485 interface chip U3 by resistance R27, described light-emitting diode L6 is used to indicate described 3rd RS485 interface chip U3 in reception data;
The positive pole of described light-emitting diode L7 connects power supply, and the negative pole of described light-emitting diode L7 is by resistance R36 ground connection, and whether described light-emitting diode L7 is used to indicate power circuit and normally works.
6. the RS485 repeater with pure hardware mediation function according to claim 1, is characterized in that:
A described RS485 interface chip U1, described 2nd RS485 interface chip U2, described 3rd RS485 interface chip U3 all adopt model to be the RS485 interface chip of SN65LBC184D.
7. the RS485 repeater with pure hardware mediation function according to claim 1, is characterized in that:
Described first monostable flipflop U4A, described second monostable flipflop U5A, described 3rd monostable flipflop U5B all adopt model be 74HC123 can the monostable flipflop of repeated trigger.
8. the RS485 repeater with pure hardware mediation function according to claim 1, is characterized in that:
Described diode D7, described diode D8, described diode D9, described diode D10, described diode D12, described diode D13, described diode D14, described diode D15, described diode D16, described diode D17, described diode D18 all adopt model to be the diode of LL4148.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111274194A (en) * | 2018-12-05 | 2020-06-12 | 锐迪科（重庆）微电子科技有限公司 | Data processing apparatus and control method thereof |
| CN114650077A (en) * | 2020-12-17 | 2022-06-21 | 航天科工惯性技术有限公司 | Communication circuit of transmitting-receiving self-control RS485 interface |
| CN117579440A (en) * | 2024-01-17 | 2024-02-20 | 杭州罗莱迪思科技股份有限公司 | RS485 relay circuit with arbitration mechanism |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2697963Y (en) * | 2004-04-27 | 2005-05-04 | 深圳市迪艾华科贸有限公司 | Semi-duplex Rs485 series communication relay branch device |
| KR20100111946A (en) * | 2009-04-08 | 2010-10-18 | 주식회사 나라컨트롤 | The data-transmittable non-polarity rs-485 communication device of bms controller by automatic polarity discrimination |
| CN102064872A (en) * | 2010-12-29 | 2011-05-18 | 长沙威胜信息技术有限公司 | GPRS signal relay for electric energy acquisition terminal |
| CN102184153A (en) * | 2011-04-01 | 2011-09-14 | 山东泰开自动化有限公司 | RS-485 transmitting-receiving automatic conversion circuit |
| CN201974676U (en) * | 2010-12-24 | 2011-09-14 | 上海自动化仪表股份有限公司 | 485 repeater |
| CN102752194A (en) * | 2012-06-12 | 2012-10-24 | 黄程云 | Frame structure-based forwarding method and RS-485 bus hub |
-
2015
- 2015-09-30 CN CN201510638600.5A patent/CN105207693B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2697963Y (en) * | 2004-04-27 | 2005-05-04 | 深圳市迪艾华科贸有限公司 | Semi-duplex Rs485 series communication relay branch device |
| KR20100111946A (en) * | 2009-04-08 | 2010-10-18 | 주식회사 나라컨트롤 | The data-transmittable non-polarity rs-485 communication device of bms controller by automatic polarity discrimination |
| CN201974676U (en) * | 2010-12-24 | 2011-09-14 | 上海自动化仪表股份有限公司 | 485 repeater |
| CN102064872A (en) * | 2010-12-29 | 2011-05-18 | 长沙威胜信息技术有限公司 | GPRS signal relay for electric energy acquisition terminal |
| CN102184153A (en) * | 2011-04-01 | 2011-09-14 | 山东泰开自动化有限公司 | RS-485 transmitting-receiving automatic conversion circuit |
| CN102752194A (en) * | 2012-06-12 | 2012-10-24 | 黄程云 | Frame structure-based forwarding method and RS-485 bus hub |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111274194A (en) * | 2018-12-05 | 2020-06-12 | 锐迪科（重庆）微电子科技有限公司 | Data processing apparatus and control method thereof |
| CN114650077A (en) * | 2020-12-17 | 2022-06-21 | 航天科工惯性技术有限公司 | Communication circuit of transmitting-receiving self-control RS485 interface |
| CN114650077B (en) * | 2020-12-17 | 2023-07-14 | 航天科工惯性技术有限公司 | Communication circuit of receiving and transmitting self-control RS485 interface |
| CN117579440A (en) * | 2024-01-17 | 2024-02-20 | 杭州罗莱迪思科技股份有限公司 | RS485 relay circuit with arbitration mechanism |
| CN117579440B (en) * | 2024-01-17 | 2024-04-09 | 杭州罗莱迪思科技股份有限公司 | RS485 relay circuit with arbitration mechanism |
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