CN105190552B - 执行多个管理程序的系统和方法 - Google Patents

执行多个管理程序的系统和方法 Download PDF

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Publication number
CN105190552B
CN105190552B CN201480011734.8A CN201480011734A CN105190552B CN 105190552 B CN105190552 B CN 105190552B CN 201480011734 A CN201480011734 A CN 201480011734A CN 105190552 B CN105190552 B CN 105190552B
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CN
China
Prior art keywords
hypervisor
hardware processors
memory address
primary
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201480011734.8A
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English (en)
Chinese (zh)
Other versions
CN105190552A (zh
Inventor
埃里希·詹姆士·普罗恩德克
卢齐安·科德雷斯库
克里斯托弗·爱德华·科布
皮尤士·派泰尔
托马斯·安德鲁·萨托里乌斯
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Qualcomm Inc
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Qualcomm Inc
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Publication of CN105190552A publication Critical patent/CN105190552A/zh
Application granted granted Critical
Publication of CN105190552B publication Critical patent/CN105190552B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G06F2212/1021—Hit rate improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15—Use in a specific computing environment
    • G06F2212/151—Emulated environment, e.g. virtual machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/651—Multi-level translation tables
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/656—Address space sharing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Memory System (AREA)
  • Multi Processors (AREA)
  • Stored Programmes (AREA)
CN201480011734.8A 2013-03-14 2014-03-11 执行多个管理程序的系统和方法 Expired - Fee Related CN105190552B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/829,023 US9606818B2 (en) 2013-03-14 2013-03-14 Systems and methods of executing multiple hypervisors using multiple sets of processors
US13/829,023 2013-03-14
PCT/US2014/023445 WO2014159405A1 (en) 2013-03-14 2014-03-11 Systems and methods of executing multiple hypervisors

Publications (2)

Publication Number Publication Date
CN105190552A CN105190552A (zh) 2015-12-23
CN105190552B true CN105190552B (zh) 2018-10-23

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480011734.8A Expired - Fee Related CN105190552B (zh) 2013-03-14 2014-03-11 执行多个管理程序的系统和方法

Country Status (7)

Country Link
US (1) US9606818B2 (enExample)
EP (1) EP2972834B1 (enExample)
JP (1) JP6240745B2 (enExample)
KR (1) KR101812727B1 (enExample)
CN (1) CN105190552B (enExample)
BR (1) BR112015023360A2 (enExample)
WO (1) WO2014159405A1 (enExample)

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TWI540511B (zh) * 2015-04-30 2016-07-01 捷鼎國際股份有限公司 用以存取虛擬機器之電腦系統及方法
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CN106878389B (zh) * 2017-01-04 2020-02-07 北京百度网讯科技有限公司 用于在云系统中进行资源调度的方法和装置
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Also Published As

Publication number Publication date
JP6240745B2 (ja) 2017-11-29
WO2014159405A1 (en) 2014-10-02
EP2972834A1 (en) 2016-01-20
KR101812727B1 (ko) 2017-12-27
EP2972834B1 (en) 2017-05-17
KR20150129816A (ko) 2015-11-20
JP2016529568A (ja) 2016-09-23
US9606818B2 (en) 2017-03-28
US20140282508A1 (en) 2014-09-18
CN105190552A (zh) 2015-12-23
BR112015023360A2 (pt) 2017-07-18

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Granted publication date: 20181023

Termination date: 20210311