CN105120275A - Method for implementing parallel CABAC-R algorithm in intra mode decision - Google Patents

Method for implementing parallel CABAC-R algorithm in intra mode decision Download PDF

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CN105120275A
CN105120275A CN201510438860.8A CN201510438860A CN105120275A CN 105120275 A CN105120275 A CN 105120275A CN 201510438860 A CN201510438860 A CN 201510438860A CN 105120275 A CN105120275 A CN 105120275A
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context model
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cabac
mode decision
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CN105120275B (en
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贾惠柱
蔡斌斌
黄晓峰
严伟
解晓东
杨名远
刘捷
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Peking University
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Abstract

The embodiment of the invention provides a method for implementing a parallel CABAC-R algorithm in an intra mode decision. The method mainly comprises the steps of: determining context models corresponding to coefficients in syntactic elements coeff_abs_level_greater1_flag and/or sig_coeff_flag during the CABAC-R calculating process in the intra mode decision; and processing all bin in pairs contained in the same context model, and executing the all paired bin in the same context model in parallel. The CABAC-R algorithm in the intra mode decision provided by the embodiment of the invention is adopted for processing the two key syntactic elements coeff_abs_level_greater1_flag and/or sig_coeff_flag in parallel, and calculating the bin corresponding to the context model of each group in parallel, thereby greatly increasing the calculation parallelism degree and shortening hardware execution time. A CABAC-R efficient hardware circuit structure provided by the embodiment of the invention can achieve real-time updating of a probability model, and is more accurate in code rate calculation, thereby promoting the encoding performance.

Description

The implementation method of parallel CABAC-R algorithm in intra mode decision
Technical field
The present invention relates to video code flow transmission technique field, particularly relate to the implementation method of CABAC-R in a kind of intra mode decision (Context-basedAdaptiveBinaryArithmeticCodingRateestimatio n, the code check based on context adaptive binary arithmetic coding is estimated).
Background technology
HEVC (HighEfficiencyVideoCoding, high efficiency video code flow) is a kind of new video compression standard, can substitute H.264/AVC coding standard.HEVC is the Video coding compression standard of new generation that JCT-VC (JointCollaborativeTeamonVideoCoding, Video coding combines group) formulates, and its core objective is on basis H.264, compression efficiency is doubled.Namely, under the prerequisite ensureing same video picture quality, video code rate reduces by 50% [1-2].With reference to figure 1, Figure 1 shows that HEVC intra mode decision flow chart.Intra mode decision can be divided into 2 stages, is respectively coarse mode decision-making (RMD, RoughModeDecision) and rate-distortion optimization (RDO, RateDecisionOptimization) mode decision.RMD mode decision refers to selects the most possible candidate pattern of N kind from whole 35 kinds of intra prediction modes, and RDO mode decision obtains optimal frames internal schema and PU/TU/CU block comminute structure [3].
In RDO mode decision, the N kind pattern of preliminary election from RMD all needs through infra-frame prediction, transform and quantization, then the coefficient block after quantizing can carry out processing to obtain distortion D (Distortion) and code check R (Rate) through two different paths: Article 1 path can through binaryzation, then carries out code check according to the context model of correspondence and estimates and obtain R; An other road then obtains reconstructed pixel through inverse quantization and inverse transformation, and then calculates D according to original pixels and reconstructed pixel.When last mode decision, the pattern utilizing formula (1) to select cost minimum is optimization model.
Cost=D+λ·R(1)
Pointed out in the preceding paragraph that D refers to distortion (Distortion), R refers to code check (Rate).From (1), in mode decision process, code check pre-estimating technology has vital effect.Code check R more accurately, can guarantee that the cost calculated is more accurate, thus obtain more excellent coding efficiency.Adopt the code check pre-estimating technology based on CABAC in mode decision process, its behavior is consistent with the coding behavior of entropy code CABAC.First binaryzation is carried out to syntactic element to be encoded, then calculate the code check r of each bin according to the bin value of binaryzation and the context model of correspondence, then corresponding for all bin code check r is carried out the cumulative code check R obtaining whole piece.In CABAC-R, there is data dependency, the source of this data dependency is that the bin be under same context model needs serial more new state successively, brings the raising of mode decision performance like this, but brings challenges to efficient hardware designs.
The data dependency of CABAC-R technology, also can cause the problem that there is critical path in hardware circuit design.Estimate in module at code check, when multiple bin adopts same context model, the state after a upper bin upgrades can be that next bin uses, and causes like this being difficult to do parallel processing when hardware implementing.Carry out flowing water design to RDO mode decision process, critical path appears in rate estimation module.It is long that direct employing CABAC technology can cause estimating the module time of implementation, the throughput of Effect Mode decision-making module.
In order to solve the data dependency problem estimated based on CABAC code check, at present, propose one and have bypassbit algorithm for estimating scheme towards the attainable algorithm of hardware.Rate estimation technology in the program can estimate process through binaryzation and code check.Based on bypass code check pre-estimating technology directly using the bin number after binaryzation as code check R, do not need through rate estimation process as shown in Figure 1, thus the data dependency estimated at code check in process removed.
The shortcoming of above-mentioned bypassbit algorithm for estimating scheme of the prior art is: this algorithm brings the extreme loss of performance, can not meet the requirement of HEVC standard codec to video quality.
For the data dependency problem that code check in CABAC is estimated, prior art also teaches the code check predictor method based on CFBAC.The core concept of the method is: when carrying out the process of intra mode decision in CTU (CodingTreeUnit, code tree unit) inside, the probability of context model does not upgrade.Like this in intra mode decision process, the data dependency based on the code check pre-estimating technology of CABAC is removed completely.In order to compensated part performance, after the optimization model decision-making of a CTU terminates, again travel through whole block based on optimization model in CTU inside, probability updating is passed to next CTU to last state.
With reference to figure 2, Figure 2 shows that CFBAC hardware structure.Because state is fixed, use the probability that all maximum probability symbols (MPS, MostProbableSymbol) of same context type are the same with minimum probability symbol (LPS, LeastProbableSymbol) coding assignment.In JCTVC-G763, for the bin ' 1 ' in same context model and bin ' 0 ', the bit of generation is definite value B1 and B0 respectively.The quantity calculating bin ' 1 ' and bin ' 0 ' is only needed when bit estimates.Computing formula is as follows:
R=∑B0(n)*C0(n)+B1(n)*C1(n)(n∈contexts)(2)
The shortcoming of the above-mentioned code check predictor method based on CFBAC of the prior art is: after final pattern is determined, need to carry out state updating, can increase the processing time of mode decision; In mode decision process, probabilistic model does not upgrade and performance can be caused lower.
Summary of the invention
The embodiment provides the implementation method of parallel CABAC-R algorithm in a kind of intra mode decision, to realize the hardware time of implementation reducing parallel CABAC-R algorithm in intra mode decision.
To achieve these goals, this invention takes following technical scheme.
An implementation method for parallel CABAC-R algorithm in intra mode decision, comprising:
Determine the context model that each bin in syntactic element coeff_abs_level_greater1_flag and/or sig_coeff_flag in intra mode decision in CABAC-R calculating process is corresponding;
The all bin comprised in same context model are processed in pairs, to all paired bin executed in parallel in same context model.
Preferably, the context model that 8 bin in the syntactic element coeff_abs_level_greater1_flag in described determination intra mode decision in CABAC-R calculating process are corresponding, comprising:
In syntactic element coeff_abs_level_greater1_flag 8 bin is divided into 4 groups, and wherein 1-2 bin forms first group, and 3-4 bin forms second group, and 5-6 bin forms the 3rd group, and 7-8 bin forms the 4th group; Distribute identical context model by the bin of two in each group, the context model that the bin of each group distributes is different.
Preferably, described context model comprises context model 1, context model 3, context model 2 and context model 0, corresponding 24 the context model methods of salary distribution of 8 bin in institute syntax elements coeff_abs_level_greater1_flag.
Preferably, described processes in pairs to all bin comprised in same context model, to all paired bin executed in parallel in same context model, comprising:
Bin executed in parallel in the context model not corresponding by described first group, second group, the 3rd group and Four composition, and 1 cycles has upgraded all bin of all context models.
Preferably, described processes in pairs to all bin comprised in same context model, to all paired bin executed in parallel in same context model, comprising:
The each coefficient represented to institute syntax elements sig_coeff_flag distributes a bin respectively, the bin executed in parallel corresponding to various context model;
By all bin in same context model according to scanning direction in pairs, in every a pair bin, first bin arranges the initial input state of this kind of context model, all paired bin executed in parallel in same context model, by the next coefficient sets of state transfer that last upgrades bin, and calculate code check R, and other paired bin only calculates code check R, not more new state.
Preferably, described method also comprises: the bin executed in parallel in all context models, and all bin having been upgraded all context models by 1 cycles.
Preferably, described method also comprises:
In rate estimation in CABACR circuit framework and state updating circuit, multiple three grades of flowing structures are set, two continuous bins in each three grades of same context models of flowing structure process, described two continuous bins comprise bin0 and bin1, multiple tertiary structure executed in parallel;
Preferably, the first order structure in same tertiary structure selects the corresponding state of current bin0, bin1 from the feedback states of input state or second level structure;
Preferably, the state of bin0, bin1 described in the second level topology update in same tertiary structure, and calculate the bits of bin0, to first order structural feedback state updating situation;
Preferably, the bits of the third level Structure Calculation bin1 in same tertiary structure.
The technical scheme provided as can be seen from the embodiment of the invention described above, CABAC-R (Context-basedAdaptiveBinaryArithmeticCodingRateestimatio n in the intra mode decision that the embodiment of the present invention proposes, code check based on context adaptive binary arithmetic coding is estimated) fast algorithm, parallel processing is done to wherein two crucial syntactic element coeff_abs_level_greater1_flag and sig_coeff_flag, thus has decreased the hardware time of implementation.
The aspect that the present invention adds and advantage will part provide in the following description, and these will become obvious from the following description, or be recognized by practice of the present invention.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
A kind of HEVC intra mode decision flow chart that Fig. 1 provides for prior art;
A kind of CFBAC predictive algorithm hardware structure figure that Fig. 2 provides for prior art;
Fig. 3 is that in a kind of parallel CABAC-R algorithm provided by the invention, in a CG, sig_coeff_flag context pattern simplifies citing;
Fig. 4 is a kind of 2/1/0BinsCABAC-R engine hardware flowing water schematic diagram of the present invention provided by the invention;
Fig. 5 is a kind of CABAC-R block architecture diagram provided by the invention.
Embodiment
Be described below in detail embodiments of the present invention, the example of described execution mode is shown in the drawings, and wherein same or similar label represents same or similar element or has element that is identical or similar functions from start to finish.Being exemplary below by the execution mode be described with reference to the drawings, only for explaining the present invention, and can not limitation of the present invention being interpreted as.
Those skilled in the art of the present technique are appreciated that unless expressly stated, and singulative used herein " ", " one ", " described " and " being somebody's turn to do " also can comprise plural form.Should be further understood that, the wording used in specification of the present invention " comprises " and refers to there is described feature, integer, step, operation, element and/or assembly, but does not get rid of and exist or add other features one or more, integer, step, operation, element, assembly and/or their group.Should be appreciated that, when we claim element to be " connected " or " coupling " to another element time, it can be directly connected or coupled to other elements, or also can there is intermediary element.In addition, " connection " used herein or " coupling " can comprise wireless connections or couple.Wording "and/or" used herein comprises one or more arbitrary unit listing item be associated and all combinations.
Those skilled in the art of the present technique are appreciated that unless otherwise defined, and all terms used herein (comprising technical term and scientific terminology) have the meaning identical with the general understanding of the those of ordinary skill in field belonging to the present invention.Should also be understood that those terms defined in such as general dictionary should be understood to have the meaning consistent with the meaning in the context of prior art, unless and define as here, can not explain by idealized or too formal implication.
For ease of the understanding to the embodiment of the present invention, be further explained explanation below in conjunction with accompanying drawing for several specific embodiment, and each embodiment does not form the restriction to the embodiment of the present invention.
Embodiment one
The embodiment of the present invention adopts CABAC-R to estimate in HM software reference code can improve code efficiency, but the context model renewal existed in CABAC-R can produce the problem that hardware throughput reduces.For head it off, the embodiment of the present invention, in original CABAC-R technical foundation, algorithm and framework is optimized:
1.CABACR fast algorithm
Compared with other syntactic elements, there is bottleneck when CABACR estimates design in syntactic element coeff_abs_level_greater1_flag and sig_coeff_flag.The embodiment of the present invention proposes a kind of fast algorithm and solves this two dependent problems of syntactic element context model.
In HEVC coding, a coefficient sets (CG, CoefficientGroup) has 8 coeff_abs_level_greater1_flags can encode [6] at normal mode at the most.As shown in table 1, the context model of syntactic element coeff_abs_level_greater1_flag is selected to depend on coefficient positions larger than 1 in hangover coefficient and CG.As shown in table 2 is the context model distribution that coeff_abs_level_greater1_flag8 kind is different.In the prior art, often kind of context model is divided and is planted, and being in bin under same context model must serial more new state successively, and this just hinders hardware realizability.As row second from the bottom in table 2,5 bin are had to share context model 3.If a circulation (cycle) processes 2 bin, need 3 cycle.
Table 1coeff_abs_level_greater1_flags context model is selected
The embodiment of the present invention, for addressing this problem, proposes one in Table 1 based on the changeless context model of coefficient positions.
In syntactic element coeff_abs_level_greater1_flag 8 bin is divided into 4 groups, and wherein 1-2 bin forms first group, and 3-4 bin forms second group, and 5-6 bin forms the 3rd group, and 7-8 bin forms the 4th group.Then, distribute identical context model by the bin of two in first group, the context model that the bin of each group distributes is different.
Described context model comprises context model 1, context model 3, context model 2 and context model 0, and 8 bin in institute syntax elements coeff_abs_level_greater1_flag are corresponding to 24 context model methods of salary distribution.
When distributing context model 1 by the bin of two in first group, 6 following context model methods of salary distribution can be obtained:
Distribute context model 1 by the bin of two in first group, distribute context model 2 by two bin in every two groups, distribute context model 3 by two bin in every three groups, distribute context model 0 by two bin in every four groups;
Or,
Distribute context model 1 by the bin of two in first group, distribute context model 2 by two bin in every two groups, distribute context model 0 by two bin in every three groups, distribute context model 3 by two bin in every four groups;
Or;
Distribute context model 1 by the bin of two in first group, distribute context model 3 by two bin in every two groups, distribute context model 2 by two bin in every three groups, distribute context model 0 by two bin in every four groups;
Or;
Distribute context model 1 by the bin of two in first group, distribute context model 3 by two bin in every two groups, distribute context model 0 by two bin in every three groups, distribute context model 2 by two bin in every four groups;
Or;
Distribute context model 1 by the bin of two in first group, distribute context model 0 by two bin in every two groups, distribute context model 2 by two bin in every three groups, distribute context model 3 by two bin in every four groups;
Or;
Distribute context model 1 by the bin of two in first group, distribute context model 0 by two bin in every two groups, distribute context model 3 by two bin in every three groups, distribute context model 2 by two bin in every four groups;
In like manner, when distributing context model 2,3 and 0 by the bin of two in first group, also 6 context model methods of salary distribution can be obtained respectively.
A bin is distributed respectively, the bin executed in parallel corresponding to context model of 4 groups to the context model that each bin of syntactic element coeff_abs_level_greater1_flag is corresponding.
In embodiments of the present invention, exemplary, pattern 1 is assigned to the first two bins, model 2,3,0 is assigned to remaining bins respectively.In this theory, a context model distributes at most 2 bins.Under this design, context model distribution is as shown in table 2 last column, and choosing of context model is only relevant with bin position.
The distribution of table 2coeff_abs_level_greater1_flags context model
Corresponding respectively two bins of pattern 1,2,3 and 0, owing to not having dependence mutually, can distinguish executed in parallel.Due to, 1 cycle can process 2 bin, therefore, and the method for the application embodiment of the present invention, in the context model of syntactic element coeff_abs_level_greater1_flag 8 bin can all process by 1 cycle, has greatly saved the processing time.
Syntactic element sig_coeff_flag represents whether the value of first coefficient in a CG is 0.It is that to equal 1 expression coefficient value be not 0 to 0, sig_coeff_flag that sig_coeff_flag equals 0 expression coefficient value.The feature of the coefficient positions of current C G and adjacent the right, following CG is depended in the selection of context model.Have 16 coefficient positions in a CG, respectively corresponding 16 bin, these 16 bin can by identical or different context models.In the prior art, 16 bin serials perform, if the throughput of CABAC is 2bins/cycle, altogether need at most 8 cycle.
In embodiments of the present invention, each coefficient represented to syntactic element sig_coeff_flag distributes a bin respectively, the bin executed in parallel corresponding to various context model.By all bin in same context model according to scanning direction in pairs, in every a pair bin, first bin arranges the initial input state of this kind of context model, all paired bin executed in parallel in same context model, by the next coefficient sets of state transfer that last upgrades bin, and calculate code check R, and other paired bin only calculates code check R, not more new state.
Bin executed in parallel in all context models, and all bin having been upgraded all context models by 1 cycles.
In order to improve throughput, propose fast context adaptive algorithm.In fast algorithm, same context model is only that the bins that latter two sig_coeff_flag coefficient of being under this model by current C G is corresponding upgrades context model state, and is delivered to next CG.Under this model, remaining bins then only adopts the input state of current C G to process in pairs to estimate code check above, does not upgrade context model state.
With reference to shown in figure 3, Fig. 3 being the example that a sig_coeff_flag context model simplifies.Scan pattern is vertical scanning.Context pattern 0,1,2 distribute to corresponding coefficient positions.Using the 0th context model 2 arranged as a grouping, using the 1st context model 1 arranged as a grouping, using the 2nd, 3 context models 0 arranged as a grouping, according to scanning sequency from top to bottom, from right to left, context model in each grouping is divided into group between two, the input state of first context model in the first Ge little group is set to the initial input state of the context model of this grouping.Such as, by (3,1) in black region, (2,3), the input state of the context model in (2,1) coefficient positions is set to the input state of the context model in (3,3) coefficient positions; The input state of the context model in (1, the 1) coefficient positions in black region is set to the input state of the context model in (1,3) coefficient positions; The input state of the context model in (0, the 1) coefficient positions in black region is set to the input state of the context model in (0,3) coefficient positions.In the running of bin corresponding to each context model, (2,0), (1,0) execution result of the bin that context model position is corresponding is transferred to next coefficient sets, the execution result of the bin that (0,0) context model position is corresponding is transferred to next coefficient sets.In other context model position, context state can not upgrade.Bin all in CG can perform by complete parallel, and throughput can reach 16bins/cycle.
2.CABAC-R hardware circuit design
In the rate estimation of the embodiment of the present invention in CABACR circuit framework and state updating circuit, multiple three grades of flowing structures are set, two continuous bins in each three grades of same context models of flowing structure process, described two continuous bins comprise bin0 and bin1, multiple tertiary structure executed in parallel;
First order structure in same tertiary structure selects the corresponding state of current bin0, bin1 from the feedback states of input state or second level structure;
The state of bin0, bin1 described in second level topology update in same tertiary structure, and calculate the bits of bin0, to first order structural feedback state updating situation;
The bits of the third level Structure Calculation bin1 in same tertiary structure.
The division of further optimization and pipelining-stage has been done for CABACR circuit framework.With reference to figure 4, as shown in Figure 4, the embodiment of the present invention supports 2/1/0BinsCABAC rate estimation.Rate estimation and state updating are three grades of flowing water.{ bin0, bin1} are two bins of same context model, and { vld0, vld1} are the enable signals of two bins.{ R0, R1} are bin0, bin1 bit rate outputs separately.The first order is from input state or second level feedback states, select the corresponding state of current bin.The second level upgrades the state of two bin and calculates the bits of bin0.The bits of bin1 is calculated the third level.Wherein, module M is a MUX.Module S realizes State Transferring, and module D completes the state updating of two continuous bin, and realizing of module S and D is as shown in table 3.Module R realizes obtaining code check R based on tabling look-up.In figure, blue module supports that the rate estimation of 1 bin and context state upgrade.
Table 3
Module S state transition table
Module D state transition table
Be module CABACR block architecture diagram with reference to figure 5, Fig. 5.R is all bins code check sums.The context state upgraded can output in TU (CU) mode decision.After mode decision, optimum state will output in context model (CM, ContextModule) buffer, for next block uses.In the architecture, state can reach real-time update.
Assess for CABACR optimized algorithm coding efficiency presented above.The realization of algorithm performs on reference tool HM13.0.Configure " AllIntraMain " based on one of general test condition, wherein RDOQ, RQT do not support.QP is respectively 22, and 27,32,37.Sequence is the cycle tests of JCT-VC recommendation.
In table 4, contrast with existing algorithm.In quick CABAC code check predictive algorithm, the algorithm that the embodiment of the present invention proposes has the increase of the performance loss of average 0.4%.CFBAC predictive algorithm implants the increase that HM13.0 has the performance loss of 1.1%.During based on bypassbit algorithm for estimating, frame level internal state does not upgrade, and on average has the performance loss of 8.9%.
Table 4 fast algorithm Performance comparision
In sum, CABAC-R (Context-basedAdaptiveBinaryArithmeticCodingRateestimatio n in the intra mode decision that the embodiment of the present invention proposes, code check based on context adaptive binary arithmetic coding is estimated) fast algorithm, parallel processing has been done to wherein two crucial syntactic element coeff_abs_level_greater1_flag and sig_coeff_flag, to oeff_abs_level_greater1_flag, the context model that coefficient in sig_coeff_flag is corresponding, bin corresponding for each context model of dividing into groups is carried out concurrent operation.Thus greatly improve calculating degree of parallelism, decrease the hardware time of implementation.
Meanwhile, the CABAC-R hardware-efficient circuit structure that the embodiment of the present invention proposes, can reach the real-time update of probabilistic model, and code check calculates more accurate, thus coding efficiency gets a promotion.And this hardware circuit can process 2bins/cycle, meet the handling property demand of mode decision.
One of ordinary skill in the art will appreciate that: accompanying drawing is the schematic diagram of an embodiment, the module in accompanying drawing or flow process might not be that enforcement the present invention is necessary.
As seen through the above description of the embodiments, those skilled in the art can be well understood to the mode that the present invention can add required general hardware platform by software and realizes.Based on such understanding, technical scheme of the present invention can embody with the form of software product the part that prior art contributes in essence in other words, this computer software product can be stored in storage medium, as ROM/RAM, magnetic disc, CD etc., comprising some instructions in order to make a computer equipment (can be personal computer, server, or the network equipment etc.) perform the method described in some part of each embodiment of the present invention or embodiment.
Each embodiment in this specification all adopts the mode of going forward one by one to describe, between each embodiment identical similar part mutually see, what each embodiment stressed is the difference with other embodiments.Especially, for device or system embodiment, because it is substantially similar to embodiment of the method, so describe fairly simple, relevant part illustrates see the part of embodiment of the method.Apparatus and system embodiment described above is only schematic, the wherein said unit illustrated as separating component or can may not be and physically separates, parts as unit display can be or may not be physical location, namely can be positioned at a place, or also can be distributed in multiple network element.Some or all of module wherein can be selected according to the actual needs to realize the object of the present embodiment scheme.Those of ordinary skill in the art, when not paying creative work, are namely appreciated that and implement.
The above; be only the present invention's preferably embodiment, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.

Claims (7)

1. the implementation method of parallel CABAC-R algorithm in intra mode decision, is characterized in that, comprising:
Determine the context model that each bin in syntactic element coeff_abs_level_greater1_flag and/or sig_coeff_flag in intra mode decision in CABAC-R calculating process is corresponding;
The all bin comprised in same context model are processed in pairs, to all paired bin executed in parallel in same context model.
2. the implementation method of parallel CABAC-R algorithm in intra mode decision according to claim 1, it is characterized in that, the context model that 8 bin in syntactic element coeff_abs_level_greater1_flag in described determination intra mode decision in CABAC-R calculating process are corresponding, comprising:
In syntactic element coeff_abs_level_greater1_flag 8 bin is divided into 4 groups, and wherein 1-2 bin forms first group, and 3-4 bin forms second group, and 5-6 bin forms the 3rd group, and 7-8 bin forms the 4th group; Distribute identical context model by the bin of two in each group, the context model that the bin of each group distributes is different.
3. the implementation method of parallel CABAC-R algorithm in intra mode decision according to claim 2, it is characterized in that, described context model comprises context model 1, context model 3, context model 2 and context model 0, corresponding 24 the context model methods of salary distribution of 8 bin in institute syntax elements coeff_abs_level_greater1_flag.
4. the implementation method of parallel CABAC-R algorithm in the intra mode decision according to Claims 2 or 3, it is characterized in that, described processes in pairs to all bin comprised in same context model, to all paired bin executed in parallel in same context model, comprising:
Bin executed in parallel in the context model not corresponding by described first group, second group, the 3rd group and Four composition, and 1 cycles has upgraded all bin of all context models.
5. the implementation method of parallel CABAC-R algorithm in intra mode decision according to claim 4, it is characterized in that, described processes in pairs to all bin comprised in same context model, to all paired bin executed in parallel in same context model, comprising:
The each coefficient represented to institute syntax elements sig_coeff_flag distributes a bin respectively, the bin executed in parallel corresponding to various context model;
By all bin in same context model according to scanning direction in pairs, in every a pair bin, first bin arranges the initial input state of this kind of context model, all paired bin executed in parallel in same context model, by the next coefficient sets of state transfer that last upgrades bin, and calculate code check R, and other paired bin only calculates code check R, not more new state.
6. the implementation method of parallel CABAC-R algorithm in intra mode decision according to claim 5, it is characterized in that, described method also comprises: the bin executed in parallel in all context models, and all bin having been upgraded all context models by 1 cycles.
7. in the intra mode decision according to any one of claim 1 to 6, the implementation method of parallel CABAC-R algorithm, is characterized in that, described method also comprises:
In rate estimation in CABACR circuit framework and state updating circuit, multiple three grades of flowing structures are set, two continuous bins in each three grades of same context models of flowing structure process, described two continuous bins comprise bin0 and bin1, multiple tertiary structure executed in parallel;
First order structure in same tertiary structure selects the corresponding state of current bin0, bin1 from the feedback states of input state or second level structure;
The state of bin0, bin1 described in second level topology update in same tertiary structure, and calculate the bits of bin0, to first order structural feedback state updating situation;
The bits of the third level Structure Calculation bin1 in same tertiary structure.
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