CN105117269A - Compiler optimization method based on vector interrupt - Google Patents
Compiler optimization method based on vector interrupt Download PDFInfo
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Abstract
The invention provides a compiler optimization method based on vector interrupt. The method comprises the steps that defining of vector interrupt functions is completed through preprocessing instructions; a compiler identifies the vector interrupt functions in the pre-compilation stage and analyzes use conditions of general registers in the interrupt functions; the general registers which need to be preserved and the preservation sequence of the general registers are determined; interrupt spots especially special registers which need to be preserved are determined; the registers are restored according to the preservation sequence of the registers, and the interrupt spots are restored; return of service functions is interrupted. According to the compiler optimization method based on the vector interrupt, the interrupt spots are preserved in the interrupt service functions,the conditions of the general registers used by the interrupt service functions are considered, operations of load/store are reduced, the process is simplified, the situations which relate to two skip operations of skipping to the interrupt service functions and returning from the interrupt service functions are reduced, therefore, the execution efficiency of the interrupt functions is accelerated, and the interrupt response speed of a processor is increased.
Description
Technical field
The invention belongs to Compiler Optimization field, especially relates to a kind of optimization method of the compiler based on vector interrupt.
Background technology
Compiler is a kind of computer program, the source code (source language) that it will be write as with certain high-level programming language, converts another kind of programming language (target language) to.Compiler is divided into leading portion, middle-end and rear end from structure, front end mainly lexical analysis, syntactic analysis phase, the assignment tree that front end generates is as input, be supplied to middle-end as input, middle-end comprises intermediate code and generates and optimize intermediate code, the intermediate code that middle-end generates is as output, and be supplied to rear end as input, intermediate code is compiled into assembly code by rear end.
Interruption is the most frequently used mode of processor response peripheral hardware request.Processor response is interrupted, perform break in service function in essence, the program proceeding to perform when occurring to interrupt is needed owing to having no progeny in processor response, just look like that interruption did not occur the same, so processor in commission needs to preserve interrupt spot before disconnected service function, in commission after disconnected service function, reduce interrupt spot.
Vector interrupt, external interrupt control device is connected to the data bus of processor by independent one, informs the address of processor break in service function while underway disconnected request.
The general flow of interrupt response is:
(1) interruption is entered
(2) interrupt spot is preserved
(3) break in service function is jumped to
(4) break in service function is performed
(5) return from interruption service function
(6) reduction interrupt spot
(7) interrupt spot is returned to
Here, preserve the register of all software-accessible " preservation interrupt spot ", relate to a large amount of store and operate, " reduction interrupt spot ", reduce the register of all software-accessible, relate to a large amount of load and operate, do not consider in break in service function whether use here; " jump to break in service function " and " from interruption service function return " relate to twice skip operation.When more crucially performing break in service function, as function, the register that the needs that compiler can be used are preserved is preserved, and this point is repeat preservation to operate with " preservation interrupt spot ", and the general flow of interrupt response cannot fully demonstrate the advantage of vector interrupt.
Summary of the invention
In view of this, the invention is intended to the optimization method proposing a kind of compiler based on vector interrupt, preserve to realize simplifying the load related in interrupt spot, reduction interrupt spot process, store the number simplification interrupted in flow process simultaneously decrease the number of times of redirect, thus the speed of raising processor interrupt response.
For achieving the above object, the technical scheme of the invention is achieved in that
Based on the optimization method of the compiler of vector interrupt, comprise the steps:
(1) definition to vectorial interrupt function is completed by pre-processing instruction;
(2) compiler identifies vector interrupt function in the precompile stage, analyzes the service condition of general-purpose register in interrupt function;
(3) general-purpose register needing to preserve is determined according to processor kind and programming model, and the order that general-purpose register is preserved;
(4) interrupt spot, particularly specified register that need to preserve is determined according to the content of processor kind, programming model and break in service function;
(5) according to the order restoring register of save register, reduction interrupt spot;
(6) break in service function returns, and is also that interrupt spot returns simultaneously.
Further, adopt keyword definition vector interrupt function in described step (1), be convenient to compiler front-end and resolve, described key word comprises #pragma, _ _ attribute__.
Further, in described step (2), compiler front-end passes through lexical analysis, syntactic analysis identification vector interrupt function in the precompile stage, the register assigning process that the information guiding obtained by precompile is follow-up; If break in service function uses these registers, preserve when preserving in interrupt spot, otherwise need not preserve.
Further, in described step (3), preserve general-purpose register and follow following principle:
(a1) whether parameter register, use for Transfer Parameters during function call, preserve according to compiler analysis result determination register, and out-of-order requirement preserved by register, and register is preserved and reduction sequence correspondence;
(a2) whether fixing register, preserve according to compiler analysis result determination register, and out-of-order requirement preserved by register, and register is preserved and reduction sequence correspondence;
(a3) can the register of Cross function, according to the order that the register specified inside the numerous and diverse degree of function and programming model calls, compiler is selected to need to preserve and the register of reduction, register preserve and the order of reduction corresponding.
Further, in described step (6), the compiling of instruction that break in service function ends up is interrupt return instruction by compiler.
Further, described step (3), step (4) are analyzed in break in service function, and analyze its subfunction, the principle of analysis is as follows:
(b1) register service condition in compiler Water demand break in service function and subfunction thereof, until the function analyzed no longer includes subfunction;
(b2) for break in service function and subfunction thereof, the specified register that equal analytical parameters general-purpose register, fixing general-purpose register and higher level lanquage can affect;
(b3) only analyzing in break in service function can the service condition of register of Cross function, and need not analyze in the subfunction of break in service function can the service condition of register of Cross function;
(b4) specified register of specifying when interrupt function defines needs to preserve
Relative to prior art, the optimization method of the compiler based on vector interrupt described in the invention has following advantage: interrupt spot is kept in break in service function and carries out by the present invention, consider the situation of the general-purpose register that break in service function uses, decrease load/store operation, simplify flow process, decrease to jump to break in service function and return from interruption service function and relate to twice skip operation, thus accelerate interrupt function execution efficiency, improve the speed of processor interrupt response.
Accompanying drawing explanation
The accompanying drawing of the part of formation the invention is used to provide the further understanding to the invention, and the schematic description and description of the invention, for explaining the invention, does not form the improper restriction to the invention.In the accompanying drawings:
Fig. 1 is example processor programming model register example;
Fig. 2 is that compiler is to interruption service function register analyses process flow diagram;
Fig. 3 is dwell vessel original state table during analysis register service condition;
The buffer status table that Fig. 4 uses when being and analyzing register service condition;
Fig. 5 is for example 1, uses the assembly routine schematic diagram that conventional compiler interrupt service routine compiles out;
Fig. 6 is for example 1, uses the assembly routine schematic diagram that the compiler interrupt service routine optimized compiles out;
Fig. 7 is for example 2, uses the assembly routine schematic diagram that conventional compiler interrupt service routine compiles out;
Fig. 8 is for example 2, uses the assembly routine schematic diagram that the compiler interrupt service routine optimized compiles out.
Embodiment
It should be noted that, when not conflicting, the embodiment in the invention and the feature in embodiment can combine mutually.
Below with reference to the accompanying drawings and describe the invention in detail in conjunction with the embodiments.
Processor programming model register as described in Figure 1, if processor does not have hardware to preserve the mechanism of interrupt spot, as follows based on the Compiler Optimization method embodiment of interrupting:
In commission during disconnected service function, according to the problem whether compiler is preserved register, register can be divided three classes:
(1) all general-purpose registers, compiler distributes according to register in analysis break in service function, the general-purpose register that the general-purpose register used in known break in service function and needs are preserved.
(2) the higher level lanquage specified register that can affect, compiler is according to the instruction analyzed in break in service function, and which specified register known break in service function can affect, such as condition register (cr), if existence condition instruction, then can the value of influence condition register.
(3) specified register only having assembly language to operate, namely programmer can be operated by compiled form these specified registers in break in service function.Like this, compiler does not know whether break in service function can affect these registers, and programmer it will be appreciated which specified register whether break in service function can affect, therefore, during by pre-processing instruction definition break in service function, should provide control interface for this type of register, such register is status register (msr) such as, processor control register (ccr).
Step (1): need to complete definition to vectorial interrupt function by pre-processing instruction, following formal definition vector interrupt function can be adopted:
__attribute__((interrupt(“msr”)))voidISR(void);
ISR is vector interrupt service function, and can using state register (msr) in break in service function.
Step (2): compiler identifies vector interrupt function in the precompile stage, analyzes the service condition of general-purpose register in interrupt function.
Step (3): compiler determines the general-purpose register needing to preserve according to processor kind and programming model, and the order that general-purpose register is preserved.Preserve general-purpose register and follow following principle:
(a1) whether parameter register, use for Transfer Parameters during function call, preserve according to compiler analysis result determination register, and out-of-order requirement preserved by register, and register is preserved and reduction sequence correspondence;
(a2) whether fixing register, preserve according to compiler analysis result determination register, and out-of-order requirement preserved by register, and register is preserved and reduction sequence correspondence;
(a3) can the register of Cross function, according to the order that the register specified inside the numerous and diverse degree of function and programming model calls, compiler is selected to need to preserve and the register of reduction, register preserve and the order of reduction corresponding.
Step (4): according to processor kind, the content of programming model and break in service function determines the specified register needing to preserve.
To the method detailed of register analyses as shown in Figure 2, in the process, compiler needs to analyze subfunction compiler:
(b1) register service condition in compiler Water demand break in service function and subfunction thereof, until the function analyzed no longer includes subfunction.
(b2) for break in service function and subfunction thereof, the specified register that equal analytical parameters general-purpose register, fixing general-purpose register and higher level lanquage can affect.
(b3) only analyzing in break in service function can the service condition of register of Cross function, and need not analyze in subfunction can the service condition of register of Cross function.
(b4) specified register of specifying when interrupt function defines needs to preserve
Between register analyses, dwell vessel original state is " N " as shown in Figure 3.After break in service function and subfunction are analyzed, once find that certain register needs to preserve, then at Fig. 4 state one field mark note " S " (store), otherwise keep original state " N " constant, after finally treating that all Functional Analysis terminate, need in break in service function, all registers being labeled as " S " to be preserved.
Step (5): according to the order restoring register of save register, reduction interrupt spot;
After function normal function, before returning to interrupt spot, the register of all preservations is reduced in order, " S " in state one hurdle corresponding for the register of reduction is replaced with " N " simultaneously.
Step (6): break in service function returns also is that interrupt spot returns simultaneously.
Example 1: break in service function is empty, compares the advantage by the method for the Compiler Optimization the optimized method traditional compared to traditional compiler.
First, as shown in Figure 5, describe the program interrupting performing according to the general flow interrupted, here, " ldu ", represents and takes out data from storer and upgrade the instruction of stack pointer; " stu ", represents that deposit data upgrades the instruction of stack pointer to storer; " bl " represents the instruction of the skip operation of band link register; " rfi ", represents the instruction turning back to interrupt spot; " jump " represents jump instruction.
Here generic compiler only may preserve " can Cross function register " for arbitrary function, so must add " preservation interrupt spot " with implementation by assembly, " redirect break in service function ", " reduction interrupt spot ", " returning to interrupt spot ".
The program interrupting performing and the program of interrupting execution are described, if define break in service function in the following manner according to the flow process after Compiler Optimization:
__attribute__((interrupt(“msr”))voidisr(void);
As shown in Figure 5, because programmer during definition break in service function informs that break in service function can use " msr " (break in service function does not use in fact), so compiling assembly routine out exists the operation of preserving and reducing " msr ".
Comparison diagram 5, Fig. 6 can find out, use the compiler optimized can reduce (1+2+4+10) secondary " store ", comprise 1 specified register associative operation, No. 2 general-purpose register associative operations, 4 subparameter register associative operations, 10 Cross function register associative operations; (1+2+4+10) secondary " load ", 1 specified register associative operation, No. 2 general-purpose register associative operations, 4 subparameter register associative operations, 10 Cross function register associative operations, reduce by 2 skip operations.
Example 2: break in service function call subfunction, compares the advantage by the method for the Compiler Optimization the optimized method traditional compared to traditional compiler.
Break in service function non-NULL, need to use " register of Cross function ", and there is subfunction in break in service function in interrupt function.Define break in service function in the following manner:
__attribute__((interrupt())voidisr(void);
Comparison diagram 7, Fig. 8 can find out, use the compiler optimized can reduce (2+1+2+10) secondary " store ", 2 specified register associative operations, No. 1 general-purpose register associative operation, 2 subparameter register associative operations, 10 Cross function register associative operations; (2+1+2+10) secondary " load ", 2 specified register associative operations, No. 1 general-purpose register associative operation, 2 subparameter register associative operations, 10 Cross function register associative operations, reduce by 2 skip operations.
The foregoing is only the preferred embodiment of the invention; not in order to limit the invention; within all spirit in the invention and principle, any amendment done, equivalent replacement, improvement etc., within the protection domain that all should be included in the invention.
Claims (6)
1. based on the optimization method of the compiler of vector interrupt, it is characterized in that: comprise the steps:
(1) definition to vectorial interrupt function is completed by pre-processing instruction;
(2) compiler identifies vector interrupt function in the precompile stage, analyzes the service condition of general-purpose register in interrupt function;
(3) general-purpose register needing to preserve is determined according to processor kind and programming model, and the order that general-purpose register is preserved;
(4) interrupt spot, particularly specified register that need to preserve is determined according to the content of processor kind, programming model and break in service function;
(5) according to the order restoring register of save register, reduction interrupt spot;
(6) break in service function returns, and is also that interrupt spot returns simultaneously.
2. the optimization method of the compiler based on vector interrupt according to claim 1, it is characterized in that: in described step (1), adopt keyword definition vector interrupt function, be convenient to compiler front-end resolve, described key word comprises #pragma, _ _ attribute__.
3. the optimization method of the compiler based on vector interrupt according to claim 1, it is characterized in that: in described step (2), compiler front-end passes through lexical analysis, syntactic analysis identification vector interrupt function in the precompile stage, the register assigning process that the information guiding obtained by precompile is follow-up; If break in service function uses these registers, preserve when preserving in interrupt spot, otherwise need not preserve.
4. the optimization method of the compiler based on vector interrupt according to claim 1, is characterized in that: in described step (3), preserves general-purpose register and follows following principle:
(a1) whether parameter register, use for Transfer Parameters during function call, preserve according to compiler analysis result determination register, and out-of-order requirement preserved by register, and register is preserved and reduction sequence correspondence;
(a2) whether fixing register, preserve according to compiler analysis result determination register, and out-of-order requirement preserved by register, and register is preserved and reduction sequence correspondence;
(a3) can the register of Cross function, according to the order that the register specified inside the numerous and diverse degree of function and programming model calls, compiler is selected to need to preserve and the register of reduction, register preserve and the order of reduction corresponding.
5. the optimization method of the compiler based on vector interrupt according to claim 1, is characterized in that: in described step (6), the compiling of instruction that break in service function ends up is interrupt return instruction by compiler.
6. the optimization method of the compiler based on vector interrupt according to claim 1, is characterized in that: described step (3), step (4) are analyzed in break in service function, and analyze its subfunction, the principle of analysis is as follows:
(b1) register service condition in compiler Water demand break in service function and subfunction thereof, until the function analyzed no longer includes subfunction;
(b2) for break in service function and subfunction thereof, the specified register that equal analytical parameters general-purpose register, fixing general-purpose register and higher level lanquage can affect;
(b3) only analyzing in break in service function can the service condition of register of Cross function, and need not analyze in the subfunction of break in service function can the service condition of register of Cross function;
(b4) specified register of specifying when interrupt function defines needs to preserve.
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108073108A (en) * | 2016-11-14 | 2018-05-25 | Ls 产电株式会社 | For controlling the method for the interruption in inverter |
CN112395065A (en) * | 2020-11-26 | 2021-02-23 | 湖北开特汽车电子电器系统股份有限公司 | Interrupt service method and device for starting and loading embedded system |
WO2023151339A1 (en) * | 2022-02-11 | 2023-08-17 | 广州翼辉信息技术有限公司 | Method and system for high-accuracy measurement of interrupt duration of embedded system, and medium |
CN117171053A (en) * | 2023-11-01 | 2023-12-05 | 睿思芯科(深圳)技术有限公司 | Test method, system and related equipment for vectorized programming |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1223402A (en) * | 1998-01-12 | 1999-07-21 | 日本电气株式会社 | Compiler capable of reducing interrupt handling in optimization and its optimization method |
US6634023B1 (en) * | 1998-06-18 | 2003-10-14 | International Business Machines Corporation | Compile method, exception handling method and computer |
CN101488100A (en) * | 2008-01-15 | 2009-07-22 | 上海海尔集成电路有限公司 | Interruption system implementing method and device |
-
2015
- 2015-10-09 CN CN201510647971.XA patent/CN105117269B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1223402A (en) * | 1998-01-12 | 1999-07-21 | 日本电气株式会社 | Compiler capable of reducing interrupt handling in optimization and its optimization method |
US6634023B1 (en) * | 1998-06-18 | 2003-10-14 | International Business Machines Corporation | Compile method, exception handling method and computer |
CN101488100A (en) * | 2008-01-15 | 2009-07-22 | 上海海尔集成电路有限公司 | Interruption system implementing method and device |
Non-Patent Citations (2)
Title |
---|
姚宏昕等: "基于ARM9内核的IRQ异常中断编程机制的研究", 《计算机工程与设计》 * |
钱贾敏等: "嵌入式操作系统中断现场保护的优化策略", 《微计算机信息》 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108073108A (en) * | 2016-11-14 | 2018-05-25 | Ls 产电株式会社 | For controlling the method for the interruption in inverter |
CN112395065A (en) * | 2020-11-26 | 2021-02-23 | 湖北开特汽车电子电器系统股份有限公司 | Interrupt service method and device for starting and loading embedded system |
WO2023151339A1 (en) * | 2022-02-11 | 2023-08-17 | 广州翼辉信息技术有限公司 | Method and system for high-accuracy measurement of interrupt duration of embedded system, and medium |
CN117171053A (en) * | 2023-11-01 | 2023-12-05 | 睿思芯科(深圳)技术有限公司 | Test method, system and related equipment for vectorized programming |
CN117171053B (en) * | 2023-11-01 | 2024-02-20 | 睿思芯科(深圳)技术有限公司 | Test method, system and related equipment for vectorized programming |
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