CN105099658B - A kind of wing chaos system circuit of singly balanced point four containing double absolute values - Google Patents
A kind of wing chaos system circuit of singly balanced point four containing double absolute values Download PDFInfo
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- CN105099658B CN105099658B CN201510551237.3A CN201510551237A CN105099658B CN 105099658 B CN105099658 B CN 105099658B CN 201510551237 A CN201510551237 A CN 201510551237A CN 105099658 B CN105099658 B CN 105099658B
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Abstract
The present invention relates to a kind of chaos system and circuit, the more particularly to a kind of wing chaos system of singly balanced point four and circuit containing double absolute values.Typical chaos system such as Lorenz systems, Chen systems and Lu systems all have three equalization points, it is zero balancing point wherein to have one, another two is non-zero balancing point, attractor produced by this kind of system is double-wing chaotic attractor, by increasing by four non-zero equalization points of method construct or more equalization point of saturation function or continuous function on the basis of Typical Chaotic Systems, the chaos system with four wings or multiple wing attractor can be constructed, the present invention is in the case of without saturation function or continuous function is increased, propose a kind of wing chaos system of singly balanced point four containing double absolute values, increased the type of chaos system, a kind of new selection is provided for chaos system is applied to engineering practice.
Description
Technical field
The present invention relates to a kind of chaos system and circuit, more particularly to a kind of wing chaos of singly balanced point four containing double absolute values
Circuit system.
Background technology
Typical chaos system such as Lorenz systems, Chen systems and Lu systems all have three equalization points, wherein having one
Individual is zero balancing point, and another two is non-zero balancing point, and the attractor produced by this kind of system is double-wing chaotic attractor, mixed in typical case
By increasing by four non-zero equalization points of method construct or more balance of saturation function or continuous function on the basis of ignorant system
Point, can construct the chaos system with four wings or multiple wing attractor, and the present invention is without increase saturation function or continuous letter
In the case of number, it is proposed that a kind of wing chaos system of singly balanced point four containing double absolute values, the type of chaos system is increased, be
Chaos system is applied to engineering practice there is provided a kind of new selection.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of wing chaos system circuit of singly balanced point four containing double absolute values,
The present invention realizes goal of the invention using following technological means：
1st, a kind of wing chaos system circuit of singly balanced point four containing double absolute values, it is characterised in that：
In i formulas, a, b, c, d, e are parameter, and f (z), f (y) are nonlinear function；
Work as a=0, b=2, c=1, d=4, e=0.5, f (y)=| y |, during f (z)=| z |, i formulas are：
Ii formulas are singly balanced point four wing continuous chaotic systems of three-dimensional containing double absolute values；
Mathematical Modeling constructing analog circuit according to ii formulas, using operational amplifier U1, operational amplifier U2, operation amplifier
Device U3 and resistance and electric capacity constitute anti-phase adder and anti-phase fractional order integrator, using operational amplifier U6 and resistance and two poles
Pipe constitutes absolute value circuit, and multiplying, the operational amplifier U1, operation amplifier are realized using multiplier U4 and multiplier U5
Device U2, operational amplifier U3 and operational amplifier U6 use LF347N, multiplier U4 and multiplier U5 to use AD633JN；
The operational amplifier U1 concatenation operation amplifier U2 and operational amplifier U3, the operational amplifier U2 connections fortune
Amplifier U1, operational amplifier U6 and multiplier U4, the operational amplifier U3 concatenation operation amplifier U6 and multiplier U5 are calculated,
The operational amplifier U6 connects multiplier U4 and multiplier U5, the multiplier U4 concatenation operation amplifiers U2, the multiplication
Device U5 concatenation operation amplifiers U3；
The operational amplifier U1 the 1st, 2 pins it is hanging, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, the 11st
Pin meets VEE, and the 6th pin is connected by resistance R12 with the 7th pin, and the 7th pin meets-x, by resistance R4 and operational amplifier
13rd pin of U2 connects, and is connected with the 13rd pin of operational amplifier U3 by resistance R18, and the 8th pin meets x, by resistance
R11 connects with the 6th pin of operational amplifier U1, and the 9th pin is connected by electric capacity C1 with the 8th pin, and the 13rd pin is by electricity
Resistance R9 connects with the 14th pin, and the 14th pin is connected by resistance R10 with the 9th pin；
The operational amplifier U2 the 1st, 2 pins it is hanging, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, the 11st
Pin meets VEE, and the 6th pin is connected by resistance R31 with the 7th pin, and the 7th pin meets-y, connects the 3rd pin of multiplier U4, the 8th
Pin meets y, is connected with the 2nd pin of operational amplifier U6 by resistance R20, by the 6th of resistance R22 and operational amplifier U6 the
Pin connects, and is connected with the 13rd pin of operational amplifier U1 by resistance R2, by the of resistance R1 and operational amplifier U2
13 pins connect, and are connected with the 6th pin of operational amplifier U2 by resistance R30, and the 9th pin passes through electric capacity C2 and the 8th pin
Connect, the 13rd pin is connected by resistance R5 with the 14th pin, the 14th pin is connected by resistance R3 with the 9th pin；
The operational amplifier U3 the 1st, 2 pins it is hanging, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, the 11st
Pin meets VEE, and the 6th pin is connected by resistance R14 with the 7th pin, and the 7th pin meets-z, by resistance R8 and operational amplifier
13rd pin of U3 connects, and the 8th pin meets z, connects the 3rd pin of multiplier U5, by the of resistance R13 and operational amplifier U3
6 pins connect, and are connected with the 13rd pin of operational amplifier U1 by resistance R6, by resistance R25's and operational amplifier U6
13rd pin connects, and is connected with the 9th pin of operational amplifier U6 by resistance R27, and the 9th pin is drawn by electric capacity C3 with the 8th
Pin connects, and the 13rd pin is connected by resistance R15 with the 14th pin, and the 14th pin is connected by resistance R16 with the 9th pin；
1st pin of the operational amplifier U6 is connected by diode D1 with the 2nd pin, and the 2nd pin passes through resistance R21
Connect with the 1st pin with diode D2, the 2nd pin is connected by resistance R21 and resistance R23 with the 6th pin, the 3rd, 5,10,12
Pin is grounded, and the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is connected by resistance R24 with the 7th pin, and the 7th pin connects
The 1st pin of multiplier U5 is connect, the 1st pin of the 8th pin connection multiplier U4, the 9th pin passes through resistance R29 and the 8th pin
Connect, the 13rd pin is connected by resistance R26 and diode D4 with the 14th pin, the 13rd pin passes through resistance R26 and resistance R28
Connect with the 9th pin, the 14th pin is connected by diode D3 with the 13rd pin；
The multiplier U4 the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin passes through resistance R17 and computing
13rd pin of amplifier U2 connects, and the 8th pin meets VCC；
The multiplier U5 the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin passes through resistance R7 and computing
13rd pin of amplifier U3 connects, and the 8th pin meets VCC.
Beneficial fruit of the invention is：A kind of wing chaos system of singly balanced point four containing double absolute values is proposed, be increased mixed
The type of ignorant system, a kind of new selection is provided for chaos system is applied to engineering practice.
Brief description of the drawings
Fig. 1 is circuit structure block diagram of the invention.
Fig. 2 is the actual connection figure of circuit of U1 of the present invention.
Fig. 3 is the actual connection figure of circuit of U2 of the present invention and U4.
Fig. 4 is the actual connection figure of circuit of U3 of the present invention and U5.
Fig. 5 is the actual connection figure of circuit of U6 of the present invention.
Fig. 6 is the phasor in y-z directions of the present invention.
Specific embodiment
The present invention is further described in detail with preferred embodiment below in conjunction with the accompanying drawings, referring to Fig. 1-Fig. 6.
1st, a kind of wing chaos system circuit of singly balanced point four containing double absolute values, it is characterised in that：
In i formulas, a, b, c, d, e are parameter, and f (z), f (y) are nonlinear function；
Work as a=0, b=2, c=1, d=4, e=0.5, f (y)=| y |, during f (z)=| z |, i formulas are：
Ii formulas are singly balanced point four wing continuous chaotic systems of three-dimensional containing double absolute values；
Mathematical Modeling constructing analog circuit according to ii formulas, using operational amplifier U1, operational amplifier U2, operation amplifier
Device U3 and resistance and electric capacity constitute anti-phase adder and anti-phase fractional order integrator, using operational amplifier U6 and resistance and two poles
Pipe constitutes absolute value circuit, and multiplying, the operational amplifier U1, operation amplifier are realized using multiplier U4 and multiplier U5
Device U2, operational amplifier U3 and operational amplifier U6 use LF347N, multiplier U4 and multiplier U5 to use AD633JN；
The operational amplifier U1 concatenation operation amplifier U2 and operational amplifier U3, the operational amplifier U2 connections fortune
Amplifier U1, operational amplifier U6 and multiplier U4, the operational amplifier U3 concatenation operation amplifier U6 and multiplier U5 are calculated,
The operational amplifier U6 connects multiplier U4 and multiplier U5, the multiplier U4 concatenation operation amplifiers U2, the multiplication
Device U5 concatenation operation amplifiers U3；
The operational amplifier U1 the 1st, 2 pins it is hanging, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, the 11st
Pin meets VEE, and the 6th pin is connected by resistance R12 with the 7th pin, and the 7th pin meets-x, by resistance R4 and operational amplifier
13rd pin of U2 connects, and is connected with the 13rd pin of operational amplifier U3 by resistance R18, and the 8th pin meets x, by resistance
R11 connects with the 6th pin of operational amplifier U1, and the 9th pin is connected by electric capacity C1 with the 8th pin, and the 13rd pin is by electricity
Resistance R9 connects with the 14th pin, and the 14th pin is connected by resistance R10 with the 9th pin；
The operational amplifier U2 the 1st, 2 pins it is hanging, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, the 11st
Pin meets VEE, and the 6th pin is connected by resistance R31 with the 7th pin, and the 7th pin meets-y, connects the 3rd pin of multiplier U4, the 8th
Pin meets y, is connected with the 2nd pin of operational amplifier U6 by resistance R20, by the 6th of resistance R22 and operational amplifier U6 the
Pin connects, and is connected with the 13rd pin of operational amplifier U1 by resistance R2, by the of resistance R1 and operational amplifier U2
13 pins connect, and are connected with the 6th pin of operational amplifier U2 by resistance R30, and the 9th pin passes through electric capacity C2 and the 8th pin
Connect, the 13rd pin is connected by resistance R5 with the 14th pin, the 14th pin is connected by resistance R3 with the 9th pin；
The operational amplifier U3 the 1st, 2 pins it is hanging, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, the 11st
Pin meets VEE, and the 6th pin is connected by resistance R14 with the 7th pin, and the 7th pin meets-z, by resistance R8 and operational amplifier
13rd pin of U3 connects, and the 8th pin meets z, connects the 3rd pin of multiplier U5, by the of resistance R13 and operational amplifier U3
6 pins connect, and are connected with the 13rd pin of operational amplifier U1 by resistance R6, by resistance R25's and operational amplifier U6
13rd pin connects, and is connected with the 9th pin of operational amplifier U6 by resistance R27, and the 9th pin is drawn by electric capacity C3 with the 8th
Pin connects, and the 13rd pin is connected by resistance R15 with the 14th pin, and the 14th pin is connected by resistance R16 with the 9th pin；
1st pin of the operational amplifier U6 is connected by diode D1 with the 2nd pin, and the 2nd pin passes through resistance R21
Connect with the 1st pin with diode D2, the 2nd pin is connected by resistance R21 and resistance R23 with the 6th pin, the 3rd, 5,10,12
Pin is grounded, and the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is connected by resistance R24 with the 7th pin, and the 7th pin connects
The 1st pin of multiplier U5 is connect, the 1st pin of the 8th pin connection multiplier U4, the 9th pin passes through resistance R29 and the 8th pin
Connect, the 13rd pin is connected by resistance R26 and diode D4 with the 14th pin, the 13rd pin passes through resistance R26 and resistance R28
Connect with the 9th pin, the 14th pin is connected by diode D3 with the 13rd pin；
The multiplier U4 the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin passes through resistance R17 and computing
13rd pin of amplifier U2 connects, and the 8th pin meets VCC；
The multiplier U5 the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin passes through resistance R7 and computing
13rd pin of amplifier U3 connects, and the 8th pin meets VCC.
Resistance R3=R5=R9=R10=R11=R12=R13=R14=R15=R16=10k Ω, R20=in circuit
R21=R22=R24=R25=R26=R27=R29=R30=R31=10k Ω, R23=R28=5k Ω, R2=50K Ω,
R7=R17=4K Ω, R18=200K Ω, R4=R6=100K Ω, R1=R8=25k Ω, electric capacity C1=C2=C3=in circuit
10nF。
Described above not limitation of the present invention, the present invention is also not limited to the example above, the art it is common
Change, remodeling, addition or replacement that technical staff is made in essential scope of the invention, fall within protection model of the invention
Enclose.
Claims (1)
1. a kind of wing chaos system circuit of singly balanced point four containing double absolute values, it is characterised in that：
In i formulas, a, b, c, d, e are parameter, and f (z), f (y) are nonlinear function；
Work as a=0, b=2, c=1, d=4, e=0.5, f (y)=| y |, during f (z)=| z |, i formulas are：
Ii formulas are singly balanced point four wing continuous chaotic systems of three-dimensional containing double absolute values；
Mathematical Modeling constructing analog circuit according to ii formulas, using operational amplifier U1, operational amplifier U2, operational amplifier U3
And resistance and electric capacity constitute anti-phase adder and anti-phase fractional order integrator, using operational amplifier U6 and resistance and diode structure
Into absolute value circuit, multiplying, the operational amplifier U1, operational amplifier are realized using multiplier U4 and multiplier U5
U2, operational amplifier U3 and operational amplifier U6 use LF347N, multiplier U4 and multiplier U5 to use AD633JN；
The operational amplifier U1 concatenation operation amplifier U2 and operational amplifier U3, the operational amplifier U2 concatenation operations are put
Big device U1, operational amplifier U6 and multiplier U4, the operational amplifier U3 concatenation operation amplifier U6 and multiplier U5, it is described
Operational amplifier U6 connects multiplier U4 and multiplier U5, the multiplier U4 concatenation operation amplifiers U2, the multiplier U5
Concatenation operation amplifier U3；
The operational amplifier U1 the 1st, 2 pins it is hanging, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, the 11st pin
VEE is met, the 6th pin is connected by resistance R12 with the 7th pin, and the 7th pin meets-x, by resistance R4's and operational amplifier U2
13rd pin connects, and is connected with the 13rd pin of operational amplifier U3 by resistance R18, and the 8th pin meets x, by resistance R11 with
6th pin of operational amplifier U1 connects, and the 9th pin is connected by electric capacity C1 with the 8th pin, the 13rd pin by resistance R9 with
14th pin connects, and the 14th pin is connected by resistance R10 with the 9th pin；
The operational amplifier U2 the 1st, 2 pins it is hanging, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, the 11st pin
VEE is met, the 6th pin is connected by resistance R31 with the 7th pin, and the 7th pin meets-y, connect the 3rd pin of multiplier U4, the 8th pin
Y is met, is connected with the 2nd pin of operational amplifier U6 by resistance R20, by the 6th pin of resistance R22 and operational amplifier U6
Connect, connected with the 13rd pin of operational amplifier U1 by resistance R2, drawn with the 13rd of operational amplifier U2 the by resistance R1
Pin connects, and is connected with the 6th pin of operational amplifier U2 by resistance R30, and the 9th pin is connected by electric capacity C2 with the 8th pin,
13rd pin is connected by resistance R5 with the 14th pin, and the 14th pin is connected by resistance R3 with the 9th pin；
The operational amplifier U3 the 1st, 2 pins it is hanging, the 3rd, 5,10,12 pins ground connection, the 4th pin meets VCC, the 11st pin
VEE is met, the 6th pin is connected by resistance R14 with the 7th pin, and the 7th pin meets-z, by resistance R8's and operational amplifier U3
13rd pin connects, and the 8th pin meets z, connects the 3rd pin of multiplier U5, is drawn with the 6th of operational amplifier U3 the by resistance R13
Pin connects, and is connected with the 13rd pin of operational amplifier U1 by resistance R6, by the 13rd of resistance R25 and operational amplifier U6 the
Pin connects, and is connected with the 9th pin of operational amplifier U6 by resistance R27, and the 9th pin passes through electric capacity C3 and the 8th pin phase
Connect, the 13rd pin is connected by resistance R15 with the 14th pin, the 14th pin is connected by resistance R16 with the 9th pin；
1st pin of the operational amplifier U6 is connected by diode D1 with the 2nd pin, and the 2nd pin passes through resistance R21 and two
Pole pipe D2 connects with the 1st pin, and the 2nd pin is connected by resistance R21 and resistance R23 with the 6th pin, the 3rd, 5,10,12 pins
Ground connection, the 4th pin meets VCC, and the 11st pin meets VEE, and the 6th pin is connected by resistance R24 with the 7th pin, and the connection of the 7th pin multiplies
1st pin of musical instruments used in a Buddhist or Taoist mass U5, the 1st pin of the 8th pin connection multiplier U4, the 9th pin is connected by resistance R29 with the 8th pin,
13rd pin is connected by resistance R26 and diode D4 with the 14th pin, and the 13rd pin passes through resistance R26 and resistance R28 and the 9th
Pin connects, and the 14th pin is connected by diode D3 with the 13rd pin；
The multiplier U4 the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin passes through resistance R17 and operation amplifier
13rd pin of device U2 connects, and the 8th pin meets VCC；
The multiplier U5 the 2nd, 4,6 pins be grounded, the 5th pin meets VEE, and the 7th pin passes through resistance R7 and operation amplifier
13rd pin of device U3 connects, and the 8th pin meets VCC.
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| CN201510551237.3A CN105099658B (en) | 2015-09-01 | 2015-09-01 | A kind of wing chaos system circuit of singly balanced point four containing double absolute values |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012177265A1 (en) * | 2011-06-24 | 2012-12-27 | Hewlett-Packard Development Company, L.P. | High-reliability high-speed memristor |
| CN104009748A (en) * | 2014-06-13 | 2014-08-27 | 西南大学 | Memristor hyperchaos system and circuit with abundant dynamic behaviors |
| CN104393986A (en) * | 2014-12-03 | 2015-03-04 | 王忠林 | Memristor based four-wing hyper-chaos system establishing method and circuit implementation |
| CN104539413A (en) * | 2014-12-03 | 2015-04-22 | 韩敬伟 | Construction method of memristor-based y-power-comprising Chen type hyper-chaotic system and circuit |
-
2015
- 2015-09-01 CN CN201510551237.3A patent/CN105099658B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012177265A1 (en) * | 2011-06-24 | 2012-12-27 | Hewlett-Packard Development Company, L.P. | High-reliability high-speed memristor |
| CN104009748A (en) * | 2014-06-13 | 2014-08-27 | 西南大学 | Memristor hyperchaos system and circuit with abundant dynamic behaviors |
| CN104393986A (en) * | 2014-12-03 | 2015-03-04 | 王忠林 | Memristor based four-wing hyper-chaos system establishing method and circuit implementation |
| CN104539413A (en) * | 2014-12-03 | 2015-04-22 | 韩敬伟 | Construction method of memristor-based y-power-comprising Chen type hyper-chaotic system and circuit |
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Effective date of registration: 20170613 Address after: 519031, 20, 413, 415, 416 rooms, creative Valley, No. 1889, Huandao East Road, Hengqin New District, Guangdong, Zhuhai Applicant after: ZHUHAI HENGQIN KUNPENG NEW ENERGY ENVIRONMENTAL PROTECTION TECHNOLOGY CO.,LTD. Address before: 256603 Bohai City, Binzhou Province, No. eleven, No. Road, building 3, building 713 Applicant before: Gao Jianhong |
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