CN105097959A - Metal-insulator-metal capacitor with high breakdown voltage - Google Patents
Metal-insulator-metal capacitor with high breakdown voltage Download PDFInfo
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Abstract
The invention provides a metal-insulator-metal capacitor with high breakdown voltage. The metal-insulator-metal capacitor is used in a composite semiconductor integrated circuit and comprises a substrate, an isolating layer, a first metallic layer, a dielectric material layer, a bonding layer, and a second metallic layer. The dielectric material layer is formed by alternately stacking plural hafnium oxide (HfO2) layers and plural silicon dioxide (SiO2) layers. The thickness of each of the plural hafnium oxide layers is more than 30 angstroms but less than 100 angstroms. Thus, a high capacitance density is maintained while each of the plural hafnium oxide layers is decreased in leakage current of and increased in breakdown voltage. In addition, since the thickness of the dielectric material layer formed by alternately stacking the plural hafnium oxide layers and plural silicon dioxide layers is more than 500 angstroms, the breakdown voltage of the metal-insulator-metal capacitor is increased to over 50V.
Description
Technical field
The present invention, about a kind of high breakdown voltage MIM capacitor, is applied in power composite integrated semiconductor road, mobile phone circuit, and the insulator wherein in capacitor is a dielectric materials layer, and it is by plural layer hafnium oxide (HfO
2) layer and plural layer silicon dioxide (SiO
2) the layer alternately stacking dielectric materials layer forming thickness and be greater than 500, there is the features such as high capacitance density, low-leakage current and high breakdown voltage.
Background technology
The application of MIM capacitor is very extensive, but when different application, completely different to the demand of the breakdown voltage of MIM capacitor.Such as, refer to Fig. 6, Fig. 6 A and Fig. 6 B(and be respectively " Berthelot, A.; Caillat, C.; Huard, V.; Barnola, S.; Boeck, B.; Del-Puppo, H.; Emonet, N. & Lalanne, F. (2006) .HighlyReliableTiN/ZrO2/TiN3DStackedCapacitorsfor45nmEmb eddedDRAMTechnologies, Proc.ofESSDERC2006, pp.343 – 346, Montreux, Switzerland, Sept.2006 " in Figure5, Figure11 and Figure4); the existing MIM capacitor being applied to Dynamic Random Access Memory DynamicRandomAccessMemory (DRAM), the requirement of its breakdown voltage is usually all at below 6V.
Refer to Fig. 6, its for for DRAM application designed by MIM capacitor, it is designed to lower metal layer is titanium nitride (TiN), and dielectric layer is zirconium dioxide (ZrO
2), upper metal layers is titanium nitride (TiN).Its dielectric layer also can be hafnium oxide (HfO
2) or aluminium oxide (Al
2o
3).Referring to Fig. 6 A and Fig. 6 B, with aluminium oxide (Al
2o
3) be example, as aluminium oxide (Al
2o
3) thickness close to 50 (equivalent silicon dioxide (SiO
2) about 20) time, its breakdown voltage is about about 5.5V.And at hafnium oxide (HfO
2) and zirconium dioxide (ZrO
2) example in, its breakdown voltage is especially lower than 4V.But, in the application of mobile phone, be but up to 50V to the requirement of the breakdown voltage of MIM capacitor, very large with the application gap of DRAM.
Not only different to the requirement of breakdown voltage, when being applied in DRAM and being applied in mobile phone, the requirement of the lifetime of MIM capacitor is also differed widely.Time the test of m-dielectric breakdown lifetime be the method that semiconductor is commonly used to the reliability of test I C element.During test MIM capacitor, be under high temperature, apply with a fixed voltage capacitor, measure the time of its collapse, whether result estimates the size of its lifetime and meets the requirements thus.To the requirement of the MIM capacitor being applied to DRAM be generally apply voltage be 3V time, the lifetime must be more than or equal to 10 years (3.1x10
8sec); And to being applied to the MIM capacitor of mobile phone, be then under temperature 125 DEG C, apply the voltage of 20V, its lifetime must be more than or equal to 20 years (6.3x10
8sec).Obviously, no matter the requirement of the design being applied to the MIM capacitor of DRAM in the lifetime or the requirement at breakdown voltage all cannot meet the design of the MIM capacitor being applied to mobile phone.
Referring to Fig. 7, is the design that a prior art uses for MIM capacitor that design is applicable to mobile phone.A separator, a first metal layer (Au), a silicon nitride dielectric layer (Si is sequentially formed on a GaAs (GaAs) substrate
3n
4), an adhesive layer (Ti) and one second metal level (Au).As silicon nitride dielectric layer (Si
3n
4) thickness when being 1000, through time the m-dielectric breakdown lifetime test, when to apply voltage be 20V, its lifetime can reach and be more than or equal to 20 years (6.3x10
8sec) requirement.And its breakdown voltage is 81.5V, the requirement in mobile phone application also can be reached.But its capacitance density but only has 580(pF/mm
2).For more and more intensive integrated circuit (IC) design demand, need the design of the MIM capacitor of higher capacitance density.
Capacitance density is higher, and the electric capacity representing unit are is higher, and in other words, when needs electric capacity is fixed, the area shared by MIM capacitor design that capacitance density is higher is less than the lower MIM capacitor design of capacitance density.Such as, when designing mobile phone circuit, if can use the design of the MIM capacitor that capacitance density is higher, then the area shared by MIM capacitor will significantly reduce.Because capacitor accounts for sizable ratio on mobile phone circuit, therefore, design the MIM capacitor with high capacitance density, can significantly reduce costs, make product have higher competitiveness.
In view of this, the present inventor develops the design made new advances, the defect of the design of general existing MIM capacitor can be overcome, and design the MIM capacitor with high capacitance density, again by time the m-dielectric breakdown lifetime test, when applying voltage is 20V, its lifetime can reach and be more than or equal to 20 years (6.3x10
8sec) requirement, and its breakdown voltage also can reach more than 50V simultaneously, to meet the demand of the high breakdown voltage value of mobile phone application.
Summary of the invention
The present invention be how to improve the breakdown voltage of MIM capacitor for the technical problem solved and reduce the leakage current of MIM capacitor, the requirement of its breakdown voltage must at more than 50V, MIM capacitor is simultaneously made to have high capacitance density again, to meet the demand of power composite integrated semiconductor road application, reduce costs, and MIM capacitor will by time the m-dielectric breakdown lifetime test, when applying voltage is 20V, its lifetime can reach and be more than or equal to 20 years (6.3x10
8sec) requirement.
For solving foregoing problems, to reach desired effect, the invention provides a kind of high breakdown voltage MIM capacitor, can be applicable on power composite integrated semiconductor road, mobile phone circuit, comprise a substrate, a separator, a first metal layer, a dielectric materials layer, an adhesive layer and one second metal level; Wherein this separator is formed on this substrate; This first metal layer is formed on this separator; This dielectric materials layer is formed on this first metal layer; This adhesive layer is formed on this dielectric materials layer; This second metal level is formed on this adhesive layer; Wherein this dielectric materials layer is by plural layer hafnium oxide (HfO
2) layer and plural layer silicon dioxide (SiO
2) layer is alternately stacking forms.
Wherein this plural layer hafnium oxide (HfO
2) thickness of every one deck of layer is greater than 30 and is less than 100, makes this plural layer hafnium oxide (HfO whereby
2) hafnium oxide (HfO of every one deck of layer
2) leakage current reduce and breakdown voltage improve and possess high capacitance density simultaneously.
And wherein by this plural layer hafnium oxide (HfO
2) layer and this plural layer silicon dioxide (SiO
2) thickness of alternately stacking this dielectric materials layer of layer is greater than 500, makes the breakdown voltage of this high breakdown voltage MIM capacitor be increased to more than 50V whereby.
In an embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein the thickness of this dielectric materials layer is greater than 500 and is less than 1000.
In another embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein this plural layer silicon dioxide (SiO
2) thickness of every one deck of layer is greater than 5 and is less than 50.
In an embodiment again, this high breakdown voltage MIM capacitor aforesaid, wherein this plural layer hafnium oxide (HfO
2) gross thickness of layer is greater than 450 and is less than 800.
In another embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein this plural layer silicon dioxide (SiO
2) gross thickness of layer is greater than 50 and is less than 200.
In again again in an embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein this plural layer silicon dioxide (SiO
2) gross thickness of the layer ratio that accounts for the thickness of this dielectric materials layer is greater than 5% and is less than 25%.
In addition, the present invention also provides a kind of high breakdown voltage MIM capacitor, a substrate, a separator, a first metal layer, a dielectric materials layer, an adhesive layer and one second metal level; Wherein this separator is formed on this substrate; This first metal layer is formed on this separator; This dielectric materials layer is formed on this first metal layer; This adhesive layer is formed on this dielectric materials layer; This second metal level is formed on this adhesive layer; Wherein this dielectric materials layer is by plural layer hafnium oxide (HfO
2) layer and plural layer interval dielectric layer are alternately stacking forms; And every one deck of this plural layer interval dielectric layer is a silicon dioxide (SiO
2) layer or an aluminium oxide (Al
2o
3) layer, wherein this plural layer interval dielectric layer comprises at least one silicon dioxide (SiO
2) layer and at least one aluminium oxide (Al
2o
3) layer.
Wherein this plural layer hafnium oxide (HfO
2) the thickness system of every one deck of layer is greater than 30 and is less than 100, makes this plural layer hafnium oxide (HfO whereby
2) hafnium oxide (HfO of every one deck of layer
2) leakage current reduce and breakdown voltage improve and possess high capacitance density simultaneously.
And wherein by this plural layer hafnium oxide (HfO
2) thickness of alternately stacking this dielectric materials layer of layer and this plural layer interval dielectric layer is greater than 500, makes the breakdown voltage of this high breakdown voltage MIM capacitor be increased to more than 50V whereby.
In an embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein the thickness of this dielectric materials layer is greater than 500 and is less than 1000.
In another embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein the thickness of every one deck of this plural layer interval dielectric layer is greater than 5 and is less than 100.
In an embodiment again, this high breakdown voltage MIM capacitor aforesaid, wherein this plural layer hafnium oxide (HfO
2) gross thickness of layer is greater than 450 and is less than 800.
In another embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein the gross thickness of this plural layer interval dielectric layer is greater than 50 and is less than 300.
In again again in an embodiment, this high breakdown voltage MIM capacitor aforesaid, the ratio that wherein gross thickness of this plural layer interval dielectric layer accounts for the thickness of this dielectric materials layer is greater than 5% and is less than 35%.
In addition, the present invention also provides a kind of high breakdown voltage MIM capacitor, is applied to power composite integrated semiconductor road, comprises: a substrate, a separator, a first metal layer, a dielectric materials layer, an adhesive layer and one second metal level; Wherein this separator is formed on this substrate; This first metal layer is formed on this separator; This dielectric materials layer is formed on this first metal layer; This adhesive layer is formed on this dielectric materials layer; This second metal level is formed on this adhesive layer; Wherein this dielectric materials layer is by plural layer zirconium dioxide (ZrO
2) layer and plural layer interval dielectric layer are alternately stacking forms; And wherein every one deck of this plural layer interval dielectric layer is a silicon dioxide (SiO
2) layer or an aluminium oxide (Al
2o
3) layer, wherein this plural layer interval dielectric layer at least comprises a silicon dioxide (SiO
2) layer.
Wherein this plural layer zirconium dioxide (ZrO
2) thickness of every one deck of layer is greater than 30 and is less than 100, makes this plural layer zirconium dioxide (ZrO whereby
2) zirconium dioxide (ZrO of every one deck of layer
2) leakage current reduce and breakdown voltage improve and possess high capacitance density simultaneously.
And wherein by this plural layer zirconium dioxide (ZrO
2) thickness of alternately stacking this dielectric materials layer of layer and this plural layer interval dielectric layer is greater than 500, makes the breakdown voltage of this high breakdown voltage MIM capacitor be increased to more than 50V whereby.
In an embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein the thickness of this dielectric materials layer is greater than 500 and is less than 1000.
In another embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein the thickness of every one deck of this plural layer interval dielectric layer is greater than 5 and is less than 100.
In another embodiment, this high breakdown voltage MIM capacitor aforesaid, wherein this plural layer zirconium dioxide (ZrO
2) gross thickness of layer is greater than 450 and is less than 800.
In an embodiment again, this high breakdown voltage MIM capacitor aforesaid, wherein the gross thickness of this plural layer interval dielectric layer is greater than 50 and is less than 300.
In again again in an embodiment, this high breakdown voltage MIM capacitor aforesaid, the ratio that wherein gross thickness of this plural layer interval dielectric layer accounts for the thickness of this dielectric materials layer is greater than 5% and is less than 35%.
For understanding the present invention further, below lifting preferred embodiment, coordinating accompanying drawing, figure number, concrete constitution content of the present invention and effect of reaching thereof are described in detail as follows.
Accompanying drawing explanation
Fig. 1 is a specific embodiment of a kind of high breakdown voltage MIM capacitor of the present invention.
Figure 1A, 1B, 1C are the specific embodiment of the structure of the dielectric materials layer of a kind of high breakdown voltage MIM capacitor of the present invention.
Fig. 2 is another specific embodiment of a kind of high breakdown voltage MIM capacitor of the present invention.
Fig. 2 A, 2B, 2C are the specific embodiment of the structure of the dielectric materials layer of a kind of high breakdown voltage MIM capacitor of the present invention.
Fig. 3 is the another specific embodiment of a kind of high breakdown voltage of the present invention MIM capacitor.
Fig. 3 A, 3B, 3C are the specific embodiment of the structure of the dielectric materials layer of a kind of high breakdown voltage MIM capacitor of the present invention.
Fig. 4 is a specific embodiment of a kind of high breakdown voltage MIM capacitor of the present invention.
Fig. 5 A is the dielectric material layer thickness of a specific embodiment and the graph of a relation of capacitance density and breakdown voltage of a kind of high breakdown voltage MIM capacitor of the present invention.
Fig. 5 B is the time m-dielectric breakdown lifetime test result of three specific embodiments comparing a kind of high breakdown voltage of the present invention MIM capacitor.
Fig. 5 C, 5D are voltage and the temperature variant graph of a relation of electric capacity of two specific embodiments comparing a kind of high breakdown voltage of the present invention MIM capacitor.
Fig. 6 is a specific embodiment of the MIM capacitor of a prior art, represents the HRTEM image (equivalent oxide thickness=9.3A) of TiN/ZrO2/TiN capacitor.
Fig. 6 A, 6B are material and the material thickness of dielectric layer, equivalent silicon dioxide (SiO2) thickness of the material of dielectric layer and the graph of a relation of breakdown voltage of the dielectric layer of the MIM capacitor of a prior art;
Fig. 6 A is Figure 11 of prior art document material, represents the variation relation curve (Figure11:VariationofpositiveVoltage-to-Breakdown (Vbd) withEOTfordifferenthigh-Kmaterials) of the equivalent oxide thickness of positive breakdown voltage (Vbd)-different high dielectric material;
Fig. 6 B is Fig. 4 of same section prior art document material, represents atomic deposition ZrO
2, HfO
2and Al
2o
3relation (Figure4:RelationshipbetweenEOTandphysicalthicknessforALD ZrO between the material thickness of film and equivalent oxide thickness
2, HfO
2and Al
2o
3films).
Fig. 7 is a specific embodiment of the MIM capacitor of a prior art.
symbol description:
Substrate 10 separator 11 the first metal layer 12 dielectric materials layer 13
Hafnium oxide (HfO
2) layer 131 silicon dioxide (SiO
2) layer 132
Adhesive layer 14 second metal level 15 substrate 20 separator 21
The first metal layer 22 dielectric materials layer 23 hafnium oxide (HfO
2) layer 231
Interval dielectric layer 232 adhesive layer 24 second metal level 25 substrate 30
Separator 31 the first metal layer 32 dielectric materials layer 33
Zirconium dioxide (ZrO2) layer 331 interval dielectric layer 332 adhesive layer 34
Second metal level 35 substrate 40 separator 41 the first metal layer 42
Dielectric materials layer 43 adhesive layer 44 second metal level 45.
Embodiment
Refer to Fig. 4, it is one of a kind of high breakdown voltage MIM capacitor of the present invention specific embodiment, be applied to power composite integrated semiconductor road, comprise: substrate 40, separator 41, the first metal layer 42, dielectric materials layer 43, adhesive layer 44 and one second metal level 45.
The material forming substrate 40 is GaAs (GaAs).Separator 41 is formed on substrate 40; The material forming separator 41 is generally (Si
3or silicon dioxide (SiO N4)
2).The first metal layer 42 is formed on separator 41; The material forming the first metal layer 42 is gold (Au).The first metal layer 42 is formed dielectric materials layer 43.Adhesive layer 44 is formed on dielectric materials layer 43; The material forming adhesive layer 44 is titanium (Ti).The second metal level 45 is formed on adhesive layer 44; Form the material of the second metal level 45 for gold (Au).Wherein dielectric materials layer 43 is by plural layer hafnium oxide (HfO
2) layer and plural layer aluminium oxide (Al
2o
3) layer is alternately stacking forms.Wherein bottom one deck of dielectric materials layer 43 is all hafnium oxide (HfO with the top one deck
2) layer.
Refer to the thickness of dielectric materials layer and the relation data figure of capacitance density and breakdown voltage that Fig. 5 A is a specific embodiment of a kind of high breakdown voltage MIM capacitor of the present invention.The present inventor, with the design of the structure of Fig. 4, tests the dielectric materials layer 43 of multi-thickness, and when thickness is thicker, the breakdown voltage of capacitor is higher.But along with the thickness of dielectric materials layer 43 increases, the capacitance density of capacitor but reduces.At HfO
2+ Al
2o
3the embodiment of ~ 800, when the thickness of its dielectric materials layer 43 is 800, its breakdown voltage is 65.1V, and higher than the requirement of mobile phone circuit 50V, and its capacitance density is 1673pF/mm
2, far above prior art Si
3n
4the capacitance density 580pF/mm of ~ 1000
2.
But Fig. 5 B is the time m-dielectric breakdown lifetime test result of three specific embodiments comparing a kind of high breakdown voltage of the present invention MIM capacitor.Wherein two embodiments are the embodiment of the structure of Fig. 4, and one of them embodiment is HfO
2+ Al
2o
3~ 500, the thickness of its dielectric materials layer 43 is 500, and another embodiment is HfO
2+ Al
2o
3~ 800, the thickness of its dielectric materials layer 43 is 800.But by test result, no matter be HfO
2+ Al
2o
3~ 500 or HfO
2+ Al
2o
3~ 800, all cannot reach when applying voltage and equaling 20V, the lifetime must be more than or equal to 20 years (6.3x10
8sec) requirement.Therefore, the present inventor continues the collocation attempting other dielectric materials, when meeting to finding out the test of m-dielectric breakdown lifetime when applying voltage and equaling 20V, the lifetime is more than or equal to 20 years (6.3x10
8sec) requirement, has again the design higher than 50V of high capacitance density and breakdown voltage simultaneously.
Refer to Fig. 1, its specific embodiment being a kind of high breakdown voltage MIM capacitor of the present invention, be applied to power composite integrated semiconductor road, comprise: substrate 10, separator 11, the first metal layer 12, dielectric materials layer 13, adhesive layer 14 and one second metal level 15.
The material forming substrate 10 is generally GaAs (GaAs), indium phosphide (InP), gallium nitride (GaN) or carborundum (SiC).Separator 11 is formed on substrate 10; The material forming separator 11 is generally (Si
3n
4) or silicon dioxide (SiO
2).The first metal layer 12 is formed on separator 11; The material forming the first metal layer 12 is generally gold (Au).Dielectric materials layer 13 is formed at the first metal layer 12.Adhesive layer 14 is formed on dielectric materials layer 13; The material forming adhesive layer 14 is generally titanium (Ti).The second metal level 15 is formed on adhesive layer 14; The material forming the second metal level 15 is generally gold (Au).
Refer to Fig. 1, and please refer to Figure 1A, 1B, 1C, be the specific embodiment of the structure of the dielectric materials layer of a kind of high breakdown voltage MIM capacitor of the present invention, wherein dielectric materials layer 13 is by plural layer hafnium oxide (HfO
2) layer 131 and plural layer silicon dioxide (SiO
2) layer 132 is alternately stacking forms.
In the embodiment in figure 1, bottom one deck of dielectric materials layer 13 is hafnium oxide (HfO
2) layer 131; And the top one deck of dielectric materials layer 13 is also hafnium oxide (HfO
2) layer 131.
In the embodiment of Figure 1A, bottom one deck of dielectric materials layer 13 is silicon dioxide (SiO
2) layer 132; And the top one deck of dielectric materials layer 13 is hafnium oxide (HfO
2) layer 131.
In the embodiment of Figure 1B, bottom one deck of dielectric materials layer 13 is hafnium oxide (HfO
2) layer 131; And the top one deck of dielectric materials layer 13 is silicon dioxide (SiO
2) layer 132.
In the embodiment of Fig. 1 C, bottom one deck of dielectric materials layer 13 is silicon dioxide (SiO
2) layer 132; And the top one deck of dielectric materials layer 13 is also silicon dioxide (SiO
2) layer 132.
In the embodiment of Fig. 1,1A, 1B, 1C, every one deck hafnium oxide (HfO
2) thickness of layer 131 is greater than 30 and is less than 100, under such thickness, every one deck hafnium oxide (HfO
2) layer 131 all can maintain preferably lattice state, this contributes to reducing leakage current, reduces the withstand voltage that leakage current then contributes to improving capacitor, allows the breakdown voltage of capacitor raise.
But as the hafnium oxide (HfO of every one deck
2) thickness of layer 131 is when being greater than 100, now the state of lattice more not easily maintains, and cause the increase of leakage current and reduce breakdown voltage on the contrary, this can affect the characteristic of product.In order to make every one deck hafnium oxide (HfO
2) layer 131 all can maintain preferably lattice state, can reduce leakage current again simultaneously and improve breakdown voltage, the present invention proposes to allow plural layer hafnium oxide (HfO
2) layer 131 and plural layer silicon dioxide (SiO
2) layer 132 is alternately stacking and form the design of dielectric materials layer 13, reaches required function.
In the embodiment of Fig. 1,1A, 1B, 1C, every layer of silicon dioxide (SiO
2) thickness of layer 132 is greater than 5 and is less than 50.At every one deck hafnium oxide (HfO
2) alternately stacking silicon dioxide (SiO on or below layer 131
2) layer 132, every one deck hafnium oxide (HfO can be made
2) layer 131 all can maintain preferably lattice state, and silicon dioxide (SiO
2) layer 132 can show to land and help to improve the breakdown voltage of capacitor.
And as plural layer hafnium oxide (HfO
2) layer 131 and plural layer silicon dioxide (SiO
2) thickness of layer 132 alternately stacking dielectric materials layer 13 is when being greater than 500, the breakdown voltage of capacitor will be increased to more than 50V, also possess high capacitance density simultaneously.Therefore, by plural layer hafnium oxide (HfO
2) layer 131 and plural layer silicon dioxide (SiO
2) layer 132 is alternately stacking and form the design of dielectric materials layer 13, effectively can reduce leakage current and improve breakdown voltage and possess high capacitance density simultaneously.
In a preferred embodiment, the thickness of dielectric materials layer 13 is greater than 500 and is less than 1000.
In another preferred embodiment, plural layer hafnium oxide (HfO
2) gross thickness of layer 131 is greater than 450 and is less than 800.
In a preferred embodiment, plural layer silicon dioxide (SiO
2) gross thickness of layer 132 is greater than 50 and is less than 200.
In another preferred embodiment, plural layer silicon dioxide (SiO
2) gross thickness of layer 132 ratio that accounts for the thickness of dielectric materials layer 13 is greater than 5% and is less than 25%.
Refer to Fig. 5 B, two embodiments are wherein the embodiment of Fig. 4 structure, and one of them embodiment is HfO
2+ Al
2o
3~ 500, the thickness of its dielectric materials layer 43 is 500, and another embodiment is HfO
2+ Al
2o
3~ 800, the thickness of its dielectric materials layer 43 is 800.In Fig. 5 B, the 3rd embodiment is the embodiment HfO of the structure of Fig. 1
2+ SiO
2~ 800, the thickness of its dielectric materials layer 13 is 800.By HfO
2+ SiO
2the test result display of ~ 800, when applying voltage is 20V, its lifetime meets and is more than or equal to 20 years (6.3x10
8sec) requirement.Therefore, the embodiment HfO of the structure of Fig. 1
2+ SiO
2~ 800, the embodiment of m-dielectric breakdown lifetime testing requirement when can meet.
Refer to Fig. 5 C, 5D, it is electric capacity, the voltage variation with temperature figure of two embodiments of a kind of high breakdown voltage MIM capacitor of the present invention.Wherein Fig. 5 C is embodiments of the invention HfO
2+ Al
2o
3~ 800, Fig. 5 D is embodiments of the invention HfO
2+ SiO
2~ 800.By the comparison of Fig. 5 C, 5D, 150 DEG C time, HfO
2+ Al
2o
3the rate of change of capacitance of ~ 800 reaches between 3% ~ 4%, HfO in comparison
2+ SiO
2the rate of change of capacitance of ~ 800 all maintains less than 2%.Learn thus, the embodiment HfO of the structure of Fig. 1
2+ SiO
2~ 800 in the performance of variations in temperature than embodiments of the invention HfO
2+ Al
2o
3~ 800 more stable.
Table one:
| Dielectric material types | Capacitance density (pF/mm 2） | Breakdown voltage (V) |
| Si 3N 4~ 1000 (prior aries) | 580 | 81.5 |
| HfO 2+Al 2O 3~800? | 1673 | 65.1 |
| HfO 2+SiO 2~800? | 1073 | 86.6 |
Refer to table one, wherein list prior art Si
3n
4~ 1000 and two embodiment HfO of the present invention
2+ Al
2o
3~ 800, HfO
2+ SiO
2the capacitance density of ~ 800 and the comparison of breakdown voltage.Wherein prior art Si
3n
4~ 1000 and two embodiment HfO of the present invention
2+ Al
2o
3~ 800, HfO
2+ SiO
2the breakdown voltage of ~ 800 is all greater than the requirement of 50V.And two embodiment HfO of the present invention
2+ Al
2o
3~ 800, HfO
2+ SiO
2the capacitance density of ~ 800 is all much larger than prior art Si
3n
4~ 1000, be therefore better than prior art Si
3n
4the design of ~ 1000.Although embodiments of the invention HfO
2+ Al
2o
3the capacitance density of ~ 800 is greater than embodiments of the invention HfO
2+ SiO
2the capacitance density of ~ 800, but due to HfO
2+ Al
2o
3~ 800 and do not meet time-requirement of dielectric breakdown lifetime test, and HfO
2+ SiO
2the requirement of ~ 800 m-dielectric breakdown lifetime tests when meeting, therefore, the embodiment HfO of the structure of Fig. 1
2+ SiO
2~ 800 is preferably embodiment, is also much better than prior art Si
3n
4the design of ~ 1000.
Refer to Fig. 2, its another specific embodiment being a kind of high breakdown voltage MIM capacitor of the present invention, be applied to power composite integrated semiconductor road, comprise: substrate 20, separator 21, the first metal layer 22, dielectric materials layer 23, adhesive layer 24 and one second metal level 25.
The material forming substrate 20 is generally GaAs (GaAs), indium phosphide (InP), gallium nitride (GaN) or carborundum (SiC).Separator 21 is formed on substrate 20; The material forming separator 21 is generally (Si
3n
4) or silicon dioxide (SiO
2).The first metal layer 22 is formed on separator 21; The material forming the first metal layer 22 is generally gold (Au).Dielectric materials layer 23 is formed at the first metal layer 12.Adhesive layer 24 is formed on dielectric materials layer 23; The material forming adhesive layer 24 is generally titanium (Ti).The second metal level 25 is formed on adhesive layer 24; The material forming the second metal level 25 is generally gold (Au).
Refer to Fig. 2, and please refer to Fig. 2 A, 2B, 2C, be the specific embodiment of the structure of the dielectric materials layer of a kind of high breakdown voltage MIM capacitor of the present invention, wherein dielectric materials layer 23 is by plural layer hafnium oxide (HfO
2) layer 231 and plural layer interval dielectric layer 232 are alternately stacking forms.Wherein interval dielectric layer 232 can be a silicon dioxide (SiO
2) layer or an aluminium oxide (Al
2o
3) layer.
In one embodiment, plural layer interval dielectric layer 232 includes at least one silicon dioxide (SiO
2) layer and at least one aluminium oxide (Al
2o
3) layer.
In the embodiment of fig. 2, bottom one deck of dielectric materials layer 23 is hafnium oxide (HfO
2) layer 231; And the top one deck of dielectric materials layer 23 is also hafnium oxide (HfO
2) layer 231.
In the embodiment of Fig. 2 A, bottom one deck of dielectric materials layer 23 is interval dielectric layer 232; And the top one deck of dielectric materials layer 23 is hafnium oxide (HfO
2) layer 231.
In the embodiment of Fig. 2 B, bottom one deck of dielectric materials layer 23 is hafnium oxide (HfO
2) layer 231; And the top one deck of dielectric materials layer 23 is interval dielectric layer 232.
In the embodiment of Fig. 2 C, bottom one deck of dielectric materials layer 23 is interval dielectric layer 232; And the top one deck of dielectric materials layer 23 is also interval dielectric layer 232.
In the embodiment of Fig. 2,2A, 2B, 2C, every one deck hafnium oxide (HfO
2) thickness of layer 231 is greater than 30 and is less than 100, under such thickness, every one deck hafnium oxide (HfO
2) layer 231 all can maintain preferably lattice state, this contributes to reducing leakage current, reduces the withstand voltage that leakage current then contributes to improving capacitor, allows the breakdown voltage of capacitor raise.
But as the hafnium oxide (HfO of every one deck
2) thickness of layer 231 is when being greater than 100, now the state of lattice more not easily maintains, and causes the increase of leakage current on the contrary and reduces breakdown voltage, and this can affect the characteristic of product.In order to make every one deck hafnium oxide (HfO
2) layer 231 all can maintain preferably lattice state, can reduce leakage current again simultaneously and improve breakdown voltage, the present invention proposes to allow plural layer hafnium oxide (HfO
2) layer 231 and plural layer interval dielectric layer 232 are alternately stacking and form the design of dielectric materials layer 23, reach required function.
In the embodiment of Fig. 2,2A, 2B, 2C, each interlayer is greater than 5 every the thickness of dielectric layer 232 and is less than 100.Wherein interval dielectric layer 232 can be layer of silicon dioxide (SiO
2) layer or one deck aluminium oxide (Al
2o
3) layer.At every one deck hafnium oxide (HfO
2) on or below layer 231 alternately stacking one deck by aluminium oxide (Al
2o
3) layer or silicon dioxide (SiO
2) the interval dielectric layer 232 that forms of layer, enablely can make every one deck hafnium oxide (HfO
2) layer 231 all can maintain preferably lattice state, and by aluminium oxide (Al
2o
3) layer or silicon dioxide (SiO
2) the interval dielectric layer 232 that forms of layer can show to land and help to improve the breakdown voltage of capacitor.
And as plural layer hafnium oxide (HfO
2) layer 231 with plural layer by aluminium oxide (Al
2o
3) layer or silicon dioxide (SiO
2) thickness of the interval dielectric layer 232 that forms of layer alternately stacking dielectric materials layer 23 is when being greater than 500, the breakdown voltage of capacitor will be increased to more than 50V, also possess high capacitance density simultaneously.Therefore, by plural layer hafnium oxide (HfO
2) layer 231 with plural layer by aluminium oxide (Al
2o
3) layer or silicon dioxide (SiO
2) the interval dielectric layer 232 that forms of layer is alternately stacking and form the design of dielectric materials layer 23, effectively can reduce leakage current and improve breakdown voltage and possess high capacitance density simultaneously.
In a preferred embodiment, the thickness of dielectric materials layer 23 is greater than 500 and is less than 1000.
In another preferred embodiment, plural layer hafnium oxide (HfO
2) gross thickness of layer 231 is greater than 450 and is less than 800.
In a preferred embodiment, the gross thickness of plural layer interval dielectric layer 232 is greater than 50 and is less than 300.
In another preferred embodiment, the ratio that the gross thickness of plural layer interval dielectric layer 232 accounts for the thickness of dielectric materials layer 23 is greater than 5% and is less than 35%.
Refer to Fig. 3, its another specific embodiment being a kind of high breakdown voltage of the present invention MIM capacitor, be applied to power composite integrated semiconductor road, comprise: substrate 30, separator 31, the first metal layer 32, dielectric materials layer 33, adhesive layer 34 and one second metal level 35.
The material forming substrate 30 is generally GaAs (GaAs), indium phosphide (InP), gallium nitride (GaN) or carborundum (SiC).Separator 31 is formed on substrate 30; The material forming separator 31 is generally (Si
3n
4) or silicon dioxide (SiO
2).The first metal layer 32 is formed on separator 31; The material forming the first metal layer 32 is generally gold (Au).Dielectric materials layer 33 is formed at the first metal layer 32.Adhesive layer 34 is formed on dielectric materials layer 33; The material forming adhesive layer 34 is generally titanium (Ti).The second metal level 35 is formed on adhesive layer 34; The material forming the second metal level 35 is generally gold (Au).
Refer to Fig. 3, and please refer to Fig. 3 A, 3B, 3C, be the specific embodiment of the structure of the dielectric materials layer of a kind of high breakdown voltage MIM capacitor of the present invention, wherein dielectric materials layer 33 is by plural layer zirconium dioxide (ZrO
2) layer 331 and plural layer interval dielectric layer 332 are alternately stacking forms.Wherein interval dielectric layer 332 can be a silicon dioxide (SiO
2) layer or an aluminium oxide (Al
2o
3) layer.
In one embodiment, plural layer interval dielectric layer 332 includes at least one silicon dioxide (SiO
2) layer.
In the embodiments of figure 3, bottom one deck of dielectric materials layer 33 is zirconium dioxide (ZrO
2) layer 331; And the top one deck of dielectric materials layer 33 is also zirconium dioxide (ZrO
2) layer 331.
In the embodiment in fig. 3 a, bottom one deck of dielectric materials layer 33 is interval dielectric layer 332; And the top one deck of dielectric materials layer 33 is zirconium dioxide (ZrO
2) layer 331.
In the embodiment of Fig. 3 B, bottom one deck of dielectric materials layer 33 is zirconium dioxide (ZrO
2) layer 331; And the top one deck of dielectric materials layer 33 is interval dielectric layer 332.
In the embodiment of Fig. 3 C, bottom one deck of dielectric materials layer 33 is interval dielectric layer 332; And the top one deck of dielectric materials layer 33 is also interval dielectric layer 332.
In the embodiment of Fig. 3,3A, 3B, 3C, every one deck zirconium dioxide (ZrO
2) thickness of layer 331 is greater than 30 and is less than 100.Zirconium dioxide (ZrO
2) and hafnium oxide (HfO
2) there is similar characteristic, under such thickness, every one deck zirconium dioxide (ZrO
2) layer 331 all can maintain preferably lattice state, this contributes to reducing leakage current, reduces the withstand voltage that leakage current then contributes to improving capacitor, allows the breakdown voltage of capacitor raise.
But as the zirconium dioxide (ZrO of every one deck
2) thickness of layer 331 is when being greater than 100, now the state of lattice more not easily maintains, and causes the increase of leakage current on the contrary and reduces breakdown voltage, and this can affect the characteristic of product.In order to make every one deck zirconium dioxide (ZrO
2) layer 331 all can maintain preferably lattice state, can reduce leakage current again simultaneously and improve breakdown voltage, the present invention proposes to allow plural layer zirconium dioxide (ZrO
2) layer 331 and plural layer interval dielectric layer 332 are alternately stacking and form the design of dielectric materials layer 33, reach required function.
In the embodiment of Fig. 3,3A, 3B, 3C figure, each interlayer is greater than 5 every the thickness of dielectric layer 332 and is less than 100.Wherein interval dielectric layer 332 can be layer of silicon dioxide (SiO
2) layer or one deck aluminium oxide (Al
2o
3) layer.At every one deck zirconium dioxide (ZrO
2) on or below layer 331 alternately stacking one deck by aluminium oxide (Al
2o
3) layer or silicon dioxide (SiO
2) the interval dielectric layer 332 that forms of layer, enablely can make every one deck zirconium dioxide (ZrO
2) layer 331 all can maintain preferably lattice state, and by aluminium oxide (Al
2o
3) layer or silicon dioxide (SiO
2) the interval dielectric layer 332 that forms of layer can show to land and help to improve the breakdown voltage of capacitor.
And as plural layer zirconium dioxide (ZrO
2) layer 331 with plural layer by aluminium oxide (Al
2o
3) layer or silicon dioxide (SiO
2) thickness of the interval dielectric layer 332 that forms of layer alternately stacking dielectric materials layer 33 is when being greater than 500, the breakdown voltage of capacitor will be increased to more than 50V, also possess high capacitance density simultaneously.Therefore, by plural layer zirconium dioxide (ZrO
2) layer 331 with plural layer by aluminium oxide (Al
2o
3) layer or silicon dioxide (SiO
2) the interval dielectric layer 332 that forms of layer is alternately stacking and form the design of dielectric materials layer 33, effectively can reduce leakage current and improve breakdown voltage and possess high capacitance density simultaneously.
In a preferred embodiment, the thickness of dielectric materials layer 33 is greater than 500 and is less than 1000.
In another preferred embodiment, plural layer zirconium dioxide (ZrO
2) gross thickness of layer 331 is greater than 450 and is less than 800.
In a preferred embodiment, the gross thickness of plural layer interval dielectric layer 332 is greater than 50 and is less than 300.
In another preferred embodiment, the ratio that the gross thickness of plural layer interval dielectric layer 332 accounts for the thickness of dielectric materials layer 33 is greater than 5% and is less than 35%.
The above technological means being specific embodiments of the invention and using, can derive according to exposure herein or instruction and derive many changes and correction, still can be considered that the equivalence that conception of the present invention is done changes, its effect produced does not exceed the connotation that specification and accompanying drawing are contained yet, all should be considered as, within technology category of the present invention, closing first Chen Ming.
In sum, according to content disclosed above, the present invention really can reach the expection object of invention, provides a kind of high breakdown voltage MIM capacitor being applied to power composite integrated semiconductor road, has the value that industry utilizes.
Claims (18)
1. a high breakdown voltage MIM capacitor, is applied to power composite integrated semiconductor road, and its feature comprises:
One substrate;
One separator, is formed on this substrate;
One the first metal layer, is formed on this separator;
One dielectric materials layer, is formed on this first metal layer, and wherein this dielectric materials layer replaces stacking forming by plural layer hafnium oxide layer and plural layer silicon dioxide layer;
One adhesive layer, is formed on this dielectric materials layer; And
One second metal level, is formed on this adhesive layer;
Wherein the thickness of every one deck of this plural layer hafnium oxide layer is greater than 30 and is less than 100, makes the reduction of the leakage current of the hafnium oxide of every one deck of this plural layer hafnium oxide layer and breakdown voltage improve and possess high capacitance density simultaneously whereby;
And be greater than 500 by the thickness of alternately stacking this dielectric materials layer of this plural layer hafnium oxide layer and this plural layer silicon dioxide layer, make the breakdown voltage of this high breakdown voltage MIM capacitor be increased to more than 50V whereby.
2. high breakdown voltage MIM capacitor according to claim 1, is characterized in that: the thickness of this dielectric materials layer is greater than 500 and is less than 1000.
3. high breakdown voltage MIM capacitor according to claim 1, is characterized in that: the thickness of every one deck of this plural layer silicon dioxide layer is greater than 5 and is less than 50.
4. high breakdown voltage MIM capacitor according to claim 1, is characterized in that: the gross thickness of this plural layer hafnium oxide layer is greater than 450 and is less than 800.
5. high breakdown voltage MIM capacitor according to claim 1, is characterized in that: the gross thickness of this plural layer silicon dioxide layer is greater than 50 and is less than 200.
6. high breakdown voltage MIM capacitor according to claim 1, is characterized in that: the ratio that the gross thickness of this plural layer silicon dioxide layer accounts for the thickness of this dielectric materials layer is greater than 5% and is less than 25%.
7. a high breakdown voltage MIM capacitor, is applied to power composite integrated semiconductor road, and its feature comprises:
One substrate;
One separator, is formed on this substrate;
One the first metal layer, is formed on this separator;
One dielectric materials layer, is formed on this first metal layer, and wherein this dielectric materials layer replaces stacking forming by plural layer hafnium oxide layer and plural layer interval dielectric layer;
One adhesive layer, is formed on this dielectric materials layer; And
One second metal level, is formed on this adhesive layer;
Wherein every one deck of this plural layer interval dielectric layer is a silicon dioxide layer or an alumina layer, and wherein this plural layer interval dielectric layer comprises at least one silicon dioxide layer and at least one alumina layer;
And wherein the thickness of every one deck of this plural layer hafnium oxide layer is greater than 30 and is less than 100, the reduction of the leakage current of the hafnium oxide of every one deck of this plural layer hafnium oxide layer and breakdown voltage is made to improve and possess high capacitance density simultaneously whereby;
And be greater than 500 by the thickness of alternately stacking this dielectric materials layer of this plural layer hafnium oxide layer and this plural layer interval dielectric layer, make the breakdown voltage of this high breakdown voltage MIM capacitor be increased to more than 50V whereby.
8. high breakdown voltage MIM capacitor according to claim 7, is characterized in that: the thickness of this dielectric materials layer is greater than 500 and is less than 1000.
9. high breakdown voltage MIM capacitor according to claim 7, is characterized in that: the thickness of every one deck of this plural layer interval dielectric layer is greater than 5 and is less than 100.
10. high breakdown voltage MIM capacitor according to claim 7, is characterized in that: the gross thickness of this plural layer hafnium oxide layer is greater than 450 and is less than 800.
11. high breakdown voltage MIM capacitors according to claim 7, is characterized in that: the gross thickness of this plural layer interval dielectric layer is greater than 50 and is less than 300.
12. high breakdown voltage MIM capacitors according to claim 7, is characterized in that: the ratio that the gross thickness of this plural layer interval dielectric layer accounts for the thickness of this dielectric materials layer is greater than 5% and is less than 35%.
13. 1 kinds of high breakdown voltage MIM capacitors, are applied to power composite integrated semiconductor road, and its feature comprises:
One substrate;
One separator, is formed on this substrate;
One the first metal layer, is formed on this separator;
One dielectric materials layer, is formed on this first metal layer, and wherein this dielectric materials layer replaces stacking forming by plural layer titanium dioxide zirconium layer and plural layer interval dielectric layer;
One adhesive layer, is formed on this dielectric materials layer; And
One second metal level, is formed on this adhesive layer;
Wherein every one deck of this plural layer interval dielectric layer is a silicon dioxide layer or an alumina layer, and wherein this plural layer interval dielectric layer at least comprises a silicon dioxide layer;
And wherein the thickness of every one deck of this plural layer titanium dioxide zirconium layer is greater than 30 and is less than 100, the reduction of the leakage current of the zirconium dioxide of every one deck of this plural layer titanium dioxide zirconium layer and breakdown voltage is made to improve and possess high capacitance density simultaneously whereby;
And be greater than 500 by the thickness of alternately stacking this dielectric materials layer of this plural layer titanium dioxide zirconium layer and this plural layer interval dielectric layer, make the breakdown voltage of this high breakdown voltage MIM capacitor be increased to more than 50V whereby.
14. high breakdown voltage MIM capacitors according to claim 13, is characterized in that: the thickness of this dielectric materials layer is greater than 500 and is less than 1000.
15. high breakdown voltage MIM capacitors according to claim 13, is characterized in that: the thickness of every one deck of this plural layer interval dielectric layer is greater than 5 and is less than 100.
16. high breakdown voltage MIM capacitors according to claim 13, is characterized in that: the gross thickness of this plural layer titanium dioxide zirconium layer is greater than 450 and is less than 800.
17. high breakdown voltage MIM capacitors according to claim 13, is characterized in that: the gross thickness of this plural layer interval dielectric layer is greater than 50 and is less than 300.
18. high breakdown voltage MIM capacitors according to claim 13, is characterized in that: the ratio that the gross thickness of this plural layer interval dielectric layer accounts for the thickness of this dielectric materials layer is greater than 5% and is less than 35%.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5742471A (en) * | 1996-11-25 | 1998-04-21 | The Regents Of The University Of California | Nanostructure multilayer dielectric materials for capacitors and insulators |
| CN101118903A (en) * | 2006-08-03 | 2008-02-06 | 索尼株式会社 | Capacitor, method of producing the same, semiconductor device, and liquid crystal display device |
| CN101271841A (en) * | 2007-03-23 | 2008-09-24 | 海力士半导体有限公司 | Method of manufacturing semiconductor device |
| US20100091428A1 (en) * | 2008-10-13 | 2010-04-15 | Kwan-Soo Kim | Insulator, capacitor with the same and fabrication method thereof, and method for fabricating semionductor device |
| US20100164064A1 (en) * | 2008-12-31 | 2010-07-01 | Hyun Dong Kim | Capacitor and Method for Manufacturing the Same |
-
2014
- 2014-05-06 CN CN201410187531.6A patent/CN105097959B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5742471A (en) * | 1996-11-25 | 1998-04-21 | The Regents Of The University Of California | Nanostructure multilayer dielectric materials for capacitors and insulators |
| CN101118903A (en) * | 2006-08-03 | 2008-02-06 | 索尼株式会社 | Capacitor, method of producing the same, semiconductor device, and liquid crystal display device |
| CN101271841A (en) * | 2007-03-23 | 2008-09-24 | 海力士半导体有限公司 | Method of manufacturing semiconductor device |
| US20100091428A1 (en) * | 2008-10-13 | 2010-04-15 | Kwan-Soo Kim | Insulator, capacitor with the same and fabrication method thereof, and method for fabricating semionductor device |
| US20100164064A1 (en) * | 2008-12-31 | 2010-07-01 | Hyun Dong Kim | Capacitor and Method for Manufacturing the Same |
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