CN105095723A - Examination identity authentication system applied to big-data iris recognition - Google Patents

Abstract

The invention discloses an examination identity authentication system applied to big-data iris recognition and belongs to hardware structures of examinee examination authentication systems in the technical field of identity authentication. The system comprises a verification table and a release apparatus which are arranged at an entrance of an examination room, wherein an iris acquirer, a fingerprint recognition apparatus and an RFID reader are arranged on the verification table; an AD converter, a digital signal processing chip, a data memory and an ARM processor are arranged in the verification table; the iris acquirer is connected with the AD converter; the AD converter, the data memory, the fingerprint recognition apparatus, the RFID reader and the release apparatus are connected with a digital signal processing chip; and iris image information acquired by the iris acquirer is converted to a digital image through the AD converter, then the digital image is input into the digital signal processing chip together with fingerprint information acquired by the fingerprint recognition apparatus and examinee identity information read by the RFID reader, and a processed signal is input into the ARM processor for controlling an on or off state of the release apparatus.

Description

Be applied to large data iris recognition examination identity authorization system

Technical field

The invention belongs to identity identifying technology field, relate to a kind of examinee and to take an examination the hardware configuration of Verification System, particularly relate to a kind of hardware configuration being applied to large data iris recognition examination identity authorization system.

Background technology

Along with the scale of various examination and quantity increase year by year, although examination management mechanism takes many kinds of measures and prevents, still effectively can not stop phenomenon of praticing fraud, also frequently act as fraudulent substitute for a person simultaneously, impersonate phenomenon generations such as praticing fraud, the justice of grievous injury examination, just, encroach on examinee's interests, upset civil order.In current all kinds of examination, examinee's standard is investigated into examination hall, and whether examinee's photo that monitoring teacher can only be judged on admission card for entrance examination by naked eyes is consistent, cannot ensure to find the examinee's admission acted as fraudulent substitute for a person.But along with the development of cheating technology, the pseudo-technology for making of examinee's identity is also more and more advanced, and praticing fraud is a kind of conventional means that examinee practises fraud.Differentiate the authenticity of examinee's identity, become a large difficult point of current test management work.If cannot effectively differentiate examinee's identity before examination, will affect the authenticity of the result of examination, fairness and achievement, must cause the unfairness of examination and selection of talented people, therefore modern examination is in the urgent need to fundamentally containing the generation of phenomenon of praticing fraud.

For solving the problem that impersonates of taking an examination, in present examination, adopting the authentication mode of recognition of face+admission card for entrance examination, carrying out the relevant informations such as personal information, face template information, admission card for entrance examination number each examinee enters oneself for the examination registration during on the net and registering.The patent of invention being 201210541132.6 as application number discloses a kind of examination identity authorization system based on recognition of face and certification thereof, and this examination identity authorization system comprises the personal information acquisition system and personal information identifying system that are connected by internet; Personal information acquisition system comprises: camera, and the personal computer be connected with camera circuit, and personal computer connects personal information identifying system by internet; Personal information identifying system comprises: management platform, and it connects personal computer by internet; Server switch, identified server and database server, management platform is connected with database server by server switch with identified server; Terminaling exchange, it is by internet connection server switch; Handheld terminal, its wireless connections terminal switch.This application for a patent for invention is by the face information of camera collection examinee, and identified by the face information of personal information identifying system to examinee, but adopt the mode of recognition of face to carry out identifying that examinee compares and directly check that the effect of examinee is obvious not with supervisor, and adopt recognition of face examination identity authorization system structure comparatively complicated, volume is comparatively large, is not easy to carry and carry.

Summary of the invention

For solving the problems of the technologies described above, the object of the present invention is to provide a kind of hardware configuration being applied to large data iris recognition examination identity authorization system.

For achieving the above object, technical scheme of the present invention is:

One is applied to large data iris recognition examination identity authorization system, it is characterized in that: comprise the checking platform and clearance device that are arranged on examination hall entrance, described checking platform table top is provided with iris capturing device, fingerprint identification device and RFID reader, described checking platform inside is provided with AD converter, digital signal processing chip, data-carrier store and arm processor, described iris capturing device is connected with AD converter, and described AD converter, data-carrier store, fingerprint identification device, RFID reader are all connected with described digital signal processing chip with clearance device; The iris image information of described iris capturing device collection converts to after digital picture through AD converter and processes together with examinee's ID (identity number) card information of the finger print information of fingerprint identification device collection, RFID reader reading in the lump supplied with digital signal process chip, and the signal input arm processor after process is controlled unlatching or the closedown of clearance device.

When the present invention works, iris capturing device is for gathering the iris image information of candidate and the internal conversion of this iris image information input AD converter being become digital picture, all send in digital signal processing chip in synchronous serial communication mode and process together with the finger print information of fingerprint identification device collection, examinee's ID (identity number) card information of RFID reader reading, and the signal after process is inputted arm processor and controls unlatching or the closedown of clearance device.

Further, described iris capturing device is IRISPASS, BM-ET300 or BM-ET500, and the camera lens front end of described iris capturing device is provided with IR cut filter device.

Further, the model that described AD converter selects AD company to produce is the AD converter of AD7705.

Further, the model that described digital signal processing chip selects TI company to produce is the digital signal processing chip of TMS320VC5402.

Further, described clearance device comprises base plate, the middle part of base plate is provided with support column, support column is fixedly connected with base plate, base plate both sides are respectively arranged with arc-shaped guardrail, and support column top is provided with cant beam, and cant beam is connected with pipe, pipe suit on the support columns, is provided with single direction turning mechanism between described support column and pipe; Described single direction turning mechanism comprises the ratchet be fixedly connected with support column and the ratchet be connected with ratchet, ratchet is connected with swivel arm, swivel arm one end is fixedly connected with pipe with the rotation axis chain connection other end arranged on the support columns, and circular tube external wall is along the circumferential direction separated by 120 degree and is provided with rotating beam; Support column bottom is provided with fixed beam, and fixed beam is connected with stationary pipes, and stationary pipes suit on the support columns; Support column bottom is provided with through hole, and stationary pipes is provided with connecting hole, and through hole is corresponding with the position of connecting hole, and stationary pipes is connected with support column with wing nut by bolt.

Further, described rotating beam is made up of upper rotating beam and lower rotating beam, and the length of lower rotating beam is 2/3rds of upper rotating beam, is provided with tie-beam between the end of lower rotating beam and upper rotating beam.

Further, described fingerprint identification device comprises prism, frame assembly, lens combination, cmos image sensor, light source; Described prism, light source, lens combination, cmos image sensor are placed in frame assembly successively.

Further, described prism waits girdle prism, and two isogonism angles are 50 degree.

Further, described RFID reader comprises radio-frequency (RF) front-end circuit and central processing unit, and described radio-frequency (RF) front-end circuit comprises radiofrequency signal transmission circuit, rf signal reception circuit, emission of radio frequency signals circuit and frequency synthesizer;

Described radiofrequency signal transmission circuit comprises dual-mode antenna, antenna change-over switch and circulator; Described emission of radio frequency signals circuit comprises DAC-circuit, frequency mixer and preposition pre-arcing road; Described rf signal reception circuit comprises adc circuit, frequency mixer and low-noise amplification circuit;

Described circulator is connected with low-noise amplification circuit with preposition pre-arcing road simultaneously; Low-noise amplification circuit is connected with the radio frequency reception channel of central processing unit after adc circuit through frequency mixer, and the radio frequency transmitting channel of central processing unit is connected with preposition pre-arcing road after frequency mixer through DAC-circuit; Described frequency synthesizer is connected with the frequency mixer in emission of radio frequency signals circuit with rf signal reception circuit after discharge circuit simultaneously.

Compared with prior art, beneficial effect of the present invention is:

1, in the present invention, this examinee Verification System of taking an examination is arranged on porch, examination hall, it comprises iris capturing device, AD converter, digital signal processing chip, data-carrier store, arm processor, RFID reader, clearance device and fingerprint identification device, one-piece construction is simple, small volume, be easy to carry and carry, being applicable to the places such as examination hall.

2, in the present invention, iris capturing device is IRISPASS, BM-ET300 or BM-ET500, and the camera lens front end of described iris capturing device is provided with IR cut filter device, can be used for elimination infrared light by this IR cut filter device and gather iris coloured image.

3, in the present invention, the model that AD converter selects AD company to produce is the AD converter of AD7705, the more weak input signal that iris capturing device can collect by this AD7705AD converter is directly changed into serial array signal and exports, without the need to external meters amplifier, can the complicacy of cost-saving, reduced volume, reduction system further.

4, in the present invention, the model that digital signal processing chip selects TI company to produce is the digital signal processing chip of TMS320VC5402, this TMS320VC5402 digital signal processing chip adopts the Harvard structure improved, and On-Chip peripheral comprises multichannel buffered serial port, 8bit main frame and 16bit timer, separately be equipped with powerful order set, make this chip have very high processing speed.

5, in the present invention, although clearance device is unilateral gate, still can opposing traffic, by adjusting the position of fixed beam, fixed beam is revolved turnback, can only examination hall be entered by rotary door entering examination hall time period examinee, go out examination hall by rotary door intelligence going out examination hall time period examinee.

6, in the present invention, by prism to the refraction of light and reflex, fingerprint image is imaged onto on cmos image sensor through lens combination, thus carries out fingerprint recognition.

7, in the present invention, this RFID reader structure is simple, and be integrated in central processing unit by modulates baseband signals demodulator circuit, thus simplify the radio-frequency (RF) front-end circuit structure in RFID reader, and the antijamming capability of reader is reduced, stability is better; Central processing unit adopts fpga chip, with low cost, improves stability further, and programmability is stronger, is more convenient for by Integrated Simulation in chip, and by software function replacement circuit module, thus make stability better, circuit structure is simpler.

Accompanying drawing explanation

Fig. 1 is process flow diagram of the present invention;

Fig. 2 is data-carrier store data reading circuit figure in the present invention;

Fig. 3 is the front view of device of letting pass in the present invention;

Fig. 4 is the vertical view of device of letting pass in the present invention;

Fig. 5 is the structural representation of single direction turning mechanism of device of letting pass in the present invention;

Fig. 6 is the structural representation of fingerprint identification device in the present invention;

Fig. 7 is the index path of fingerprint identification device in the present invention;

Fig. 8 is the circuit structure block diagram of RFID reader in the present invention;

Fig. 9 is the structural representation sketch verifying platform in the present invention;

Wherein, Reference numeral is: 3-digital signal processing chip, 4-data-carrier store, 5-clearance device, 6-fingerprint identification device, 7-checking platform, 8-RFID reader, 10-iris capturing device, 11-AD converter, 12-arm processor, 51-base plate, 52-support column, 53-arc-shaped guardrail, 54-cant beam, 55-pipe, 56-ratchet, 57-ratchet, 58-swivel arm, 59-rotation axis, 510-rotating beam, 511-fixed beam, 512-stationary pipes, 61-prism, 62-frame assembly, 63-lens combination, 64-cmos image sensor, 65-light source, (611, 612, 613)-face, 71-cover body.

Embodiment

Below in conjunction with accompanying drawing, the present invention will be further described:

Embodiment one

One is applied to large data iris recognition examination identity authorization system, this hardware configuration is installed on porch, examination hall, it comprises the checking platform 7 and clearance device 5 that are arranged on examination hall entrance, this checking platform 7 table top is provided with iris capturing device 10, fingerprint identification device 6 and RFID reader 8, and this checking platform 1 inside is provided with AD converter 11, digital signal processing chip 3, data-carrier store 4 and arm processor 12.Iris capturing device 10 is connected with AD converter 11, and iris image information input AD converter 11 internal conversion that iris capturing device 10 collects is digital picture.AD converter 11, fingerprint identification device 6 are all connected with digital signal processing chip 3 with RFID reader 8, this fingerprint identification device 6 is for gathering the finger print information of examinee, this RFID reader 8 is for gathering the ID (identity number) card information of examinee, when examinee enters examination hall, need by its I.D. in the enterprising line scanning identification of RFID reader 8.Examinee's ID (identity number) card information of finger print information and RFID reader 8 collection that the digital picture after AD converter 11 is changed gathers examinee together with fingerprint identification device 6 all transfers to digital signal processing chip 3 in the lump and carries out analyzing, processing and comparison.Digital signal processing chip 3 is connected with arm processor 12, and the result of image procossing and discriminance analysis process is conveyed into arm processor 12 by digital signal processing chip 3 carries out controlling and manages.Arm processor 12 is connected with clearance device 5, and arm processor 12 produces corresponding control signal according to iris image information and controls unlatching or the closedown of clearance device 5.In addition, digital signal processing chip 3 is also connected with data-carrier store 4, the intermediate data of this data-carrier store 4 for producing in authentication storage system implementation.As preferably, checking platform 7 is also provided with cover body 71, effectively can reduces by this cover body 71 impact that when iris capturing device 10 gathers iris image, extraneous light causes.

During work, iris capturing device 10 for gather candidate iris image information and by this iris image information, and the finger print information gathering examinee together with fingerprint identification device 6 inputs AD converter 11 internal conversion in the lump with examinee's ID (identity number) card information that RFID reader 8 gathers becomes digital picture, then process in digital picture supplied with digital signal process chip 3, and the signal after process is inputted arm processor 12 and controls unlatching or the closedown of clearance device 5.

Embodiment two

On the basis of embodiment one, described iris capturing device 10 is IRISPASS, BM-ET300 or BM-ET500, and the camera lens front end of described iris capturing device 10 is provided with IR cut filter device.Can be used for elimination infrared light by this IR cut filter device and gather iris coloured image.

Embodiment three

On the basis of embodiment one or embodiment two, the model that described AD converter 11 selects AD company to produce is the AD converter 11 of AD7705.AD7705 is the AD converter being applicable to low frequency measurement instrument of AD Company.The more weak iris image information received from iris capturing device 10 can be directly changed into serial digital signal and export by it, and without the need to external meters amplifier.And this AD7705 achieves 16 superperformances without error code, in sheet, programmable amplifier can arrange input signal gain.By shut-in time and the renewal rate of control register adjustment internal digital wave filter in sheet, first recess of digital filter can be set.When+3V power supply and 1MHz major clock, AD7705 power consumption is only 1mW.AD7705 is the ideal circuit based on microcontroller (MCU), digital signal processor (DSP) system, can save the complicacy of cost, reduced volume, reduction system further.Be applied to microprocessor (MCU), digital signal processing (DSP) system, handheld instrument, distributed data acquisition system.

Embodiment four

On the basis of above-described embodiment, the model that described digital signal processing chip 3 selects TI company to produce is the digital signal processing chip 3 of TMS320VC5402.The digital signal processing chip 3 of this TMS320VC5402 is a kind of 16bit high speed and fixed-point low-power consumption dsp chip, it adopts the Harvard structure improved, program is separated with data and is deposited, and there is the bus of 8 massive parallelisms inside, and integrated chip has abundant on-chip memory resource.On-Chip peripheral comprises multichannel buffered serial port (McBSP), 8bit main frame (HPI) and 16bit timer; The CPU structure optimized, comprises the logical block of 40bit arithmetic logical unit (ALU), 17bit × 17bit parallel multiplier and applicable digital signal processing algorithm; Separately be equipped with powerful order set, make this chip have very high processing speed.In addition, this chip adopts dual power supply mechanism, i.e. core power and I/0 power supply two parts, and wherein core power adopts 1.8V, effectively can reduce chip power-consumption; I/0 power acquisition 3.3V, dsp chip can direct and outer low pressure device interface without the need to extra level shifting circuit.

Embodiment five

On the basis of above-described embodiment, this data-carrier store 4 comprises many wordline; Organize bit line more; Multiple storage unit, arranges in a matrix fashion, and wherein each storage unit can by this wordline of correspondence and this corresponding group bit line access data; Multiple amplifier couples describedly organizes bit line more, in order to read and data in amplifying and storage unit; Multiple diode, couples and described organizes bit line more; And a voltage source, carry out pre-charged through group bit lines many described in described diode pair.Amplifier has two input ends, couples the first bit line BL and the second bit line BL respectively.First switch couples the first bit line BL, and second switch couples the second bit line BL.Diode formed by a nmos pass transistor, and the grid drain electrode of this nmos pass transistor couples, in order to form the diode of a PN junction.The source electrode of nmos pass transistor couples voltage source V DD, and its drain electrode couples the first switch and second switch, and utilizes the conducting of the first switch and second switch to make voltage source V DD carry out pre-charged to the first bit line BL and the second bit line BL respectively.The first transistor has one first source electrode, one first drain electrode and a first grid, and wherein this first source electrode couples this first bit line BL, and this first drain electrode couples a data storage element, and this first grid couples a wordline WL.Transistor seconds has one second source electrode, one second drain electrode and a second grid, and wherein this second source electrode couples this second bit line BL, and this second drain electrode couples this data storage element, and this second grid couples this wordline WL.When data storage element is chosen to, wordline WL can transmit a high voltage signal, in order to conducting the first transistor and transistor seconds, the output terminal making the data stored in data storage element be sent to amplifier through the first bit line BL and the second bit line BL exports data.Data storage element more comprises one first phase inverter, and its output terminal couples the first drain electrode of this first transistor, one second phase inverter, and its input end couples the output terminal of this first phase inverter, and its output terminal couples the second drain electrode of this transistor seconds.

Embodiment six

On the basis of above-described embodiment, described clearance device 5 comprises base plate 51, the middle part of base plate 51 is provided with support column 52, support column 52 is fixedly connected with base plate 51, base plate 51 both sides are respectively arranged with arc-shaped guardrail 53, and support column 52 top is provided with cant beam 54, and cant beam 54 is connected with pipe 55, described cant beam 54 is made up of U-shaped pipe, and two free ends of U-shaped pipe weld mutually with pipe 55 outer wall; Pipe 55 is sleeved on support column 52, is provided with single direction turning mechanism between described support column 52 and pipe 52; Described single direction turning mechanism comprises the ratchet 56 be fixedly connected with support column 52 and the ratchet 57 be connected with ratchet 56, ratchet 57 is connected with swivel arm 58, swivel arm 58 one end is fixedly connected with pipe 55 with the rotation axis 59 chain connection other end be arranged on support column 52, and pipe 55 outer wall is along the circumferential direction separated by 120 degree and is provided with rotating beam 510; Described rotating beam 510 is made up of upper rotating beam and lower rotating beam, the length of lower rotating beam is 2/3rds of upper rotating beam, be provided with tie-beam between the end of lower rotating beam and upper rotating beam, save starting material, improve the strength and stiffness of cant beam.Support column 52 bottom is provided with fixed beam 511, and fixed beam 511 is connected with stationary pipes 512, and stationary pipes 512 is sleeved on support column 52; Support column 52 bottom is provided with through hole, and described through hole is at least 2; Stationary pipes 512 is provided with connecting hole, and described connecting hole is at least 2; Through hole is corresponding with the position of connecting hole, and stationary pipes 512 is connected with support column 52 with wing nut by bolt 513.

Embodiment seven

On the basis of above-described embodiment, this fingerprint identification device comprises prism 61, frame assembly 62, lens combination 63, cmos image sensor 64, light source 65; Prism 61 is for waiting girdle prism, and two isogonism angles are 50 degree; Prism 61, light source 65, lens combination 63, cmos image sensor 64 are placed in frame assembly 62 successively.Light source 55 is positioned at 611 of prism 61, by tested finger by 613 of prism 61, because finger print is raised in finger surface, 613 close contacts of fingerprint and prism 61, destroy the condition of total reflection, a part of incident light will be lost by finger, remaining portion's dichroic reflection, go out from 612 transmissions of prism 61, the photoimaging of point reflection each on fingerprint on cmos image sensor 64, and is shown as the low light level by lens combination 63.And the recess between fingerprint projection, its refractive index is less, incident light can be totally reflected herein, so each point of recess is shown as high light on cmos image sensor 64, like this, from the tested finger surface that cmos image sensor 64 shows, the power of each point reflected light, just can obtain fingerprint lines clearly.

Because finger print imaging in prism 61 is the virtual image, the plane at its place and optical axis are off plumbs, after scioptics group 63 imaging also with optical axis out of plumb, by cmos image sensor 64 slant setting, and be adjusted to the target surface of cmos image sensor 64 and image planes coincide, reduce distortion, image is more clear.

Embodiment eight

On the basis of above-described embodiment, this RFID reader 8 comprises radio-frequency (RF) front-end circuit and central processing unit, and described radio-frequency (RF) front-end circuit comprises radiofrequency signal transmission circuit, rf signal reception circuit, emission of radio frequency signals circuit and frequency synthesizer.

Described radiofrequency signal transmission circuit comprises dual-mode antenna, antenna change-over switch and circulator; Described emission of radio frequency signals circuit comprises DAC-circuit (D/A converting circuit), frequency mixer and preposition pre-arcing road (PA); Described rf signal reception circuit comprises adc circuit (analog to digital conversion circuit), frequency mixer and low-noise amplification circuit (LNA).

Described circulator is connected with low-noise amplification circuit with preposition pre-arcing road simultaneously; Low-noise amplification circuit is connected with the radio frequency reception channel of central processing unit after adc circuit through frequency mixer, and the radio frequency transmitting channel of central processing unit is connected with preposition pre-arcing road after frequency mixer through DAC-circuit; Described frequency synthesizer is connected with the frequency mixer in emission of radio frequency signals circuit with rf signal reception circuit after discharge circuit simultaneously.

The principle of work of rf signal reception circuit is that the radiofrequency signal received first is carried out down-converted, the local oscillation signal of 875MHz is produced by frequency synthesizer, then through amplifier, enter the frequency mixer in rf signal reception circuit, carry out down coversion, the radiofrequency signal of 915MHz is obtained after frequency conversion the intermediate-freuqncy signal of 40Mhz, then after simple filtering circuit, adc circuit is sent to, wherein adc circuit comprises ADC conversion chip, this ADC conversion chip adopts the AD9214 chip of analog company, its sampling clock is 80MHz, sampling resolution is 10bit, then the digital signal after AD conversion is input in FPGA.

The principle of work of emission of radio frequency signals circuit is completed in FPGA system inside the modulation /demodulation of baseband signal, then 40MHz intermediate-freuqncy signal is converted to, the digital medium-frequency signal that FPGA produces is sent to DAC-circuit, described DAC-circuit comprises DAC chip, this DAC conversion chip adopts the AD9762 chip of analog company, its change over clock frequency is 125MHz, change figure place into 12bit, the local oscillation signal 875MHz produced with frequency synthesizer in frequency mixer after simple filtering circuit carries out mixing, and then through preposition put in advance after pass the signal on antenna.According to EPCClass1generation2 standard, reader is operated in half duplex communication pattern, and so antenna change-over switch need be controlled by FPGA, carrys out control signal launch and accept according to reiving/transmitting state.

Described central processing unit adopts fpga chip.During concrete enforcement, adopt the acp chip of XC6SLX16-2CSG324FPGA chip as digital baseband modulation /demodulation of XILINX company, it has 14579 LogicCells unit, 136Kbit internal storage unit, 32 DSP48A1 algorithm process unit, this chip all can satisfy the demands from the viewpoint of programmable logic resource, data buffer storage, IP arithmetic element etc.

Described fpga chip has Embeded CPU, radio frequency reception channel and radio frequency transmitting channel; Described radio frequency reception channel comprises the DDC circuit, cic filter, forming filter, FM0/Miller decoder module and the CRC16 correction verification module that are connected successively, described CRC16 correction verification module is connected with embedded type CPU, and described DDC circuit is used for from adc circuit incoming radio frequency signal; Described radio frequency transmitting channel comprises the CRC5/16 correction verification module, PIE coding module, forming filter, UDC circuit and the bandpass filter that are connected successively, embedded type CPU is connected with CRC5/16 correction verification module, and after bandpass filter, radiofrequency signal is sent to adc circuit.

Data are sent in fpga chip by radio frequency reception channel after ADC conversion, and ADC change after data be 40MHz intermediate-freuqncy signal, Digital Up Convert circuit (DDC circuit) carries out a Digital Down Convert again to the 40MHz digital medium-frequency signal collected, digital baseband signal is after Digital Down Convert, then cic filter filtering is carried out, then filtering process is formed to filtered signal, carry out FM0/Miller decoding again, CPU in FPGA sheet can be allowed after CRC16 checking treatment to obtain related data.In FPGA sheet, CPU will send to the data of label, first CRC5/16 coding checkout is carried out, then PIE coding is carried out, the all available HDL language of these coded programs or IP kernel realize, then forming filter is used to carry out waveform filtering shaping, because signal is now also baseband signal, therefore also need to adopt Digital Up Convert circuit (UDC circuit) by the digital intermediate frequency section of modulates baseband signals to 40MHz, eventually pass after bandpass filter carries out filtering to digital medium-frequency signal and send to outside DAC-circuit.

Claims (9)

1. one kind is applied to large data iris recognition examination identity authorization system, it is characterized in that: comprise the checking platform (7) and clearance device (5) that are arranged on examination hall entrance, described checking platform (7) table top is provided with iris capturing device (10), fingerprint identification device (6) and RFID reader (8), described checking platform (7) inside is provided with AD converter (11), digital signal processing chip (3), data-carrier store (4) and arm processor (12), described iris capturing device (10) is connected with AD converter (11), described AD converter (11), data-carrier store (4), fingerprint identification device (6), RFID reader (8) is all connected with described digital signal processing chip (3) with clearance device (5), examinee's ID (identity number) card information that the finger print information that the iris image information that described iris capturing device (10) gathers gathers together with fingerprint identification device (6) after AD converter (11) converts digital picture to, RFID reader (8) read in the lump supplied with digital signal process chip (3) processes, and signal input arm processor (12) after process is controlled unlatching or the closedown of clearance device (5).

2. be applied to large data iris recognition examination identity authorization system as claimed in claim 1, it is characterized in that: described iris capturing device (10) is IRISPASS, BM-ET300 or BM-ET500, and the camera lens front end of described iris capturing device (10) is provided with IR cut filter device.

3. be applied to large data iris recognition examination identity authorization system as claimed in claim 1, it is characterized in that: the model that described AD converter (11) selects AD company to produce is the AD converter (11) of AD7705.

4. be applied to large data iris recognition examination identity authorization system as claimed in claim 1, it is characterized in that: the model that described digital signal processing chip selects TI company to produce is the digital signal processing chip of TMS320VC5402.

5. be applied to large data iris recognition examination identity authorization system as claimed in claim 1, it is characterized in that: described clearance device (5) comprises base plate (51), the middle part of base plate (51) is provided with support column (52), support column (52) is fixedly connected with base plate (51), base plate (51) both sides are respectively arranged with arc-shaped guardrail (53), support column (52) top is provided with cant beam (54), cant beam (54) is connected with pipe (55), pipe (55) is sleeved on support column (52), single direction turning mechanism is provided with between described support column (52) and pipe (55), described single direction turning mechanism comprises the ratchet (56) be fixedly connected with support column (52) and the ratchet (57) be connected with ratchet (56), ratchet (57) is connected with swivel arm (58), swivel arm (58) one end is fixedly connected with pipe (55) with rotation axis (59) the chain connection other end be arranged on support column (52), and pipe (55) outer wall is along the circumferential direction separated by 120 degree and is provided with rotating beam (510), support column (52) bottom is provided with fixed beam (511), and fixed beam (511) is connected with stationary pipes (512), and stationary pipes (512) is sleeved on support column (52), support column (52) bottom is provided with through hole, and stationary pipes (512) is provided with connecting hole, and through hole is corresponding with the position of connecting hole, and stationary pipes (512) is connected with support column (52) with wing nut by bolt (513).

6. be applied to large data iris recognition examination identity authorization system as claimed in claim 5, it is characterized in that: described rotating beam (510) is made up of upper rotating beam and lower rotating beam, the length of lower rotating beam is 2/3rds of upper rotating beam, is provided with tie-beam between the end of lower rotating beam and upper rotating beam.

7. be applied to large data iris recognition examination identity authorization system as claimed in claim 1, it is characterized in that: described fingerprint identification device (6) comprises prism (61), frame assembly (62), lens combination (63), cmos image sensor (64), light source (65); Described prism (61), light source (65), lens combination (63), cmos image sensor (64) are placed in frame assembly (62) successively.

8. be applied to large data iris recognition examination identity authorization system as claimed in claim 7, it is characterized in that: described prism (61) waits girdle prism, and two isogonism angles are 50 degree.

9. be applied to large data iris recognition examination identity authorization system as claimed in claim 1, it is characterized in that: described RFID reader (8) comprises radio-frequency (RF) front-end circuit and central processing unit, described radio-frequency (RF) front-end circuit comprises radiofrequency signal transmission circuit, rf signal reception circuit, emission of radio frequency signals circuit and frequency synthesizer;

Described radiofrequency signal transmission circuit comprises dual-mode antenna, antenna change-over switch and circulator; Described emission of radio frequency signals circuit comprises DAC-circuit, frequency mixer and preposition pre-arcing road; Described rf signal reception circuit comprises adc circuit, frequency mixer and low-noise amplification circuit;

Described circulator is connected with low-noise amplification circuit with preposition pre-arcing road simultaneously; Low-noise amplification circuit is connected with the radio frequency reception channel of central processing unit after adc circuit through frequency mixer, and the radio frequency transmitting channel of central processing unit is connected with preposition pre-arcing road after frequency mixer through DAC-circuit; Described frequency synthesizer is connected with the frequency mixer in emission of radio frequency signals circuit with rf signal reception circuit after discharge circuit simultaneously.