CN105094744A - Variable floating point data microprocessor - Google Patents
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Abstract
The invention discloses a variable floating point data microprocessor. A floating-point number is formed by a symbol domain, an exponent domain, and a mantissa domain. When a program uses custom the floating-point number, a zero custom floating point configuration register, a first custom floating point configuration register, a second custom floating point configuration register, and a third custom floating point configuration register need configuring. Composition sequence of the custom floating point numbers is the composition sequence of the custom floating point configuration registers. The composition sequence of the custom floating point numbers is the third custom floating point configuration register, the second custom floating point configuration register, the first custom floating point configuration register, and the zero custom floating point configuration register. The length of the mantissa domain plus the length of the exponent domain plus the length of the symbol domain equal to the length of floating-point data. Otherwise, anomaly occurs. In a calculation process, sequence and length of a sign bit, an index bit, and a mantissa bit in a floating-point number can be changed, and width of the floating-point number can be changed. The floating-point number has good portability. Floating point data in higher precision can be expressed. The microprocessor has higher security.
Description
Technical field
The present invention relates to a kind of variable floating data microprocessor.
Background technology
In current processor, the floating-point standard of IEEE754 standard that what we generally adopted is, mainly employ single precision floating datum, double-precision floating points, temporary floating point number in the standard, add the expression scope of data to a great extent, use widely so floating number calculates to obtain in engineering calculation, scientific algorithm.
Because floating data relies on the floating point calculating unit of computing machine completely when calculating, but floating number standard in processor system is not identical, such as some processor uses American National floating data standard, and some processor company uses the floating data standard of oneself company, and can only support that in some processor fixed point floating number calculates.Cause many programs of writing for conventional processors can not well be transplanted to other processor platforms, the human cost of transplanting increases greatly.
In some scientific algorithm, need more accurate floating data to calculate, at this moment we need the floating data of more widening, common process applicator platform can not meet this precise requirements, at this moment we only have with software simulation or abandon this processor platform, the mode of software simulation can spend a large amount of processor time, thus causes the efficiency of processor to decline.
Because variable floating data processor can change sign bit in floating number, the order of exponent bits and mantissa position and length in the calculation, also has the width of floating number, if use variable floating data processor, certainly will can carry out the transplanting of floating-point more easily, and there is higher degree of accuracy.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, a kind of novel variable floating data microprocessor is provided, sign bit in floating number, the order of exponent bits and mantissa position and length can be changed, also has the width of floating number, portable good, can represent more high-precision floating data, security is high.
The object of the invention is to be achieved through the following technical solutions: a kind of variable floating data microprocessor, floating number is made up of symbol field, exponent territory, mantissa territory, floating number=sign bit. mantissa × 2
exponent, (2
exponent) represent 2 exponent power, floating number composed as follows:
Symbol field: represent with S, symbol field accounts for 1, and 0 represents positive number, and 1 represents negative;
Exponent territory: represent with E, indicates radix point position in the data with integer form, determines floating-point numerical representation scope, and the exponent territory E of floating number equals exponent e and adds a fixing off-set value, and this off-set value is (2
the bit wide-1 in exponent territory-1);
Mantissa territory: represent with M, represents with fractional fixed point, and the figure place providing significant figure determines floating-point numerical representation precision;
Described variable floating data microprocessor comprises self-defined floating-point configuration register, self-defined floating-point configuration register is made up of data length register, sign bit register, rank, position length register and mantissa's length register, and the composition of self-defined floating number order is exactly self-defined floating-point configuration register configuration composition order, the composition order of self-defined floating number is: self-defined floating-point configuration register 0, self-defined floating-point configuration register 1, self-defined floating-point configuration register 2, self-defined floating-point configuration register 3; Mantissa's length of field adds exponent length of field length of field of putting in marks and equals floating data length, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 0: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 1: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 2: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 3: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
The floating number of five types is defined as follows in self-defined floating number:
(1) when the exponent of exponent territory E is full 0 and the mantissa of mantissa territory M also for full 0 time, sign bit is 0/1, is called positive and negative 0;
(2) when the exponent of exponent territory E is complete 1 and the mantissa of mantissa territory M is full 0, sign bit is 0/1, is called positive minus infinity;
(3) when the exponent of exponent territory E is complete 1 and the mantissa of mantissa territory M is non-zero, sign bit is 0/1, is called illegal floating number;
(4) when the exponent of exponent territory E is arbitrary value and the mantissa of mantissa territory M is full 0, sign bit is 0/1, or when the minimum value that the value of exponent territory E can represent than it is also little, no matter why its mantissa is worth, computing machine all regards null value as this floating number, is called machine zero;
(5) when the exponent of exponent territory E is 1 ~ (2
the bit wide in exponent territory, and when the mantissa of mantissa territory M is arbitrary value, sign bit is 0/1, is called standardizing number-1); When the value of mantissa is not 0, the highest significant position in mantissa territory should be 1, otherwise moves the way of radix point in left and right to revise exponent simultaneously, makes it become this representation, is called that the normalization of floating number represents.
The invention has the beneficial effects as follows: variable floating data processor can change sign bit in floating number, the order of exponent bits and mantissa position and length in computation process, also has the width of floating number, portable good, and more high-precision floating data can be represented, security is also higher.
Embodiment
Technical scheme of the present invention is described in further detail, but protection scope of the present invention is not limited to the following stated below.
A kind of variable floating data microprocessor, floating number is made up of symbol field, exponent territory, mantissa territory, floating number=sign bit. mantissa × 2
exponent, (2
exponent) represent 2 exponent power, floating number composed as follows:
Symbol field: represent with S, symbol field accounts for 1, and 0 represents positive number, and 1 represents negative;
Exponent territory: represent with E, indicates radix point position in the data with integer form, determines floating-point numerical representation scope, and the exponent territory E of floating number equals exponent e and adds a fixing off-set value, and this off-set value is (2
the bit wide-1 in exponent territory-1);
Mantissa territory: represent with M, represents with fractional fixed point, and the figure place providing significant figure determines floating-point numerical representation precision;
Described variable floating data microprocessor comprises self-defined floating-point configuration register, self-defined floating-point configuration register is made up of data length register, sign bit register, rank, position length register and mantissa's length register, and the composition of self-defined floating number order is exactly self-defined floating-point configuration register configuration composition order, the composition order of self-defined floating number is: self-defined floating-point configuration register 0, self-defined floating-point configuration register 1, self-defined floating-point configuration register 2, self-defined floating-point configuration register 3; Mantissa's length of field adds exponent length of field length of field of putting in marks and equals floating data length, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 0: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 1: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 2: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 3: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
The floating number of five types is defined as follows in self-defined floating number:
(1) when the exponent of exponent territory E is full 0 and the mantissa of mantissa territory M also for full 0 time, sign bit is 0/1, is called positive and negative 0;
(2) when the exponent of exponent territory E is complete 1 and the mantissa of mantissa territory M is full 0, sign bit is 0/1, is called positive minus infinity;
(3) when the exponent of exponent territory E is complete 1 and the mantissa of mantissa territory M is non-zero, sign bit is 0/1, is called illegal floating number;
(4) when the exponent of exponent territory E is arbitrary value and the mantissa of mantissa territory M is full 0, sign bit is 0/1, or when the minimum value that the value of exponent territory E can represent than it is also little, no matter why its mantissa is worth, computing machine all regards null value as this floating number, is called machine zero;
(5) when the exponent of exponent territory E is 1 ~ (2
the bit wide in exponent territory, and when the mantissa of mantissa territory M is arbitrary value, sign bit is 0/1, is called standardizing number-1); When the value of mantissa is not 0, the highest significant position in mantissa territory should be 1, otherwise moves the way of radix point in left and right to revise exponent simultaneously, makes it become this representation, is called that the normalization of floating number represents.
The above is only the preferred embodiment of the present invention, be to be understood that the present invention is not limited to the form disclosed by this paper, should not regard the eliminating to other embodiments as, and can be used for other combinations various, amendment and environment, and can in contemplated scope described herein, changed by the technology of above-mentioned instruction or association area or knowledge.And the change that those skilled in the art carry out and change do not depart from the spirit and scope of the present invention, then all should in the protection domain of claims of the present invention.
Claims (1)
1. a variable floating data microprocessor, is characterized in that, floating number is made up of symbol field, exponent territory, mantissa territory, floating number=sign bit. mantissa × 2
exponent, floating number composed as follows:
Symbol field: represent with S, symbol field accounts for 1, and 0 represents positive number, and 1 represents negative;
Exponent territory: represent with E, indicates radix point position in the data with integer form, determines floating-point numerical representation scope, and the exponent territory E of floating number equals exponent e and adds a fixing off-set value, and this off-set value is (2
the bit wide-1 in exponent territory-1);
Mantissa territory: represent with M, represents with fractional fixed point, and the figure place providing significant figure determines floating-point numerical representation precision;
Described variable floating data microprocessor comprises self-defined floating-point configuration register, self-defined floating-point configuration register is made up of data length register, sign bit register, rank, position length register and mantissa's length register, and the composition of self-defined floating number order is exactly self-defined floating-point configuration register configuration composition order, the composition order of self-defined floating number is: self-defined floating-point configuration register 0, self-defined floating-point configuration register 1, self-defined floating-point configuration register 2, self-defined floating-point configuration register 3; Mantissa's length of field adds exponent length of field length of field of putting in marks and equals floating data length, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 0: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 1: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 2: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
Self-defined floating-point configuration register 3: if low 2 equal Binary Zero 0, represent self-defined floating data length; If low 2 equal Binary Zero 1, represent symbol field; If low 2 equal binary one 0, represent exponent territory; If low 2 equal binary one 1, represent mantissa territory; Other remaining data bit represent the length of this data, and wherein symbol field length can only be length is 1, otherwise mistake produces unknown result, and processor produces abnormal;
The floating number of five types is defined as follows in self-defined floating number:
(1) when the exponent of exponent territory E is full 0 and the mantissa of mantissa territory M also for full 0 time, sign bit is 0/1, is called positive and negative 0;
(2) when the exponent of exponent territory E is complete 1 and the mantissa of mantissa territory M is full 0, sign bit is 0/1, is called positive minus infinity;
(3) when the exponent of exponent territory E is complete 1 and the mantissa of mantissa territory M is non-zero, sign bit is 0/1, is called illegal floating number;
(4) when the exponent of exponent territory E is arbitrary value and the mantissa of mantissa territory M is full 0, sign bit is 0/1, or when the minimum value that the value of exponent territory E can represent than it is also little, no matter why its mantissa is worth, computing machine all regards null value as this floating number, is called machine zero;
(5) when the exponent of exponent territory E is 1 ~ (2
the bit wide in exponent territory, and when the mantissa of mantissa territory M is arbitrary value, sign bit is 0/1, is called standardizing number-1); When the value of mantissa is not 0, the highest significant position in mantissa territory should be 1, otherwise moves the way of radix point in left and right to revise exponent simultaneously, makes it become this representation, is called that the normalization of floating number represents.
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| WO2017016233A1 (en) * | 2015-07-28 | 2017-02-02 | 成都腾悦科技有限公司 | Variable floating-point data microprocessor |
| CN107038016A (en) * | 2017-03-29 | 2017-08-11 | 广州酷狗计算机科技有限公司 | A kind of floating number conversion method and device based on GPU |
| CN110163353A (en) * | 2018-02-13 | 2019-08-23 | 上海寒武纪信息科技有限公司 | A kind of computing device and method |
| CN110515584A (en) * | 2019-08-09 | 2019-11-29 | 苏州浪潮智能科技有限公司 | Floating-point Computation method and system |
| CN112130807A (en) * | 2020-11-25 | 2020-12-25 | 上海燧原科技有限公司 | Tensor floating point data processing method, device, equipment and storage medium |
| CN116594589A (en) * | 2019-12-31 | 2023-08-15 | 华为技术有限公司 | Method, device and arithmetic logic unit for floating point number multiplication calculation |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116594589A (en) * | 2019-12-31 | 2023-08-15 | 华为技术有限公司 | Method, device and arithmetic logic unit for floating point number multiplication calculation |
| CN116594589B (en) * | 2019-12-31 | 2024-03-26 | 华为技术有限公司 | Method, device and arithmetic logic unit for floating point number multiplication calculation |
| CN112130807A (en) * | 2020-11-25 | 2020-12-25 | 上海燧原科技有限公司 | Tensor floating point data processing method, device, equipment and storage medium |
| CN112130807B (en) * | 2020-11-25 | 2021-02-26 | 上海燧原科技有限公司 | Tensor floating point data processing method, device, equipment and storage medium |
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Effective date of registration: 20210125 Address after: No.17, 18 / F, unit 1, building 4, No.68, yangzishan Road, Chenghua District, Chengdu, Sichuan 610000 Patentee after: Sichuan Kaiyan Intellectual Property Service Co.,Ltd. Address before: 274300 380 meters east of the intersection of Weichuang road and Jiantai Road, Shanxian Industrial Zone, Heze City, Shandong Province Patentee before: Zeng Huan Effective date of registration: 20210125 Address after: 311800 17th floor, Jiyang Fortune Building, 28 Wenzhong South Road, Taozhu street, Zhuji City, Shaoxing City, Zhejiang Province Patentee after: Zhejiang qusu Technology Co.,Ltd. Address before: No.17, 18 / F, unit 1, building 4, No.68, yangzishan Road, Chenghua District, Chengdu, Sichuan 610000 Patentee before: Sichuan Kaiyan Intellectual Property Service Co.,Ltd. |
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Application publication date: 20151125 Assignee: Hefei Qusu Chaowei Integrated Circuit Co.,Ltd. Assignor: Zhejiang qusu Technology Co.,Ltd. Contract record no.: X2022990000804 Denomination of invention: A Variable Floating Point Data Microprocessor Granted publication date: 20180116 License type: Exclusive License Record date: 20221013 |
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