CN105070780A - Plane three-step junction avalanche photodiode and manufacturing method - Google Patents
Plane three-step junction avalanche photodiode and manufacturing method Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 239000011248 coating agent Substances 0.000 claims abstract description 13
- 238000000576 coating method Methods 0.000 claims abstract description 13
- 238000009792 diffusion process Methods 0.000 claims description 93
- 239000012535 impurity Substances 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 21
- 239000007787 solid Substances 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 6
- 238000003892 spreading Methods 0.000 claims description 6
- 230000005684 electric field Effects 0.000 abstract description 25
- 238000010521 absorption reaction Methods 0.000 abstract 1
- 230000002401 inhibitory effect Effects 0.000 abstract 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 18
- 238000009826 distribution Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000005764 inhibitory process Effects 0.000 description 2
- 210000003141 lower extremity Anatomy 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 230000002745 absorbent Effects 0.000 description 1
- 239000002250 absorbent Substances 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 238000012512 characterization method Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
- H01L31/107—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
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- H—ELECTRICITY
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
- H01L31/03529—Shape of the potential jump barrier or surface barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/184—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
- H01L31/1844—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
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Abstract
The invention provides a plane three-step junction avalanche photodiode. The plane three-step junction avalanche photodiode comprises a substrate, and a buffer layer, an absorption layer, a gradual change layer, an electric field control layer and a cap layer which are sequentially laminated on the substrate, wherein a part of the cap layer is provided with a coaxial three-step PN junction, the three-step PN junction comprises a third-step PN junction, a second-step PN junction and a first-step PN junction whose radii are gradually increased and junction depths are gradually reduced, the first-step PN junction and the second-step PN junction are used for inhibiting a photodiode junction edge electric field, reducing the area of an active region and improving the frequency characteristic of a device, a mask layer is deposited on the cap layer, a window is formed on the mask layer, a P electrode is covered in the window, an N electrode is laminated below the substrate, a light incidence window is formed on the N electrode, and the light incidence window is internally provided with a reflection reducing coating. The invention also provides a manufacturing method. A three-step junction structure is employed, the dimension of the active region of the device is reduced by use of the third-step PN junction, the frequency characteristic of the device is improved, and the tunnel currents of the device are reduced.
Description
Technical field
The invention belongs to semiconductor photo detector part field, be specifically related to a kind of plane three ladder knot avalanche photodide and manufacture method.
Background technology
Planar avalanche photodiode is on separate absorbent layer, charge layer, dynode layer (SACM) structure extension sheet, adopts the mode of diffusion or ion implantation to form PN junction.Because of edge effect, when being operated under higher reverse biased, often making avalanche photodide edge take the lead in puncturing, can not effectively work.Take the lead in suppress edge puncturing, adoptable mode has the dark guard ring structure that is connected with centre junction and ladder to tie Floating Guard Ring structure.Dark guard ring structure avalanche photodiode is connected with uptake zone by the p type impurity of guard ring, eliminates dynode layer and the charge layer at guard ring place, make avalanche photodide edge can not set up snowslide electric field, reach the object setting up centre junction snowslide electric field; Because guard ring is directly connected with uptake zone, when improving working bias voltage further, tunnel current will be caused to increase further, the electric field strength of photodiode can not be improved further, the gain performance of limiting device.And ladder knot Floating Guard Ring structure utilizes secondary shallow junction; change the geometry distribution of a centre junction edge containment; reduce a centre junction fringe field; the effect of its Floating Guard is just as voltage divider; high electric field secondary being tied edge is divided to the outside of Floating Guard; reduce the electric field strength at secondary knot edge, this structure active region area is comparatively large, the raising of limiting device frequency characteristic.
Summary of the invention
For the technical problem existed in existing two kinds of structures, the invention provides a kind of plane three ladder knot avalanche photodide, this structure can reduce the tunnel current of avalanche photodide, reduces active region area, improves device frequency characteristic.
To achieve these goals, the present invention adopts following technical scheme:
A kind of plane three ladder knot avalanche photodide, comprise substrate, order is laminated in the resilient coating on described substrate, absorbed layer, graded bedding, electrical wires and cap layers, the described cap layers of part is provided with three coaxial ladder PN junctions, described three ladder PN junctions comprise broadening gradually and the 3rd ladder PN junction that junction depth shoals gradually of radius, second ladder PN junction and the first ladder PN junction, described first, second ladder PN junction ties fringe field for suppressing photodiode, reduce the frequecy characteristic of active region area and raising device, described cap layers deposits mask layer, described mask layer is formed with window, P electrode is coated with in described window, N electrode is laminated with under described substrate, described N electrode is formed with light incidence window, anti-reflection film is provided with in described smooth incidence window.
Plane three ladder knot avalanche photodide provided by the invention, described cap layers is provided with three coaxial ladder PN junctions, and described three ladder PN junctions comprise radius broadening gradually and the 3rd ladder PN junction, the second ladder PN junction and the first ladder PN junction that junction depth shoals gradually; The three ladder junction structures that the present invention adopts, utilize first, second ladder PN junction to be connected with the 3rd ladder PN junction, reduce the active area dimensions of photodiode, reduce the junction capacitance of device, improve the frequency characteristic of device, and for alignment or array device, pixel can be made miniaturized; Meanwhile, first, second ladder PN junction described can suppress photodiode to tie fringe field, improves the electric field strength of photodiode, namely can reduce the tunnel current of photodiode, further increase the gain performance of device.
Further, the radius of radius ratio the 3rd ladder PN junction of described second ladder PN junction is wide 5 ~ 15 microns, and more shallow than the junction depth of the 3rd ladder PN junction 0.2 ~ 1 micron of the junction depth of described second ladder PN junction.
Further, the radius of the radius ratio second ladder PN junction of described first ladder PN junction is wide 5 ~ 15 microns, and more shallow than the junction depth of the second ladder PN junction 0.2 ~ 1 micron of the junction depth of described first ladder PN junction.
The present invention also provides a kind of plane three ladder to tie avalanche photodide manufacture method, comprises the following steps:
The epitaxial wafer that sequentially built is made up of resilient coating, absorbed layer, graded bedding, electrical wires and cap layers on substrate;
Make the first ladder PN junction: in the cap layers of described epitaxial wafer, deposit ground floor diffusion mask layer and etch, formed and spread window for the first time, in described first time diffusion window, p type impurity is diffused in cap layers material, form the first ladder PN junction of predetermined junction depth, and the ladder PN junction formed is defined as and once ties;
Make the second ladder PN junction: after removing described ground floor diffusion mask layer, deposition second layer diffusion mask layer, form the second time diffusion window little and more concentric than described first time diffusion window port radius, in described second time diffusion window, p type impurity carried out spreading and form knot, form the second ladder PN junction of predetermined junction depth described once tying, and formed with once tie coaxial ladder PN junction and be defined as secondary and tie;
Make the 3rd ladder PN junction: after removing described second layer diffusion mask layer, deposition third layer diffusion mask layer, passive diffusion is carried out to described secondary knot, etch described third layer diffusion mask layer, form the third time diffusion window little and more concentric than described second time diffusion window port radius, in described third time diffusion window, p type impurity carried out spreading and form knot, tie at described secondary and form the 3rd ladder PN junction of predetermined junction depth, and formed tie coaxial ladder PN junction with secondary and be defined as three times and tie;
Make P electrode and N electrode: spread the window's position in described third time and make P electrode, and deposit one deck anti-reflection film under described substrate, etching photosurface, with after the anti-reflection film of exterior domain, makes the N electrode be connected with described substrate.
Plane three ladder knot avalanche photodide manufacture method provided by the invention, outside the advantage with aforesaid plane type three ladder knot avalanche photodide, in manufacture method, adopt passive diffusion technology to once knot and secondary knot spread, thus reduce the concentration gradient of avalanche photodide other knot except three knots, reduce edge electric field strength.
Further, described making first ladder PN junction is with in making the second ladder PN junction step, adopt the low p type impurity of little, the solid concentration of diffusion coefficient to form described first ladder PN junction and the second ladder PN junction, thus described in can keeping, once the stairstepping of knot and secondary knot is constant, is beneficial to technology controlling and process.
Further, in described making the 3rd ladder PN junction step, adopt the high p type impurity of large, the solid concentration of diffusion coefficient to form described 3rd ladder PN junction, thus avalanche photodide center edge electric field ratio can be improved.
Further, in described making second ladder PN junction step, described in the radius ratio of described second time diffusion window, the radius of first time diffusion window is little 5 ~ 15 microns, and more shallow than the junction depth of the second ladder PN junction 0.2 ~ 1 micron of the junction depth of described first ladder PN junction, the geometry distribution of secondary knot edge containment can be changed thus, suppress the electric field at secondary knot edge.
Further, in described making the 3rd ladder PN junction step, described in the radius ratio of described third time diffusion window, the radius of second time diffusion window is little 5 ~ 15 microns, and more shallow than the junction depth of the 3rd ladder PN junction 0.2 ~ 1 micron of the junction depth of described second ladder PN junction, the geometry distribution of three knot edge containment can be changed thus, suppress the electric field tying edge for three times, make the center of tying for three times take the lead in setting up snowslide electric field.
Plane three ladder knot avalanche photodide, be not only the back side and enter photo structure, photo structure can also be entered for front, to this, present invention also offers another kind of plane three ladder knot avalanche photodide, comprise substrate, order is laminated in the resilient coating on described substrate, absorbed layer, graded bedding, electrical wires and cap layers, , the described cap layers of part is provided with three coaxial ladder PN junctions, described three ladder PN junctions comprise broadening gradually and the 3rd ladder PN junction that junction depth shoals gradually of radius, second ladder PN junction and the first ladder PN junction, described 3rd ladder PN junction ties fringe field for suppressing photodiode, reduce the frequecy characteristic of active region area and raising device, described cap layers deposits mask layer, described mask layer is formed with light incidence window, anti-reflection film is provided with in described smooth incidence window, P electrode is surrounded with around described smooth incidence window, N electrode is laminated with under described substrate.
Accompanying drawing explanation
Fig. 1 is the first plane three ladder provided by the invention knot avalanche photodiode structure schematic diagram.
Fig. 2 is indium phosphide SACM epitaxial slice structure schematic diagram provided by the invention.
Fig. 3 is the process implementing figure of formation first ladder PN junction provided by the invention.
Fig. 4 is the process implementing figure of formation second ladder PN junction provided by the invention.
Fig. 5 is the process implementing figure of formation provided by the invention 3rd ladder PN junction.
Fig. 6 is the second plane three ladder provided by the invention knot avalanche photodiode structure schematic diagram.
In figure, 1, substrate; 2, resilient coating; 3, absorbed layer; 4, graded bedding; 5, electrical wires; 6, cap layers; 7, mask layer; 71, ground floor diffusion mask layer; 72, second layer diffusion mask layer; 73, third layer diffusion mask layer; 8, the 3rd ladder PN junction; 9, the second ladder PN junction; 10, the first ladder PN junction; 11, P electrode; 12, N electrode; 13, anti-reflection film; 14, first time spreads window; 15, second time spreads window; 16, third time spreads window.
Embodiment
The technological means realized to make the present invention, creation characteristic, reaching object and effect is easy to understand, below in conjunction with concrete diagram, setting forth the present invention further.
In describing the invention, it will be appreciated that, term " width ", " degree of depth ", " on ", D score, "front", "rear", "left", "right", " vertically ", the orientation of the instruction such as " level " or position relationship be based on orientation shown in the drawings or position relationship, only the present invention for convenience of description and simplified characterization, instead of indicate or imply that the device of indication or element must have specific orientation, with specific azimuth configuration and operation, therefore can not be interpreted as limitation of the present invention.
Please refer to shown in Fig. 1, the invention provides a kind of plane three ladder knot avalanche photodide, comprise substrate 1, order is laminated in the resilient coating 2 on described substrate 1, absorbed layer 3, graded bedding 4, electrical wires 5 and cap layers 6, the described cap layers of part 6 is provided with three coaxial ladder PN junctions, described three ladder PN junctions comprise broadening gradually and the 3rd ladder PN junction 8 that junction depth shoals gradually of radius, second ladder PN junction 9 and the first ladder PN junction 10, described first, second ladder PN junction 10 and 9 ties fringe field for suppressing photodiode, reduce the frequecy characteristic of active region area and raising device, described cap layers 6 deposits mask layer 7, described mask layer 7 is formed with window, P electrode 11 is coated with in described window, described substrate is laminated with N electrode 12 1 time, described N electrode 12 is formed with light incidence window, anti-reflection film 13 is provided with in described smooth incidence window.
Plane three ladder knot avalanche photodide provided by the invention, described cap layers is provided with three coaxial ladder PN junctions, and described three ladder PN junctions comprise radius broadening gradually and the 3rd ladder PN junction, the second ladder PN junction and the first ladder PN junction that junction depth shoals gradually; The present invention adopts three ladder junction structures, utilizes first, second ladder PN junction to be connected with the 3rd ladder PN junction, reduces the active area dimensions of photodiode, reduce the junction capacitance of device, improve the frequency characteristic of device, and for alignment or array device, pixel can be made miniaturized; Meanwhile, first, second ladder PN junction described can suppress photodiode to tie fringe field, improves the electric field strength of photodiode, namely can reduce the tunnel current of photodiode, further increase the gain performance of device.
Particularly, plane three ladder knot avalanche photodide provided by the invention is on the epitaxial wafer of SACM structure, by three p type impurity diffusions, forms three coaxial ladder PN junctions, and wherein three ladder knots are composed as follows:
3rd ladder PN junction 8, or be called centre junction, treat on dopant material at N-type top layer, utilize p type impurity to form P type knot, itself and charge layer set up carrier multiplication region;
Second ladder PN junction 9, in the periphery of centre junction, treats on dopant material at N-type top layer, utilize p type impurity to form the P type coaxial with centre junction to tie, for changing the geometry distribution of centre junction edge containment, suppressing the electric field at centre junction edge, making the center of centre junction take the lead in setting up snowslide electric field;
First ladder PN junction 10, in the periphery of the second ladder PN junction, treat on dopant material at N-type top layer, utilize p type impurity to form the P type doped junction coaxial with centre junction, for changing the geometry distribution of the second ladder PN junction edge containment, suppress the electric field at the second ladder PN junction edge.
As specific embodiment, please refer to shown in Fig. 1, the radius of radius ratio the 3rd ladder PN junction 8 of described second ladder PN junction 9 is wide 5 ~ 15 microns, and more shallow than the junction depth of the 3rd ladder PN junction 8 0.2 ~ 1 micron of the junction depth of described second ladder PN junction 9.Particularly, the radius of ladder PN junction refers to the center of circular window for benchmark, from center to the left hand edge of ladder PN junction or the distance of right hand edge; And the junction depth of ladder PN junction refers to the vertical range from a ladder PN junction lower limb to another adjacent steps PN junction lower limb.Adopt this semidiameter implementing described number range and junction depth poor, can realize three times knot edge electric field strengths inhibition.
As specific embodiment, please refer to shown in Fig. 1, the radius of the radius ratio second ladder PN junction 9 of described first ladder PN junction 10 is wide 5 ~ 15 microns, and more shallow than the junction depth of the second ladder PN junction 9 0.2 ~ 1 micron of the junction depth of described first ladder PN junction 10.Adopt this semidiameter implementing described number range and junction depth poor, can realize secondary knot edge electric field strength inhibition.
Those skilled in the art is understood that, in plane three ladder knot avalanche photodide provided by the invention, the footing of described ladder PN junction is not limited to three ladder knots, on the basis of previous embodiment, two ladder knots, four-step knot, five ladder knots etc. can also be generalized to as required, until minimum active region area can be utilized, suppress centre junction fringe field, to arrive high-frequency characteristic and high gain characteristics.
The present invention also provides a kind of plane three ladder to tie avalanche photodide manufacture method, comprises the following steps:
The epitaxial wafer that sequentially built is made up of resilient coating, absorbed layer, graded bedding, electrical wires and cap layers on substrate;
Make the first ladder PN junction: in described cap layers, deposit ground floor diffusion mask layer and etch, formed and spread window for the first time, in described first time diffusion window, p type impurity is diffused in cap layers material, form the first ladder PN junction of predetermined junction depth, and the ladder PN junction formed is defined as and once ties;
Make the second ladder PN junction: after removing described ground floor diffusion mask layer, deposition second layer diffusion mask layer, form the second time diffusion window little and more concentric than described first time diffusion window port radius, in described second time diffusion window, p type impurity carried out spreading and form knot, form the second ladder PN junction of predetermined junction depth described once tying, and formed with once tie coaxial ladder PN junction and be defined as secondary and tie;
Make the 3rd ladder PN junction: after removing described second layer diffusion mask layer, deposition third layer diffusion mask layer, passive diffusion is carried out to described secondary knot, etch described third layer diffusion mask layer, form the third time diffusion window little and more concentric than described second time diffusion window port radius, in described third time diffusion window, p type impurity carried out spreading and form knot, tie at described secondary and form the 3rd ladder PN junction of predetermined junction depth, and formed tie coaxial ladder PN junction with secondary and be defined as three times and tie;
Make P electrode and N electrode: spread the window's position in described third time and make P electrode, and deposit one deck anti-reflection film under described substrate, etching photosurface, with after the anti-reflection film of exterior domain, makes the N electrode be connected with described substrate.
Plane three ladder knot avalanche photodide manufacture method provided by the invention, outside the advantage with aforesaid plane type three ladder knot avalanche photodide, in manufacture method, adopt passive diffusion technology to once knot and secondary knot spread, thus reduce the concentration gradient of avalanche photodide other knot except three knots, reduce edge electric field strength.
As specific embodiment, please refer to shown in Fig. 2, described growth SACM epitaxial slice structure step comprises:
At N-shaped indium phosphide (n
+-InP) growing n-type indium phosphide (n-InP) resilient coating 2 on substrate 1, its growth thickness is 0.2 ~ 1 micron, and doping content is less than or equal to 2 × 10
18cm
-3;
N-shaped indium phosphide resilient coating 2 grows indium gallium arsenic (i-InGaAs) or InGaAsP (i-InGaAsP) absorbed layer 3 of undoped, and its growth thickness is 0.4 ~ 3 micron;
Growing n-type InGaAsP (n-InGaAsP) graded bedding 4 on absorbed layer 3, its growth thickness is 0.01 ~ 0.05 micron, and doping content is less than or equal to 2 × 10
17cm
-3;
Growing n-type indium phosphide (n-InP) electrical wires 5 on graded bedding 4, its growth thickness is 0.08 ~ 5 micron, and doping content is 1 × 10
16~ 5 × 10
17cm
-3;
Growing n-type indium phosphide (n-InP) cap layers 6 on electrical wires 5, its growth thickness is 2 ~ 4 microns, and doping content is less than or equal to 5 × 10
16cm
-3; So far, complete the growth of indium phosphide SACM epitaxial slice structure, the epitaxial device specifically adopted during making and technique are well known to those skilled in the art, do not repeat them here.
As specific embodiment, please refer to shown in Fig. 3, described making first ladder PN junction step comprises:
Described cap layers 6 indium phosphide deposits ground floor diffusion mask layer 71, by photoetching, etching technics, described ground floor diffusion mask layer 71 forms circular propagation window, namely first time diffusion window 14 is formed, until the indium phosphide of described cap layers 6 directly exposed this first time diffusion window in 14, then in described first time diffusion window 14, adopt the low p type impurity of little, the solid concentration of diffusion coefficient to diffuse in cap layers 6 i.e. indium phosphide, form the first ladder PN junction 10 of predetermined junction depth, and this first ladder PN junction 10 is defined as once ties.
As specific embodiment, please refer to shown in Fig. 4, described making second ladder PN junction step comprises:
Remove described ground floor diffusion mask layer 71, until by all out exposed for the indium phosphide of described cap layers 6, the indium phosphide of exposed cap layers 6 deposits second layer diffusion mask layer 72, repeat photoetching, etching technics, it is little compared with making windows radius in the first ladder PN junction step that described second layer diffusion mask layer 72 forms diffusion window port radius, with one heart, circular propagation window, namely second time diffusion window 15 is formed, until the indium phosphide of described cap layers 6 is directly exposed in this second time diffusion window 15, then adopt diffusion coefficient is little in described second time diffusion window 15, Gu the p type impurity that concentration is low diffuses in cap layers 6 i.e. indium phosphide, the the second ladder PN junction 9 forming predetermined junction depth is once tied described, and this second ladder PN junction 9 is defined as secondary knot.
As specific embodiment, please refer to shown in Fig. 5, described making the 3rd ladder PN junction step comprises:
Remove described second layer diffusion mask layer 72, until by all out exposed for the indium phosphide of described cap layers 6, the indium phosphide of exposed cap layers 6 deposits third layer diffusion mask layer 73, and adopt passive diffusion technology to carry out passive diffusion to described secondary knot, to reduce PN junction impurity concentration gradient in previous step, reduce edge electric field strength, repeat photoetching, etching technics, it is little compared with making windows radius in the second ladder PN junction step that described third layer diffusion mask layer 73 forms diffusion window port radius, with one heart, circular propagation window, namely third time diffusion window 16 is formed, until the indium phosphide of described cap layers 6 is directly exposed in this third time diffusion window 16, then in described third time diffusion window 16, adopt diffusion coefficient little, Gu the p type impurity that concentration is low diffuses in cap layers 6 i.e. indium phosphide, the 3rd ladder PN junction 8 forming predetermined junction depth is tied at described secondary, and the 3rd ladder PN junction 8 is defined as three knots.
As specific embodiment, in described making first ladder PN junction 10 and making the second ladder PN junction 9 step, the low p type impurity of little, the solid concentration of diffusion coefficient is adopted to form described first ladder PN junction 10 and the second ladder PN junction 9, namely p type impurity formation other ladder PN junction except described 3rd ladder PN junction 8 that little, the solid concentration of diffusion coefficient is low is adopted, thus described in can keeping, once the stairstepping repeatedly tied of knot and secondary knot etc. is constant, is beneficial to technology controlling and process.
As specific embodiment, in described making the 3rd ladder PN junction 8 step, adopt the high p type impurity of large, the solid concentration of diffusion coefficient to form described 3rd ladder PN junction 8, thus avalanche photodide center edge electric field ratio can be improved.
As specific embodiment, in described making second ladder PN junction 9 step, described in the radius ratio of described second time diffusion window 15, the radius of first time diffusion window 14 is little 5 ~ 15 microns, and more shallow than the junction depth of the second ladder PN junction 0.2 ~ 1 micron of the junction depth of described first ladder PN junction, the geometry distribution of secondary knot edge containment can be changed thus, suppress the electric field at secondary knot edge.
As specific embodiment, in described making the 3rd ladder PN junction 8 step, described in the radius ratio of described third time diffusion window 16, the radius of second time diffusion window 15 is little 5 ~ 15 microns, and more shallow than the junction depth of the 3rd ladder PN junction 0.2 ~ 1 micron of the junction depth of described second ladder PN junction, the geometry distribution of three knot edge containment can be changed thus, suppress the electric field tying edge for three times, make the center of tying for three times take the lead in setting up snowslide electric field.
As specific embodiment, described making P electrode 11 and N electrode 12 step comprise: after having spread for the third time, in described third time diffusion window 16 position evaporated metal P electrode 11, then attenuated polishing epitaxial wafer substrate 1, and at described substrate 1 time deposition one deck anti-reflection film 13, etching photosurface is with after the anti-reflection film of exterior domain, and evaporate the metal N electrode 12 be connected with described substrate 1, concrete structure please refer to shown in Fig. 1.
Described type three ladder knot avalanche photodide in previous embodiment and manufacture method, the photodiode provided is that photo structure is entered at the back side; Certainly, according to entering light demand, also having and entering light from front.To this, please refer to shown in Fig. 6, present invention also offers another kind of plane three ladder knot avalanche photodide, comprise substrate 1, order is laminated in the resilient coating 2 on described substrate 1, absorbed layer 3, graded bedding 4, electrical wires 5 and cap layers 6, the described cap layers of part 6 is provided with three coaxial ladder PN junctions, described three ladder PN junctions comprise broadening gradually and the 3rd ladder PN junction 8 that junction depth shoals gradually of radius, second ladder PN junction 9 and the first ladder PN junction 10, described first, second ladder PN junction 10 and 9 ties fringe field for suppressing photodiode, reduce the frequecy characteristic of active region area and raising device, described cap layers 6 deposits mask layer 7, described mask layer 7 is formed with light incidence window, anti-reflection film 13 is provided with in described smooth incidence window, P electrode 11 is surrounded with around described smooth incidence window, described substrate is laminated with N electrode 12 1 time.In the present embodiment, except enter light mode and the first plane three ladder aforementioned tie avalanche photodide different except, other is all substantially identical, and therefore its concrete structure and manufacture method repeat no more.
These are only embodiments of the present invention; not thereby the scope of the claims of the present invention is limited; every equivalent structure utilizing specification of the present invention and accompanying drawing content to do, is directly or indirectly used in the technical field that other are relevant, all in like manner within scope of patent protection of the present invention.
Claims (9)
1. a plane three ladder knot avalanche photodide, it is characterized in that, comprise substrate, order is laminated in the resilient coating on described substrate, absorbed layer, graded bedding, electrical wires and cap layers, the described cap layers of part is provided with three coaxial ladder PN junctions, described three ladder PN junctions comprise broadening gradually and the 3rd ladder PN junction that junction depth shoals gradually of radius, second ladder PN junction and the first ladder PN junction, described first, second ladder PN junction ties fringe field for suppressing photodiode, reduce the frequecy characteristic of active region area and raising device, described cap layers deposits mask layer, described mask layer is formed with window, P electrode is coated with in described window, N electrode is laminated with under described substrate, described N electrode is formed with light incidence window, anti-reflection film is provided with in described smooth incidence window.
2. plane three ladder knot avalanche photodide according to claim 1, it is characterized in that, the radius of radius ratio the 3rd ladder PN junction of described second ladder PN junction is wide 5 ~ 15 microns, and more shallow than the junction depth of the 3rd ladder PN junction 0.2 ~ 1 micron of the junction depth of described second ladder PN junction.
3. plane three ladder knot avalanche photodide according to claim 1, it is characterized in that, the radius of the radius ratio second ladder PN junction of described first ladder PN junction is wide 5 ~ 15 microns, and more shallow than the junction depth of the second ladder PN junction 0.2 ~ 1 micron of the junction depth of described first ladder PN junction.
4. a plane three ladder knot avalanche photodide manufacture method, is characterized in that, comprise the following steps:
The epitaxial wafer that sequentially built is made up of resilient coating, absorbed layer, graded bedding, electrical wires and cap layers on substrate;
Make the first ladder PN junction: in the cap layers of described epitaxial wafer, deposit ground floor diffusion mask layer and etch, formed and spread window for the first time, in described first time diffusion window, p type impurity is diffused in cap layers material, form the first ladder PN junction of predetermined junction depth, and the ladder PN junction formed is defined as and once ties;
Make the second ladder PN junction: after removing described ground floor diffusion mask layer, deposition second layer diffusion mask layer, form the second time diffusion window little and more concentric than described first time diffusion window port radius, in described second time diffusion window, p type impurity carried out spreading and form knot, form the second ladder PN junction of predetermined junction depth described once tying, and formed with once tie coaxial ladder PN junction and be defined as secondary and tie;
Make the 3rd ladder PN junction: after removing described second layer diffusion mask layer, deposition third layer diffusion mask layer, passive diffusion is carried out to described secondary knot, etch described third layer diffusion mask layer, form the third time diffusion window little and more concentric than described second time diffusion window port radius, in described third time diffusion window, p type impurity carried out spreading and form knot, tie at described secondary and form the 3rd ladder PN junction of predetermined junction depth, and formed tie coaxial ladder PN junction with secondary and be defined as three times and tie;
Make P electrode and N electrode: spread the window's position in described third time and make P electrode, and deposit one deck anti-reflection film under described substrate, etching photosurface, with after the anti-reflection film of exterior domain, makes the N electrode be connected with described substrate.
5. plane three ladder knot avalanche photodide manufacture method according to claim 4, it is characterized in that, described making first ladder PN junction, with in making the second ladder PN junction step, adopts the low p type impurity of little, the solid concentration of diffusion coefficient to form described first ladder PN junction and the second ladder PN junction.
6. plane three ladder knot avalanche photodide manufacture method according to claim 4, is characterized in that, in described making the 3rd ladder PN junction step, adopts the high p type impurity of large, the solid concentration of diffusion coefficient to form described 3rd ladder PN junction.
7. plane three ladder knot avalanche photodide manufacture method according to claim 4, it is characterized in that, in described making second ladder PN junction step, described in the radius ratio of described second time diffusion window, the radius of first time diffusion window is little 5 ~ 15 microns, and more shallow than the junction depth of the second ladder PN junction 0.2 ~ 1 micron of the junction depth of described first ladder PN junction.
8. plane three ladder knot avalanche photodide manufacture method according to claim 4, it is characterized in that, in described making the 3rd ladder PN junction step, described in the radius ratio of described third time diffusion window, the radius of second time diffusion window is little 5 ~ 15 microns, and more shallow than the junction depth of the 3rd ladder PN junction 0.2 ~ 1 micron of the junction depth of described second ladder PN junction.
9. a plane three ladder knot avalanche photodide, it is characterized in that, comprise substrate, order is laminated in the resilient coating on described substrate, absorbed layer, graded bedding, electrical wires and cap layers, the described cap layers of part is provided with three coaxial ladder PN junctions, described three ladder PN junctions comprise broadening gradually and the 3rd ladder PN junction that junction depth shoals gradually of radius, second ladder PN junction and the first ladder PN junction, described 3rd ladder PN junction ties fringe field for suppressing photodiode, reduce the frequecy characteristic of active region area and raising device, described cap layers deposits mask layer, described mask layer is formed with light incidence window, anti-reflection film is provided with in described smooth incidence window, P electrode is surrounded with around described smooth incidence window, N electrode is laminated with under described substrate.
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