CN105049394B - It is a kind of based on the synchronization detecting method for overcoming big frequency deviation synchronizing sequence - Google Patents
It is a kind of based on the synchronization detecting method for overcoming big frequency deviation synchronizing sequence Download PDFInfo
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- CN105049394B CN105049394B CN201510354944.3A CN201510354944A CN105049394B CN 105049394 B CN105049394 B CN 105049394B CN 201510354944 A CN201510354944 A CN 201510354944A CN 105049394 B CN105049394 B CN 105049394B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2657—Carrier synchronisation
- H04L27/2659—Coarse or integer frequency offset determination and synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2656—Frame synchronisation, e.g. packet synchronisation, time division duplex [TDD] switching point detection or subframe synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2655—Synchronisation arrangements
- H04L27/2657—Carrier synchronisation
- H04L27/266—Fine or fractional frequency offset determination and synchronisation
Abstract
The invention discloses a kind of based on the synchronization detecting method for overcoming big frequency deviation synchronizing sequence, and the realization method synchronized using thick synchronous+essence when thick synchronous after failure, no longer carried out essence and synchronized, saved and calculate the time；In addition, a thick synchronous big sync bit range determining first, then carries out precise synchronization detection, can effectively lower synchronous time and algorithm complexity again；The present invention uses new CAZAC sequences, can be under the conditions of high frequency deviation, and sync bit will produce small-scale deviation (smaller than existing ZC sequence synchronizations position deviation is more), can meet the anti-frequency deviation requirement of thick synchronizing sequence very well.
Description
Technical field
The present invention relates to signal detection technique fields more particularly to a kind of based on the synchronous inspection for overcoming big frequency deviation synchronizing sequence
Survey method.
Background technology
Frame, which receives, to be synchronized, and typically under 4 times or 8 sampling rates, realizes the confirmation of sync bit, but existing same
The pseudo-random sequence of detection algorithm use is walked when carrying out autocorrelation calculation, very sensitive to frequency deviation, frequency deviation reaches certain thresholding
Performance can be caused drastically to decline.Therefore it can only be used in the case where frequency deviation very little.The signal reception of antenna can all be used
4xchip rates receive (i.e. the sampling interval is 1/4Tc).Correlation value calculation is calculated separately for 4 samplings.Synchronizing sequence length
Using 4096 length (synchronizing sequence is longer, and the probability for synchronizing empty inspection is lower, and net synchronization capability is also better).
The long W=4096chip of window of each synchronous window, the window's position offset Δ W=256chip, over-sampling multiple
Rupsample=4.Kth a antennas, the Nm road window corresponding s receive signal and are expressed as：
To enhance net synchronization capability, the sampling cascade mode of multistage obtains correlation, section length Δ T=256chip：
Wherein s (n) indicates that the local synchronization sequence (midamble sequences) of plural numberization, Cm indicate the index of modular cascade sequence.
Each detection window is required for carrying out the correlation computations of 4096 length, as long as the related peak-peak that synchronizes of the window does not reach same
Thresholding is walked, detection window slides Δ W=256chip successively, is directed toward next window, re-starts the correlation computations of 4096 length.
If synchronization detects successfully in current window, terminate to detect, and export synchronized result：That is sync bit.
During the realization of above-mentioned existing technical solution, the long W=4096chip of window of each synchronous window, the window's position
Offset Δ W=256chip under limiting case, needs 64 (4096*4/ of carry out in total if sync bit compares rearward
(256*4)) secondary 4096 correlation computations grown；Calculation amount is bigger caused by sliding correlation, and synchronization time also can be longer.
Invention content
In view of this, the present invention provides a kind of based on the synchronization detecting method for overcoming big frequency deviation synchronizing sequence, Neng Gouti
Net synchronization capability of the height under big frequency deviation, while effectively reducing synchronous time and algorithm complexity.
The present invention's is a kind of based on the synchronization detecting method for overcoming big frequency deviation synchronizing sequence, includes the following steps：
Step 1, thick synchronous detection：
The sampling window width of receiver is set as 2048 × 4, and controls and receives machine in a manner of 4 sampling rates to defeated
Enter data to be received, obtains the thick synchrodata in 4 roads that length is 2048；
Local synchronization CAZAC sequences are subjected to relevant treatment with per the thick synchrodata in road respectively, obtain 4 row correlations；Sentence
Whether maximum value is more than the thick synchronous thresholding of setting in disconnected 4 row correlations：
If it is greater than or be equal to, the position in the input data of the maximum value after sampling is recorded, as the thick of frame head
Then sync bit executes step 2；
If it is less, thinking synchronization failure, the thick sync bit of frame head is not found, and the sampling window for controlling and receiving machine is inclined
It is 2048 × 4 to move length, return to step 1；
Wherein, the length of the CAZAC sequences is 2048, and growth mode is：
Wherein, μ indicates the root serial number of CAZAC sequences, 0≤n≤pilotLen-1, μ=3, pilotLen=2048；
The synchronous detection of step 2, essence:
S201, according to the thick sync bit obtained in step 1, in the input data after the sampling that the step 1 receives,
P × 4 data point is moved forward by reference point of the thick sync bit of the frame head, as the synchronous starting point of essence；It is synchronous from the essence
Starting point starts the data for taking length to be 2048 × 4, forms 4 tunnel essence synchronizing sequences；Wherein, the value range of p is 3~40；
S202, using Δ T=256 as section length, will be per the local that smart synchronizing sequence is 2048 with length all the way
Midamble sequences obtain correlation to get to 4 row correlations by the cascade mode of multistage；
S203, judge whether maximum value is more than the synchronous thresholding of the essence set in 4 row correlations：
If it is greater than or be equal to, record the position where the maximum value and then executed that is, as the exact position of frame head
Step 3；
If it is less, essence detection failure returns to step after the sampling window deflected length for controlling and receiving machine is 2048 × 4
Rapid 1；
Step 3, the exact position for exporting frame head.
The present invention has the advantages that：
The present invention synchronizes detection algorithm using thick synchronous+synchronous realization method of essence, after failing when thick synchronous, no longer into
Row essence is synchronous, saves and calculates the time；In addition, a thick synchronous big sync bit range determining first, then carries out accurate again
Synchronous detection, can effectively lower synchronous time and algorithm complexity；
The present invention uses new CAZAC sequences, can be under the conditions of high frequency deviation, and sync bit will produce small-scale deviation
(smaller than existing ZC sequence synchronizations position deviation is more) can meet the anti-frequency deviation requirement of thick synchronizing sequence very well.
Description of the drawings
Fig. 1 is ZC sequences autocorrelator trace figure in the prior art；
Fig. 2 is the CAZAC sequence autocorrelator trace figure comparison results of ZC sequences auto-correlation in the prior art and the present invention；
Fig. 3 be present invention determine that new CAZAC sequences and the prior art energy and position of the ZC sequences in correlation peak
Set the situation of change with frequency deviation, wherein sync bit 100, SNR=25, frequency deviation is respectively in 0,10kHz and 20kHz；
Fig. 4 is that the sliding correlation peak location of m-sequence is influenced situation by frequency deviation in the present invention, wherein sync bit is
100, SNR=25, frequency deviation is respectively in 0,10kHz and 20kHz；
Fig. 5 is flow chart of the method for the present invention.
Specific implementation mode
The present invention will now be described in detail with reference to the accompanying drawings and examples.
Since existing pseudo-random sequence is when carrying out autocorrelation calculation, very sensitive to frequency deviation, frequency deviation reaches certain door
Limit can cause performance drastically to decline.Therefore it can only be used in the case where frequency deviation very little, therefore the present invention finds new CAZAC sequences
Sequence, to overcome the problems, such as big frequency deviation.
The generation expression formula of the ZC sequences used in LTE is as follows:
Wherein, N is sequence length, and m=0,1 ..., N-1, μ is the arbitrary positive integer relatively prime with N.
Go out below by the derivation of equation, auto-correlation formula of ZC sequences in the presence of having frequency deviation：
Wherein, r is indicated after channel, the synchronizing sequence data received；S indicates original synchronizing sequence.
By above formula as can be seen that influencing the position of correlation peak is:In root sequence μ phases
Together, under different frequency deviation scenes, correlation peak and correlation peak location are affected by frequency deviation, as shown in Figure 1.
To avoid ZC sequence pair frequency deviation sensitive issues, a new CAZAC sequence is devised, formula is seen below：
The position of new CAZAC sequence autocorrelation peaks is than the very little that physical location deviates, and secondary lobe also very little, such as schemes
Shown in 2.
Using completely new CAZAC sequences, it is in smaller always in the position of different length, different frequencies correlation peak on the lower side
In deviation range, it is seen that correlated performance can meet the requirement of thick synchronizing sequence.So final determine to use the new CAZAC
Sequence is as slightly synchronizing the synchronizing sequence used.
Below with ideal synchronisation position for 100, SNR=25, frequency deviation is divided for 0,5kHz, 10kHz and 20kHz respectively
Do not illustrate, the main energy for investigating correlation peak and position with frequency deviation situation of change.
The energy of the ZC sequence main peaks of the new CAZAC sequences and existing LTE of the present invention is all slightly dropped with the increase of frequency deviation
Low, i.e., main peak energy still maintains higher；But under the conditions of there are high frequency deviation, sync bit will produce small-scale inclined
Difference, and the new CAZAC sequence nucleotide sequences of the present invention, when frequency deviation is up to 20kHz, sync bit offset is not still very big, and
The ZC sequence synchronizations position of LTE has deviated very greatly, and new CAZAC sequence nucleotide sequences of the invention meet the anti-frequency of thick synchronizing sequence
It persists in asking.
Present invention determine that the generating modes of new CAZAC sequence nucleotide sequences be：
Wherein:Root Serial No.：μ=3, pilotLen=2048.
As shown in figure 5, the synchronization detecting method of the present invention includes the following steps：
Step 1, thick synchronous detection：
The sampling window width of receiver is set as 2048 × 4, and controls and receives machine in such a way that 4 times using rate to defeated
Enter data to be received, obtains the thick synchrodata in 4 roads that length is 2048；For example, when the data received are [a, b, c, d]
When, to the data carry out 4 samplings, i.e., to each data point carry out 4 times sampling, then the sampled data obtained be [a1, a2,
A3, a4, b1, b2, b3, b4, c1, c2, c3, c4, d1, d2, d3, d4], the thick synchrodata in 4 roads is re-formed, as：[a1,b1,
C1, d1], [a2, b2, c2, d2], [a3, b3, c3, d3], [a4, b4, c4, d4].
Local synchronization CAZAC sequences are subjected to relevant treatment per the thick synchrodata in road with described respectively, obtain 4 row correlation
Value；Judge whether maximum value is more than the thick synchronous thresholding set in 4 row correlations：
If it is greater than or be equal to, record row serial number h and row serial number k, i.e. determining maximum where the maximum value and adopting
Then position in sample data executes step 2 as the coarse position of frame head；
If it is less, thinking synchronization failure, the coarse position of frame head is not found, controls and receives the sampling window offset length of machine
Degree is 2048 × 4, return to step 1；
Wherein, the length of the new CAZAC sequences is 2048, and generating mode is：
Wherein, μ=3, pilotLen=2048；
Why it is direct 2048 length local CAZAC sequences it is related to the progress of the data of reception, which can be effective
The phase effect that confrontation frequency deviation is brought, the position only slightly synchronized is offset, and the size of offset and frequency deviation has relationship.Slightly
The sliding length of synchronous window is 2048chip, can effectively lower synchronous time and algorithm complexity.
The synchronous detection of step 2, essence:
S201, according to the thick sync bit obtained in step 1, in the sampled data received in the step 1, with thick same
Step is set to reference point and moves forward p × 4 data point, and starting point is synchronized as the essence；Length is taken since the synchronous starting point of the essence
For 2048 × 4 smart synchrodata；
S202, using Δ T=256 as section length, the local M that will be 2048 with length per smart synchronizing sequence all the way
(Midamble) sequence carries out the cascade mode of multistage and obtains correlation to get to 4 row correlations；The length of the M sequence is
2048；
S203, judge whether maximum value is more than the synchronous thresholding of the essence set in 4 row correlations：
If it is greater than or be equal to, essence synchronizes success, records row serial number h and row serial number k where the maximum value, that is, determines
Then the smart position of frame head executes step 3；
If it is less, indicating that essence detection failure is returned after the sampling window deflected length for controlling and receiving machine is 2048 × 4
Return step 1；
Step 3, the exact position for exporting frame head, to be synchronized to signal.
Under conditions of there are frequency deviation, doing sliding correlation to reception synchronizing sequence can be influenced by frequency deviation.With ideal same
Step is set to 100, SNR=25, and frequency deviation illustrates for 0,10kHz and 20kHz respectively respectively, mainly investigates correlation peak
Energy and position with frequency deviation situation of change.
As shown in Figures 3 and 4, the sliding correlation peak location of m-sequence will not be influenced by frequency deviation, but peak energy with
The energy of the increase of frequency deviation and the trend that reduction is presented, new CAZAC sequence main peaks is slightly reduced with the increase of frequency deviation, but is reduced
Amplitude is less than m-sequence, i.e., main peak energy still maintains higher, but under the conditions of there are high frequency deviation example, sync bit can produce
Raw small-scale deviation.
In conclusion the above is merely preferred embodiments of the present invention, being not intended to limit the scope of the present invention.
All within the spirits and principles of the present invention, any modification, equivalent replacement, improvement and so on should be included in the present invention's
Within protection domain.
Claims (1)
1. a kind of based on the synchronization detecting method for overcoming big frequency deviation synchronizing sequence, which is characterized in that include the following steps：
Step 1, thick synchronous detection：
The sampling window width of receiver is set as 2048 × 4, and controls and receives machine in a manner of 4 sampling rates to inputting number
According to being received, the thick synchrodata in 4 roads that length is 2048 is obtained, i.e.,：When the data of reception are [a, b, c, d], to every
One data point carries out 4 samplings, then the sampled data obtained be [a1, a2, a3, a4, b1, b2, b3, b4, c1, c2, c3, c4,
D1, d2, d3, d4], the thick synchrodata in 4 roads is re-formed, as：[a1, b1, c1, d1], [a2, b2, c2, d2], [a3, b3, c3,
D3], [a4, b4, c4, d4]；
Local synchronization CAZAC sequences are subjected to relevant treatment with per the thick synchrodata in road respectively, obtain 4 row correlations；Judge 4 row
Whether maximum value is more than the thick synchronous thresholding of setting in correlation：
If it is greater than or be equal to, record the position in the input data of the maximum value after sampling, the thick synchronization as frame head
Then position executes step 2；
If it is less, thinking synchronization failure, the thick sync bit of frame head is not found, controls and receives the sampling window offset length of machine
Degree is 2048 × 4, return to step 1；
Wherein, the length of the CAZAC sequences is 2048, and generating mode is：
Wherein, μ indicates the root serial number of CAZAC sequences, 0≤n≤pilotLen-1, μ=3, pilotLen=2048；
The synchronous detection of step 2, essence:
S201, according to the thick sync bit obtained in step 1, in the input data after the sampling that the step 1 receives, with institute
The thick sync bit for stating frame head is that reference point moves forward p × 4 data point, as the synchronous starting point of essence；Starting point is synchronized from the essence
Start the data for taking length to be 2048 × 4, forms 4 tunnel essence synchronizing sequences；Wherein, the value range of p is 3~40；
S202, using Δ T=256 as section length, will be per the local Midamble that smart synchronizing sequence is 2048 with length all the way
Sequence obtains correlation to get to 4 row correlations by the cascade mode of multistage；
S203, judge whether maximum value is more than the synchronous thresholding of the essence set in 4 row correlations：
If it is greater than or be equal to, record the position where the maximum value and then execute step that is, as the exact position of frame head
3；
If it is less, essence detection failure, after the sampling window deflected length for controlling and receiving machine is 2048 × 4, return to step 1；
Step 3, the exact position for exporting frame head.
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| CN108289070B (en) | 2017-01-09 | 2020-12-11 | 电信科学技术研究院 | Sending method of synchronization sequence, synchronization detection method and device |
| TWI723248B (en) * | 2018-02-09 | 2021-04-01 | 大陸商電信科學技術研究院有限公司 | Synchronization sequence sending method, synchronization detection method and device |
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