CN105043619A - Eddy current power measuring system based on integrating circuit - Google Patents
Eddy current power measuring system based on integrating circuit Download PDFInfo
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- CN105043619A CN105043619A CN201510251008.XA CN201510251008A CN105043619A CN 105043619 A CN105043619 A CN 105043619A CN 201510251008 A CN201510251008 A CN 201510251008A CN 105043619 A CN105043619 A CN 105043619A
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Abstract
The invention discloses an eddy current power measuring system based on an integrating circuit. The system comprises a single-chip microcomputer (4), a motor control module (5), a display (6) and an operation module (7) connected with the single-chip microcomputer (4), a motor to be measured (1) connected with the motor control module (5), an eddy current dynamometer (2) connected with the motor to be measured (1), a signal processing module (3) connected with the eddy current dynamometer (2) and a signal amplifying circuit (8) connected with the signal processing module (3). The system is characterized in that the integrating processing circuit (9) is further arranged between the signal amplifying circuit (8) and the single-chip microcomputer (4). The system can eliminate imbalance voltages generated by the signal amplifying circuit and prevent signals from being interfered.
Description
Technical field
The present invention relates to a kind of eddy current dynamometric system, specifically refer to a kind of eddy current dynamometric system based on integrating circuit.
Background technology
Electric eddy current dynamometer is the loading measurement of power equipment of current domestic advanced person, especially load in dynamometer test at the power machine of middle low power and micropower, the low speed of each power machine and High speed load dynamometer test aspect, relatively other type measurement of power loading equipemtn, in performance, price, reliability, safeguards there is obvious advantage in complexity etc.Especially in the loading measurement of power of low-speed machinery and micropower machinery, then other method is unrivaled especially.Therefore, replaced powder clutch, hydraulic dynamometer, DC generation unit etc. at a lot of occasion electric eddy current dynamometer, be used for measuring the performance of the power machines such as various motor, gasoline engine, diesel engine, gear case, become the necessaries of type approval test.But current used eddy current dynamometric system carries out to signal the phenomenon that there will be voltage offsets when amplifying process in the process of measured power, thus makes signal be interfered, and affects the accuracy of power test to a great extent.
Summary of the invention
The object of the invention is to overcome the defect that traditional eddy current dynamometric system is easily interfered, a kind of eddy current dynamometric system based on integrating circuit is provided.
Object of the present invention is achieved through the following technical solutions: a kind of eddy current dynamometric system based on integrating circuit, by single-chip microcomputer, the motor control module be connected with single-chip microcomputer, display, operational module, what be connected with motor control module treats measured motor, with treat the electric eddy current dynamometer that measured motor is connected, the signal processing module be connected with electric eddy current dynamometer, the signal amplification circuit be connected with signal processing module, is also provided with Integral Processing circuit between signal amplification circuit and single-chip microcomputer.
Further, described Integral Processing circuit is by companion chip U1, triode VT6, field effect transistor MOS1, amplifier P4, N pole is connected with the VCC pin of companion chip U1, P pole then inputs the diode D6 of pole after resistance R18 as one, this Integral Processing circuit, be serially connected in the polar capacitor C9 between the drain electrode of field effect transistor MOS1 and source electrode, N pole is connected with the negative pole of amplifier P4, P pole then as this Integral Processing circuit another input pole while the voltage stabilizing diode D5 of ground connection, one end is connected with the positive pole of amplifier P4, the resistance R19 that the other end is then connected with the P pole of voltage stabilizing diode D5, N pole is connected with the VCC pin of companion chip U1, the diode D7 that P pole is then connected with the TRI pin of companion chip U1 after resistance R20, one end is connected with the OUT pin of companion chip U1, the resistance R21 that the other end is then connected with the base stage of triode VT6, and one end is connected with the GND pin of companion chip U1, the resistance R22 that the other end is then connected with the collector of triode VT6 forms, the grid of described field effect transistor MOS1 is connected with the P pole of diode D6, its drain then be connected with the positive pole of amplifier P4, its source electrode is then connected with the output terminal of amplifier P4, the RES pin of described companion chip U1 is connected with the N pole of diode D7, DIS pin is then respectively with the P pole of diode D7 and the source electrode of field effect transistor MOS1 is connected, its THRE pin is then connected with the P pole of diode D7, GND pin ground connection, CONT pin are connected with the collector of triode VT6, the emitter of described triode VT6 together with its collector as the output terminal of this Integral Processing circuit.
Described signal amplification circuit is by amplifier P1, amplifier P2, amplifier P3, rejection gate Q1, triode VT5, one end is connected with the negative pole of amplifier P3 after resistance R16, the other end is then in turn through resistance R12 that resistance R11 is connected with the positive pole of amplifier P2 after resistance R14, one end is connected with the positive pole of amplifier P2, the resistance R15 that the other end is then connected with the positive pole of amplifier P3, negative pole is connected with the positive pole of amplifier P1, the polar capacitor C8 that positive pole is then connected with the output terminal of amplifier P1, the resistance R13 be in parallel with polar capacitor C8, and one end is connected with the emitter of triode VT5, the other end then together with the collector of triode VT5 as the resistance R17 of the output terminal of this signal amplification circuit, the negative pole of described amplifier P1 together with the output terminal of amplifier P3 as the input end of this signal amplification circuit, its output terminal is then connected with the positive pole of amplifier P3, minus earth, its output terminal of described amplifier P2 are then connected with the base stage of triode VT5, the positive pole of described rejection gate Q1 is connected with the output terminal of amplifier P2, its negative pole is then respectively with the output terminal of amplifier P3 and resistance R12 is connected with the tie point of resistance R16, output terminal is then connected with the collector of triode VT5.
Described signal processing module is by signal processing circuit, the Sheffer stroke gate control circuit be connected with signal processing circuit, the bistable trigger-action circuit be connected with Sheffer stroke gate control circuit, and form with the rear end transformation output circuit that bistable trigger-action circuit is connected with Sheffer stroke gate control circuit simultaneously.
Described signal processing circuit is by process chip U, the resistance R1 that one end is connected with-SIG the pin of process chip U, the other end is then connected with the BIAS pin of process chip U after resistance R3, one end is connected with-CAR the pin of process chip U, the resistance R2 of other end ground connection, and the resistance R4 that one end is connected with the GMIN pin of process chip U, the other end is then connected with the ADJ pin of process chip U after potentiometer R5 forms;-V the pin of described process chip U is respectively with the tie point of resistance R1 and resistance R3 and bistable trigger-action circuit is connected, its-OUT pin is all connected with Sheffer stroke gate control circuit with+OUT pin; + SIG the pin of described process chip U together with its-V pin as the input end of this signal processing circuit.
Described Sheffer stroke gate control circuit is by Sheffer stroke gate A1, Sheffer stroke gate A2, positive pole is connected with the output terminal of Sheffer stroke gate A1 after polar capacitor C4 through resistance R6 in turn, the polar capacitor C1 of its minus earth, N pole is connected with the tie point of polar capacitor C4 with resistance R6, the diode D1 of P pole ground connection, positive pole is connected with the N pole of diode D1 after resistance R7, the polar capacitor C2 of minus earth, one end is connected with-OUT the pin of process chip U, the resistance R8 that the other end is then connected with the positive pole of Sheffer stroke gate A1, one end is connected with+OUT the pin of process chip U, the resistance R9 that the other end is then connected with the negative pole of Sheffer stroke gate A1, negative pole is connected with the output terminal of Sheffer stroke gate A1, the polar capacitor C5 that positive pole is then connected with the negative pole of Sheffer stroke gate A2, be serially connected in the resistance R10 between the positive pole of Sheffer stroke gate A2 and output terminal, and form with the polar capacitor C7 that resistance R10 is in parallel,-OUT the pin of described process chip U is connected with the positive pole of polar capacitor C1, its+OUT pin is then connected with the positive pole of polar capacitor C2, the negative pole of described Sheffer stroke gate A1 is all connected with bistable trigger-action circuit with its output terminal, the negative pole of described Sheffer stroke gate A2 is connected with bistable trigger-action circuit, its output terminal is then connected with bistable trigger-action circuit and rear end transformation output circuit respectively.
Described bistable trigger-action circuit is by triode VT1, triode VT2, the polar capacitor C3 that positive pole is connected with the collector of triode VT1, negative pole is then connected with the base stage of triode VT2, the polar capacitor C6 that positive pole is connected with the base stage of triode VT1, negative pole is then connected with the emitter of triode VT2, and the diode D2 that N pole is connected with the collector of triode VT2, P pole is then connected with the emitter of triode VT1 forms; The described collector of triode VT1 is connected with the negative pole of Sheffer stroke gate A1, its emitter is then connected with-V the pin of process chip U, base stage is then connected with the negative pole of Sheffer stroke gate A2; The described base stage of triode VT2 is connected with the output terminal of Sheffer stroke gate A1, its emitter is then connected with the output terminal of Sheffer stroke gate A2, collector is then connected with rear end transformation output circuit.
Described rear end transformation output circuit is by transformer T, and triode VT3, triode VT4, be arranged on telefault L1 and the telefault L2 on limit, transformer T source, be arranged on the telefault L3 of transformer T secondary, diode D3, and diode D4 forms; The N pole of described diode D3 is connected with the tap of telefault L1, P pole is then connected with the output terminal of Sheffer stroke gate A2, the P pole of diode D4 is connected with the non-same polarity of telefault L3, its N pole then together with the Same Name of Ends of telefault L3 as the output terminal of this rear end transformation output circuit; The described Same Name of Ends of telefault L1 is connected with the output terminal of Sheffer stroke gate A2, its non-same polarity is then connected with the base stage of triode VT4; The Same Name of Ends of described telefault L2 is connected with the collector of triode VT4, non-same polarity is then connected with the collector of triode VT3, its tap is then connected with the Same Name of Ends of telefault L1; The emitter of described triode VT3 is connected with the emitter of triode VT4, its base stage is then connected with the output terminal of Sheffer stroke gate A2 and the collector of triode VT2 respectively.
In order to reach better effect, described process chip U is preferably LM146 integrated circuit, and companion chip U1 is then preferably NE555 integrated circuit.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) structure of the present invention is simple, and easy to operate, system cost is cheap.
(2) the present invention more saves energy consumption while guaranteeing measuring accuracy, reduces the cost in electromechanical testing process.
(3) the present invention is by the effect of signal amplification circuit, can amplify the torque signal that electric eddy current dynamometer exports, to guarantee that the present invention detects the accuracy of output power of motor to be measured.
(4) the present invention can the offset voltage that produces of erasure signal amplifying circuit, avoids signal to be interfered.
Accompanying drawing explanation
Fig. 1 is one-piece construction schematic diagram of the present invention;
Fig. 2 is signal processing module electrical block diagram of the present invention;
Fig. 3 is signal amplification circuit structural representation of the present invention;
Fig. 4 is Integral Processing electrical block diagram of the present invention.
Reference numeral name in above accompanying drawing is called:
1-treat measured motor, 2-electric eddy current dynamometer, 3-signal processing module, 4-single-chip microcomputer, 5-motor control module, 6-display, 7-operational module, 8-signal amplification circuit, 9-Integral Processing circuit, 31-signal processing circuit, 32-Sheffer stroke gate control circuit, 33-bistable trigger-action circuit, 34-rear end transformation output circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Figure 1, the present invention is by single-chip microcomputer 4, the motor control module 5 be connected with single-chip microcomputer 4, display 6, operational module 7, what be connected with motor control module 5 treats measured motor 1, with the electric eddy current dynamometer 2 treating that measured motor 1 is connected, the signal processing module 3 be connected with electric eddy current dynamometer 2, the signal amplification circuit 8 be connected with signal processing module 3, in order to realize object of the present invention, the present invention is also provided with Integral Processing circuit 9 between signal amplification circuit 8 and single-chip microcomputer 4.
Wherein, single-chip microcomputer 4 is as control center of the present invention.Electric eddy current dynamometer 2 is for detecting the torque signal for the treatment of measured motor and exporting.Signal processing module 3 processes for the torque signal exported electric eddy current dynamometer 2.Signal amplification circuit 8 can carry out amplification process to torque signal, and Integral Processing circuit 9 then for the offset voltage that erasure signal amplifying circuit 8 produces, thus makes the present invention more stable.Single-chip microcomputer 4 can calculate by torque signal the realtime power treating measured motor 1, and is shown intuitively by display 6.Motor control module 5 controls for treating measured motor 1, and staff then can set by operational module 7 output power treating measured motor 1.
During work, start and treat measured motor 1, operator sets the output power treating measured motor 1 on operational module 7, and at this moment single-chip microcomputer 4 sends instruction to motor control module 5, makes it treat measured motor 1 according to the power set by operator and controls.The torque signal of measured motor 1 is treated in electric eddy current dynamometer 2 detections, this torque signal is through signal processing module 3, flow to single-chip microcomputer 4 after the process of signal amplification circuit 8 and Integral Processing circuit 9, single-chip microcomputer 4 is calculated according to torque signal the realtime power for the treatment of measured motor 1 and is shown by display 6.Operator can treating compared with the performance number that the realtime power of measured motor 1 and its are arranged in operational module 7, to judge the performance treating measured motor 1 thus.
In order to reach better effect, the DWD system electric eddy current dynamometer that this electric eddy current dynamometer 2 preferentially adopts Sichuan Cheng Bang observation and control technology company limited to produce realizes, and the electric eddy current dynamometer structure of this series is simple, convenient operating maintenance, braking moment is large, and measuring accuracy is high.And single-chip microcomputer 4, motor control module 5, operational module 7 and display 6 all adopt existing technology to realize.
As shown in Figure 2, signal processing module 3 is by signal processing circuit 31, the Sheffer stroke gate control circuit 32 be connected with signal processing circuit 31, the bistable trigger-action circuit 33 be connected with Sheffer stroke gate control circuit 32, and form with the rear end transformation output circuit 34 that bistable trigger-action circuit 33 is connected with Sheffer stroke gate control circuit 32 simultaneously.
Signal processing circuit 31 is wherein by process chip U, the resistance R1 that one end is connected with-SIG the pin of process chip U, the other end is then connected with the BIAS pin of process chip U after resistance R3, one end is connected with-CAR the pin of process chip U, the resistance R2 of other end ground connection, and the resistance R4 that one end is connected with the GMIN pin of process chip U, the other end is then connected with the ADJ pin of process chip U after potentiometer R5 forms.-V the pin of described process chip U is respectively with the tie point of resistance R1 and resistance R3 and bistable trigger-action circuit 33 is connected, its-OUT pin is all connected with Sheffer stroke gate control circuit 32 with+OUT pin.+ SIG the pin of described process chip U together with its-V pin as the input end of this signal processing circuit 31.In order to better implement the present invention, described process chip U preferentially adopts LM1496 integrated circuit to realize.
Described Sheffer stroke gate control circuit 32 is by Sheffer stroke gate A1, Sheffer stroke gate A2, positive pole is connected with the output terminal of Sheffer stroke gate A1 after polar capacitor C4 through resistance R6 in turn, the polar capacitor C1 of its minus earth, N pole is connected with the tie point of polar capacitor C4 with resistance R6, the diode D1 of P pole ground connection, positive pole is connected with the N pole of diode D1 after resistance R7, the polar capacitor C2 of minus earth, one end is connected with-OUT the pin of process chip U, the resistance R8 that the other end is then connected with the positive pole of Sheffer stroke gate A1, one end is connected with+OUT the pin of process chip U, the resistance R9 that the other end is then connected with the negative pole of Sheffer stroke gate A1, negative pole is connected with the output terminal of Sheffer stroke gate A1, the polar capacitor C5 that positive pole is then connected with the negative pole of Sheffer stroke gate A2, be serially connected in the resistance R10 between the positive pole of Sheffer stroke gate A2 and output terminal, and form with the polar capacitor C7 that resistance R10 is in parallel.-OUT the pin of described process chip U is connected with the positive pole of polar capacitor C1, its+OUT pin is then connected with the positive pole of polar capacitor C2; The negative pole of described Sheffer stroke gate A1 is all connected with bistable trigger-action circuit 33 with its output terminal.The negative pole of described Sheffer stroke gate A2 is connected with bistable trigger-action circuit 33, its output terminal is then connected with bistable trigger-action circuit 33 and rear end transformation output circuit 34 respectively.
Described bistable trigger-action circuit 33 is by triode VT1, triode VT2, the polar capacitor C3 that positive pole is connected with the collector of triode VT1, negative pole is then connected with the base stage of triode VT2, the polar capacitor C6 that positive pole is connected with the base stage of triode VT1, negative pole is then connected with the emitter of triode VT2, and the diode D2 that N pole is connected with the collector of triode VT2, P pole is then connected with the emitter of triode VT1 forms.The described collector of triode VT1 is connected with the negative pole of Sheffer stroke gate A1, its emitter is then connected with-V the pin of process chip U, base stage is then connected with the negative pole of Sheffer stroke gate A2.The described base stage of triode VT2 is connected with the output terminal of Sheffer stroke gate A1, its emitter is then connected with the output terminal of Sheffer stroke gate A2, collector is then connected with rear end transformation output circuit 34.
Described rear end transformation output circuit 34 is by transformer T, and triode VT3, triode VT4, be arranged on telefault L1 and the telefault L2 on limit, transformer T source, be arranged on the telefault L3 of transformer T secondary, diode D3, and diode D4 forms.During connection, the N pole of described diode D3 is connected with the tap of telefault L1, P pole is then connected with the output terminal of Sheffer stroke gate A2, the P pole of diode D4 is connected with the non-same polarity of telefault L3, its N pole then together with the Same Name of Ends of telefault L3 as the output terminal of this rear end transformation output circuit 34; The described Same Name of Ends of telefault L1 is connected with the output terminal of Sheffer stroke gate A2, its non-same polarity is then connected with the base stage of triode VT4; The Same Name of Ends of described telefault L2 is connected with the collector of triode VT4, non-same polarity is then connected with the collector of triode VT3, its tap is then connected with the Same Name of Ends of telefault L1; The emitter of described triode VT3 is connected with the emitter of triode VT4, its base stage is then connected with the output terminal of Sheffer stroke gate A2 and the collector of triode VT2 respectively.
As shown in Figure 3, signal amplification circuit 8 is by amplifier P1, and amplifier P2, amplifier P3, rejection gate Q1, triode VT5, resistance R11, resistance R12, resistance R13, resistance R14, resistance R15, resistance R16, resistance R17, polar capacitor C8 form.During connection, one end of resistance R12 is connected with the negative pole of amplifier P3 after resistance R16, its other end is then connected with the positive pole of amplifier P2 after resistance R14 through resistance R11 in turn, one end of resistance R15 is connected with the positive pole of amplifier P2, its other end is then connected with the positive pole of amplifier P3, the negative pole of polar capacitor C8 is connected with the positive pole of amplifier P1, its positive pole is then connected with the output terminal of amplifier P1, resistance R13 is then in parallel with polar capacitor C8, one end of resistance R17 is connected with the emitter of triode VT5, its other end then together with the collector of triode VT5 as the output terminal of this signal amplification circuit 8.The negative pole of described amplifier P1 is then connected with the positive pole of amplifier P3 as the input end of this signal amplification circuit 8, its output terminal together with the output terminal of amplifier P3.Minus earth, its output terminal of described amplifier P2 are then connected with the base stage of triode VT5.The positive pole of described rejection gate Q1 is connected with the output terminal of amplifier P2, its negative pole is then respectively with the output terminal of amplifier P3 and resistance R12 is connected with the tie point of resistance R16, output terminal is then connected with the collector of triode VT5.
9, Integral Processing circuit is emphasis of the present invention, and as shown in Figure 4, it is by by companion chip U1, triode VT6, field effect transistor MOS1, amplifier P4, resistance R18, resistance R19, resistance R20, resistance R22, resistance R21, voltage stabilizing diode D5, diode D6, triode D7, polar capacitor C9 form.During connection, the N pole of diode D6 is connected with the VCC pin of companion chip U1, its P pole then inputs pole as 9 one, this Integral Processing circuit after resistance R18, polar capacitor C9 is then serially connected between the drain electrode of field effect transistor MOS1 and source electrode, the N pole of voltage stabilizing diode D5 is connected with the negative pole of amplifier P4, its P pole then as this Integral Processing circuit 9 another input pole while ground connection, one end of resistance R19 is connected with the positive pole of amplifier P4, its other end is then connected with the P pole of voltage stabilizing diode D5, the N pole of diode D7 is connected with the VCC pin of companion chip U1, its P pole is then connected with the TRI pin of companion chip U1 after resistance R20, one end of resistance R21 is connected with the OUT pin of companion chip U1, its other end is then connected with the base stage of triode VT6, one end of resistance R22 is connected with the GND pin of companion chip U1, its other end is then connected with the collector of triode VT6.The grid of described field effect transistor MOS1 is connected with the P pole of diode D6, its drain then be connected with the positive pole of amplifier P4, its source electrode is then connected with the output terminal of amplifier P4.The RES pin of described companion chip U1 is connected with the N pole of diode D7, DIS pin is then respectively with the P pole of diode D7 and the source electrode of field effect transistor MOS1 is connected, its THRE pin is then connected with the P pole of diode D7, GND pin ground connection, CONT pin are connected with the collector of triode VT6.The emitter of described triode VT6 together with its collector as the output terminal of this Integral Processing circuit 9.In order to better implement the present invention, this companion chip U1 preferentially adopts NE555 integrated circuit to realize.
As mentioned above, just well the present invention can be realized.
Claims (9)
1. the eddy current dynamometric system based on integrating circuit, by single-chip microcomputer (4), the motor control module (5) be connected with single-chip microcomputer (4), display (6), operational module (7), what be connected with motor control module (5) treats measured motor (1), with the electric eddy current dynamometer (2) treating that measured motor (1) is connected, the signal processing module (3) be connected with electric eddy current dynamometer (2), the signal amplification circuit (8) be connected with signal processing module (3) forms, it is characterized in that: between signal amplification circuit (8) and single-chip microcomputer (4), be also provided with Integral Processing circuit (9), described Integral Processing circuit (9) is by companion chip U1, triode VT6, field effect transistor MOS1, amplifier P4, N pole is connected with the VCC pin of companion chip U1, P pole then inputs the diode D6 of pole after resistance R18 as (9) one, this Integral Processing circuit, be serially connected in the polar capacitor C9 between the drain electrode of field effect transistor MOS1 and source electrode, N pole is connected with the negative pole of amplifier P4, P pole then as this Integral Processing circuit (9) another input pole while the voltage stabilizing diode D5 of ground connection, one end is connected with the positive pole of amplifier P4, the resistance R19 that the other end is then connected with the P pole of voltage stabilizing diode D5, N pole is connected with the VCC pin of companion chip U1, the diode D7 that P pole is then connected with the TRI pin of companion chip U1 after resistance R20, one end is connected with the OUT pin of companion chip U1, the resistance R21 that the other end is then connected with the base stage of triode VT6, and one end is connected with the GND pin of companion chip U1, the resistance R22 that the other end is then connected with the collector of triode VT6 forms, the grid of described field effect transistor MOS1 is connected with the P pole of diode D6, its drain then be connected with the positive pole of amplifier P4, its source electrode is then connected with the output terminal of amplifier P4, the RES pin of described companion chip U1 is connected with the N pole of diode D7, DIS pin is then respectively with the P pole of diode D7 and the source electrode of field effect transistor MOS1 is connected, its THRE pin is then connected with the P pole of diode D7, GND pin ground connection, CONT pin are connected with the collector of triode VT6, the emitter of described triode VT6 together with its collector as the output terminal of this Integral Processing circuit (9).
2. a kind of eddy current dynamometric system based on integrating circuit according to claim 1, it is characterized in that: described signal amplification circuit (8) is by amplifier P1, amplifier P2, amplifier P3, rejection gate Q1, triode VT5, one end is connected with the negative pole of amplifier P3 after resistance R16, the other end is then in turn through resistance R12 that resistance R11 is connected with the positive pole of amplifier P2 after resistance R14, one end is connected with the positive pole of amplifier P2, the resistance R15 that the other end is then connected with the positive pole of amplifier P3, negative pole is connected with the positive pole of amplifier P1, the polar capacitor C8 that positive pole is then connected with the output terminal of amplifier P1, the resistance R13 be in parallel with polar capacitor C8, and one end is connected with the emitter of triode VT5, the other end then together with the collector of triode VT5 as the resistance R17 of the output terminal of this signal amplification circuit (8), the negative pole of described amplifier P1 together with the output terminal of amplifier P3 as the input end of this signal amplification circuit (8), its output terminal is then connected with the positive pole of amplifier P3, minus earth, its output terminal of described amplifier P2 are then connected with the base stage of triode VT5, the positive pole of described rejection gate Q1 is connected with the output terminal of amplifier P2, its negative pole is then respectively with the output terminal of amplifier P3 and resistance R12 is connected with the tie point of resistance R16, output terminal is then connected with the collector of triode VT5.
3. a kind of eddy current dynamometric system based on integrating circuit according to claim 2, it is characterized in that: described signal processing module (3) is by signal processing circuit (31), the Sheffer stroke gate control circuit (32) be connected with signal processing circuit (31), the bistable trigger-action circuit (33) be connected with Sheffer stroke gate control circuit (32), and form with rear end transformation output circuit (34) that bistable trigger-action circuit (33) is connected with Sheffer stroke gate control circuit (32) simultaneously.
4. a kind of eddy current dynamometric system based on integrating circuit according to claim 3, it is characterized in that: described signal processing circuit (31) is by process chip U, the resistance R1 that one end is connected with-SIG the pin of process chip U, the other end is then connected with the BIAS pin of process chip U after resistance R3, one end is connected with-CAR the pin of process chip U, the resistance R2 of other end ground connection, and the resistance R4 that one end is connected with the GMIN pin of process chip U, the other end is then connected with the ADJ pin of process chip U after potentiometer R5 forms;-V the pin of described process chip U is respectively with the tie point of resistance R1 and resistance R3 and bistable trigger-action circuit (33) is connected, its-OUT pin is all connected with Sheffer stroke gate control circuit (32) with+OUT pin; + SIG the pin of described process chip U together with its-V pin as the input end of this signal processing circuit (31).
5. a kind of eddy current dynamometric system based on integrating circuit according to claim 4, it is characterized in that: described Sheffer stroke gate control circuit (32) is by Sheffer stroke gate A1, Sheffer stroke gate A2, positive pole is connected with the output terminal of Sheffer stroke gate A1 after polar capacitor C4 through resistance R6 in turn, the polar capacitor C1 of its minus earth, N pole is connected with the tie point of polar capacitor C4 with resistance R6, the diode D1 of P pole ground connection, positive pole is connected with the N pole of diode D1 after resistance R7, the polar capacitor C2 of minus earth, one end is connected with-OUT the pin of process chip U, the resistance R8 that the other end is then connected with the positive pole of Sheffer stroke gate A1, one end is connected with+OUT the pin of process chip U, the resistance R9 that the other end is then connected with the negative pole of Sheffer stroke gate A1, negative pole is connected with the output terminal of Sheffer stroke gate A1, the polar capacitor C5 that positive pole is then connected with the negative pole of Sheffer stroke gate A2, be serially connected in the resistance R10 between the positive pole of Sheffer stroke gate A2 and output terminal, and form with the polar capacitor C7 that resistance R10 is in parallel,-OUT the pin of described process chip U is connected with the positive pole of polar capacitor C1, its+OUT pin is then connected with the positive pole of polar capacitor C2, the negative pole of described Sheffer stroke gate A1 is all connected with bistable trigger-action circuit (33) with its output terminal, the negative pole of described Sheffer stroke gate A2 is connected with bistable trigger-action circuit (33), its output terminal is then connected with bistable trigger-action circuit (33) and rear end transformation output circuit (34) respectively.
6. a kind of eddy current dynamometric system based on integrating circuit according to claim 5, it is characterized in that: described bistable trigger-action circuit (33) is by triode VT1, triode VT2, the polar capacitor C3 that positive pole is connected with the collector of triode VT1, negative pole is then connected with the base stage of triode VT2, the polar capacitor C6 that positive pole is connected with the base stage of triode VT1, negative pole is then connected with the emitter of triode VT2, and the diode D2 that N pole is connected with the collector of triode VT2, P pole is then connected with the emitter of triode VT1 forms; The described collector of triode VT1 is connected with the negative pole of Sheffer stroke gate A1, its emitter is then connected with-V the pin of process chip U, base stage is then connected with the negative pole of Sheffer stroke gate A2; The described base stage of triode VT2 is connected with the output terminal of Sheffer stroke gate A1, its emitter is then connected with the output terminal of Sheffer stroke gate A2, collector is then connected with rear end transformation output circuit (34).
7. a kind of eddy current dynamometric system based on integrating circuit according to claim 6, it is characterized in that: described rear end transformation output circuit (34) is by transformer T, triode VT3, triode VT4, be arranged on telefault L1 and the telefault L2 on limit, transformer T source, be arranged on the telefault L3 of transformer T secondary, diode D3, and diode D4 forms; The N pole of described diode D3 is connected with the tap of telefault L1, P pole is then connected with the output terminal of Sheffer stroke gate A2, the P pole of diode D4 is connected with the non-same polarity of telefault L3, its N pole then together with the Same Name of Ends of telefault L3 as the output terminal of this rear end transformation output circuit (34); The described Same Name of Ends of telefault L1 is connected with the output terminal of Sheffer stroke gate A2, its non-same polarity is then connected with the base stage of triode VT4; The Same Name of Ends of described telefault L2 is connected with the collector of triode VT4, non-same polarity is then connected with the collector of triode VT3, its tap is then connected with the Same Name of Ends of telefault L1; The emitter of described triode VT3 is connected with the emitter of triode VT4, its base stage is then connected with the output terminal of Sheffer stroke gate A2 and the collector of triode VT2 respectively.
8. a kind of eddy current dynamometric system based on integrating circuit according to claim 7, is characterized in that: described process chip U is LM146 integrated circuit.
9. a kind of eddy current dynamometric system based on integrating circuit according to any one of claim 1 ~ 7, is characterized in that: described companion chip U1 is NE555 integrated circuit.
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