CN104981771B - 基于标量寄存器数据值的向量寄存器寻址和功能 - Google Patents

基于标量寄存器数据值的向量寄存器寻址和功能 Download PDF

Info

Publication number
CN104981771B
CN104981771B CN201480008139.9A CN201480008139A CN104981771B CN 104981771 B CN104981771 B CN 104981771B CN 201480008139 A CN201480008139 A CN 201480008139A CN 104981771 B CN104981771 B CN 104981771B
Authority
CN
China
Prior art keywords
register
processor
vrf
vector
aligned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201480008139.9A
Other languages
English (en)
Chinese (zh)
Other versions
CN104981771A (zh
Inventor
阿贾伊·阿南塔·英格尔
马克·M·霍夫曼
乔斯·弗里德曼
卢西恩·科德雷斯库
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN104981771A publication Critical patent/CN104981771A/zh
Application granted granted Critical
Publication of CN104981771B publication Critical patent/CN104981771B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30163—Decoding the operand specifier, e.g. specifier format with implied specifier, e.g. top of stack
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
CN201480008139.9A 2013-02-26 2014-02-21 基于标量寄存器数据值的向量寄存器寻址和功能 Active CN104981771B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/777,297 US9632781B2 (en) 2013-02-26 2013-02-26 Vector register addressing and functions based on a scalar register data value
US13/777,297 2013-02-26
PCT/US2014/017713 WO2014133895A2 (en) 2013-02-26 2014-02-21 Vector register addressing and functions based on a scalar register data value

Publications (2)

Publication Number Publication Date
CN104981771A CN104981771A (zh) 2015-10-14
CN104981771B true CN104981771B (zh) 2018-05-04

Family

ID=50272743

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480008139.9A Active CN104981771B (zh) 2013-02-26 2014-02-21 基于标量寄存器数据值的向量寄存器寻址和功能

Country Status (6)

Country Link
US (1) US9632781B2 (enExample)
EP (1) EP2962187B1 (enExample)
JP (1) JP6293795B2 (enExample)
KR (1) KR101753900B1 (enExample)
CN (1) CN104981771B (enExample)
WO (1) WO2014133895A2 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10001995B2 (en) * 2015-06-02 2018-06-19 Intel Corporation Packed data alignment plus compute instructions, processors, methods, and systems
US20170177355A1 (en) * 2015-12-18 2017-06-22 Intel Corporation Instruction and Logic for Permute Sequence
US11243958B2 (en) 2015-12-31 2022-02-08 Teradata Us, Inc. Implementing contract-based polymorphic and parallelizable SQL user-defined scalar and aggregate functions
CN106990940B (zh) * 2016-01-20 2020-05-22 中科寒武纪科技股份有限公司 一种向量计算装置及运算方法
US10762164B2 (en) 2016-01-20 2020-09-01 Cambricon Technologies Corporation Limited Vector and matrix computing device
US10296337B2 (en) * 2016-03-21 2019-05-21 International Business Machines Corporation Preventing premature reads from a general purpose register
GB2548600B (en) * 2016-03-23 2018-05-09 Advanced Risc Mach Ltd Vector predication instruction
CN111651205B (zh) * 2016-04-26 2023-11-17 中科寒武纪科技股份有限公司 一种用于执行向量内积运算的装置和方法
US20180217838A1 (en) * 2017-02-01 2018-08-02 Futurewei Technologies, Inc. Ultra lean vector processor
KR102343652B1 (ko) * 2017-05-25 2021-12-24 삼성전자주식회사 벡터 프로세서의 서열 정렬 방법
US11126588B1 (en) * 2020-07-28 2021-09-21 Shenzhen GOODIX Technology Co., Ltd. RISC processor having specialized registers
CN114816769B (zh) * 2022-06-08 2025-11-14 中科南京智能技术研究院 一种向量处理器处理方法及系统
US12373210B2 (en) * 2022-12-02 2025-07-29 SiFive, Inc. Transfer buffer between a scalar pipeline and vector pipeline
US20260050571A1 (en) * 2024-08-14 2026-02-19 Advanced Micro Devices, Inc. Quantization prediction for block data
CN119847945B (zh) * 2025-03-19 2025-06-06 极芯通讯技术(安吉)有限公司 向量寄存器装置、向量寄存器寻址方法及电子设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030163667A1 (en) * 2001-10-31 2003-08-28 Alphamosaic Limited Vector processing system
CN1894659A (zh) * 2003-12-09 2007-01-10 Arm有限公司 在寄存器和存储器之间移动数据的数据处理设备和方法
US20090172348A1 (en) * 2007-12-26 2009-07-02 Robert Cavin Methods, apparatus, and instructions for processing vector data

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5922066A (en) 1997-02-24 1999-07-13 Samsung Electronics Co., Ltd. Multifunction data aligner in wide data width processor
US7197625B1 (en) 1997-10-09 2007-03-27 Mips Technologies, Inc. Alignment and ordering of vector elements for single instruction multiple data processing
US5933650A (en) * 1997-10-09 1999-08-03 Mips Technologies, Inc. Alignment and ordering of vector elements for single instruction multiple data processing
GB2372848B (en) 2001-02-20 2004-10-27 Advanced Risc Mach Ltd Data processing using a coprocessor
US7376812B1 (en) 2002-05-13 2008-05-20 Tensilica, Inc. Vector co-processor for configurable and extensible processor architecture
JP2005535966A (ja) * 2002-08-09 2005-11-24 インテル・コーポレーション アライメントまたはブロードキャスト命令を含むマルチメディア・コプロセッサの制御メカニズム
US6986023B2 (en) * 2002-08-09 2006-01-10 Intel Corporation Conditional execution of coprocessor instruction based on main processor arithmetic flags
US7574409B2 (en) 2004-11-04 2009-08-11 Vericept Corporation Method, apparatus, and system for clustering and classification
US7620797B2 (en) 2006-11-01 2009-11-17 Apple Inc. Instructions for efficiently accessing unaligned vectors
GB2444744B (en) 2006-12-12 2011-05-25 Advanced Risc Mach Ltd Apparatus and method for performing re-arrangement operations on data
US8255446B2 (en) * 2006-12-12 2012-08-28 Arm Limited Apparatus and method for performing rearrangement and arithmetic operations on data
US7783860B2 (en) 2007-07-31 2010-08-24 International Business Machines Corporation Load misaligned vector with permute and mask insert
US10387151B2 (en) 2007-12-31 2019-08-20 Intel Corporation Processor and method for tracking progress of gathering/scattering data element pairs in different cache memory banks
US7865693B2 (en) 2008-10-14 2011-01-04 International Business Machines Corporation Aligning precision converted vector data using mask indicating offset relative to element boundary corresponding to precision type
US8607033B2 (en) 2010-09-03 2013-12-10 Lsi Corporation Sequentially packing mask selected bits from plural words in circularly coupled register pair for transferring filled register bits to memory
US8904153B2 (en) 2010-09-07 2014-12-02 International Business Machines Corporation Vector loads with multiple vector elements from a same cache line in a scattered load operation
US20120254589A1 (en) * 2011-04-01 2012-10-04 Jesus Corbal San Adrian System, apparatus, and method for aligning registers

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030163667A1 (en) * 2001-10-31 2003-08-28 Alphamosaic Limited Vector processing system
CN1894659A (zh) * 2003-12-09 2007-01-10 Arm有限公司 在寄存器和存储器之间移动数据的数据处理设备和方法
US20090172348A1 (en) * 2007-12-26 2009-07-02 Robert Cavin Methods, apparatus, and instructions for processing vector data

Also Published As

Publication number Publication date
WO2014133895A2 (en) 2014-09-04
US9632781B2 (en) 2017-04-25
CN104981771A (zh) 2015-10-14
US20140244967A1 (en) 2014-08-28
EP2962187B1 (en) 2018-03-28
KR20150122195A (ko) 2015-10-30
KR101753900B1 (ko) 2017-07-04
JP6293795B2 (ja) 2018-03-14
JP2016511470A (ja) 2016-04-14
EP2962187A2 (en) 2016-01-06
WO2014133895A3 (en) 2014-10-23

Similar Documents

Publication Publication Date Title
US11714642B2 (en) Systems, methods, and apparatuses for tile store
JP6293795B2 (ja) スカラーレジスタデータ値に基づいたベクトルレジスタアドレス指定および関数
CN108351830B (zh) 用于存储器损坏检测的硬件装置和方法
EP3588281A1 (en) Apparatus and method for a tensor permutation engine
CN104025020B (zh) 用于执行掩码位压缩的系统、装置以及方法
US9477467B2 (en) Processors, methods, and systems to implement partial register accesses with masked full register accesses
US9411600B2 (en) Instructions and logic to provide memory access key protection functionality
CN104011663B (zh) 掩码寄存器上的广播操作
KR101851439B1 (ko) 충돌 검출을 수행하고, 레지스터의 콘텐츠를 다른 레지스터의 데이터 구성요소 위치들로 브로드캐스트하기 위한 시스템들, 장치들 및 방법들
KR101934760B1 (ko) 단일 명령어에 응답하여 회전 및 xor을 수행하기 위한 시스템들, 장치들, 및 방법들
CN107145335B (zh) 用于大整数运算的向量指令的装置和方法
KR20110055629A (ko) 단일 명령 다중 데이터（ｓｉｍｄ）데이터 처리기에서 확장된 어드레싱 모드들의 제공
JP6773378B2 (ja) ３ｄ座標から３ｄのｚ曲線インデックスを計算するための機械レベル命令
CN110941448A (zh) 用于片聚集和片分散的装置和方法
EP4202651A1 (en) Apparatus and method for vector packed concatenate and shift of specific portions of quadwords
EP3391194A1 (en) Instruction and logic for permute sequence
CN101911011A (zh) 确定表内的元素的地址的系统和方法
EP2889755A2 (en) Systems, apparatuses, and methods for expand and compress
US20140281395A1 (en) Systems, Apparatuses, and Methods for Reducing the Number of Short Integer Multiplications
WO2019005084A1 (en) SYSTEMS, APPARATUSES, AND METHODS FOR VECTORIZED FRACTIONAL MULTIPLICATION OF SIGNED WORDS COMPRISING HIGH RESULTS BOROUGH, SATURATION, AND SELECTION
US9207942B2 (en) Systems, apparatuses,and methods for zeroing of bits in a data element
WO2013095582A1 (en) Systems, apparatuses, and methods for extracting a writemask from a register

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant