CN104919605B - Vertical solid state transducer and high voltage solid state transducer and associated system and method with buried contact - Google Patents

Vertical solid state transducer and high voltage solid state transducer and associated system and method with buried contact Download PDF

Info

Publication number
CN104919605B
CN104919605B CN201380063850.XA CN201380063850A CN104919605B CN 104919605 B CN104919605 B CN 104919605B CN 201380063850 A CN201380063850 A CN 201380063850A CN 104919605 B CN104919605 B CN 104919605B
Authority
CN
China
Prior art keywords
contact
sst
semi
transducer
conducting material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201380063850.XA
Other languages
Chinese (zh)
Other versions
CN104919605A (en
Inventor
弗拉基米尔·奥德诺博柳多夫
马丁·F·舒伯特
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/708,526 external-priority patent/US8963121B2/en
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of CN104919605A publication Critical patent/CN104919605A/en
Application granted granted Critical
Publication of CN104919605B publication Critical patent/CN104919605B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

Solid state transducer " SST " and vertical high voltage SST disclosed herein with buried contact.Transducer architecture can be included according to the SST bare dies of specific embodiment, the transducer architecture has:First semi-conducting material, in the first side position of the transducer architecture;And second semi-conducting material, at the second side of the transducer architecture.The SST can further include:Multiple first contacts in the first side position and are electrically coupled to first semi-conducting material;And multiple second contacts, it extends to second semi-conducting material from first side and is electrically coupled to second semi-conducting material.Interconnection piece can be formed between at least one first contact and second contact.The interconnection piece can be covered with multiple encapsulating materials.

Description

Vertical solid state transducer and high voltage solid state transducer with buried contact and Associated system and method
Technical field
The technology of the present invention is related to high voltage solid state transducer and manufacture solid state transducer and high voltage solid state transducer is naked The method of piece.In particular, the technology of the present invention is related to vertical high voltage solid state transducer and correlation with buried contact Join system and method.
Background technology
Solid-state lighting (" SSL ") device is designed to using light emitting diode (" LED "), Organic Light Emitting Diode (" OLED ") and/or polymer LED (" PLED ") rather than electric lamp filament, plasma or gas are as irradiation source.Such as The solid-state device of LED by across through opposite dopant material apply biasing with from the intervention active region of semi-conducting material generate light and Convert electric energy to light.SSL device is incorporated into the various products comprising common consumer electronics device and application.It lifts For example, mobile phone, personal digital assistant (" PDA "), digital camera, MP3 player and other portable electron devices profit Back lighting is carried out with SSL device.In addition, SSL device is additionally operable to traffic lighting, signboard, room lighting, outdoor lighting and other The general irradiation of type.
Microelectronic device manufacturers are being developed needs high light output more multiple with better performance simultaneously in smaller size Miscellaneous device.In order to meet current design criterion, LED makes the area occupied for having reduction, thinner profile and is then serially coupled into High voltage array.In a particular embodiment, indivedual SSL bare dies can include more than one LED junction of series coupled.
Figure 1A is be shown as the conventional high voltage SSL device 10a with connect in the landscape configuration two knots transversal Face figure.As shown in Figure 1A, high voltage SSL device 10a include substrate 20, the substrate supporting by insulating materials 12 each other The multiple LED structures 11 (being individually identified as the first LED structure 11a and the second LED structure 11b) being electrically isolated.Each LED structure 11a, 11b have the 14 (example of active region being positioned between the material adulterated through p-type GaN 15 and the material adulterated through N-type GaN16 Such as, containing gallium nitride/InGaN (GaN/InGaN) multiple quantum wells (" MQW ")).High voltage SSL device 10a also matches somebody with somebody laterally It puts comprising the first contact 17 on p-type GaN 15 and the second contact 19 on N-type GaN 16.Indivedual SSL structures 11a, 11b are led to It crosses recess 22 to separate, a part of N-type GaN16 is exposed by the recess.Interconnection piece 24 is electrically connected two neighbours by recess 22 Nearly SSL structure 11a, 11b.In operation, electric power is provided via contact 17,19 to SSL device 10, so as to which active region 14 be caused to send out Penetrate light.
Figure 1B is that the first contact 17 and the second contact 19 are relative to each other wherein (for example) in vertical rather than landscape configuration The cross-sectional view of another routine LED matrix 10b.During the formation of LED matrix 10b, similar to the substrate shown in Figure 1A 20 growth substrates (not showing) initially carry N-type GaN 15, active region 14 and p-type GaN 16.First contact 17 is placed in P On type GaN 16, and carrier 21 is attached to the first contact 17.Substrate is removed, so as to allow the second contact 19 being placed in N-type On GaN 15.Then the structure is inverted to generate the orientation shown in Figure 1B.In LED matrix 10b, the first contact 17 Reflectivity and conductive material (for example, silver or aluminium) are generally comprised to guide light towards N-type GaN 15.Then, equipment will can be converted Material 23 and encapsulant 25 are positioned at one above the other in LED structure 11.In operation, LED structure 11 can emit the first transmitting (example Such as, blue light), first transmitting stimulates converter material 23 (for example, phosphor) to emit the second transmitting (for example, yellow Light).The combination of first transmitting and the second transmitting can generate the light (for example, white light) of wanted color.
Vertical LED device 10b, which usually has, configures high efficiency than horizontal LED matrix.For example, greater efficiency can be The result of the current expansion of enhancing, light extraction and thermal property.However, despite the presence of improved thermal property, but LED matrix 10b Still generate the notable heat being layered and/or cause other damages to encapsulated device that can cause between various structures or area. In addition, as shown in Figure 1B, vertical LED device 10b need to the both sides of bare die access to be formed with the first contact 17 and The electrical connection of second contact 19, and at least one wire bonding for being coupled to the second contact 19 is generally comprised, this can increase device and account for With area and the complexity of making.Some processing steps in conventional LED bare processing step have been arrested and have been limited to encapsulate level (example Such as, after singulation at bare die level (Figure 1B)) to realize high-performance during processing step and prevent the damage to device. It is such to encapsulate the increase of level processing step to the demand of manufacturing recourses (such as time and cost) and have other undesirable Result (such as surface roughening of encapsulation).Therefore, it is still necessary to promote encapsulation and there is improved performance and reliability Vertical LED, vertical high voltage LED bare and other solid-state devices.
Description of the drawings
Many aspects of the present invention are better understood with reference to figures below.Component in the schema is not necessarily to scale. But, it is preferred that emphasis is clearly illustrate the principle of the present invention.In addition, in the schema, throughout several views, identical ginseng Examine number mark corresponding part.
Figure 1A and 1B is the schematic cross section according to the LED matrix of prior art arrangement.
Fig. 2A to 2L is the process for being used to be formed solid state transducer for illustrating the embodiment of technology according to the present invention Partial schematic plan view and cross-sectional view.
Fig. 3 A and 3B are the mistakes for being used to be formed solid state transducer for illustrating the other embodiments of technology according to the present invention The cross-sectional view of the other parts of journey.
Fig. 4 A to 4C are to illustrate to form the multiple solid of another embodiment configuration with technology according to the present invention The schematic plan view of the part of the process of the wafer level sub-assembly of state energy converter.
Specific embodiment
The specific detail of solid state transducer (" SST ") and several embodiments of associated system and method is described below. Term " SST " is often referred to solid-state device, and it includes the semi-conducting materials as interaction medium to convert electric energy in visible ray The electromagnetic radiation of spectrum, ultraviolet spectra, infrared spectrum and/or other spectrum.For example, SST includes solid-state light emitters (example Such as, LED, laser diode etc.) and/or de-energization light silk, plasma or gas outside other emission sources.SST is alternately wrapped Containing the solid-state device for converting electromagnetic radiation into electricity.In addition, the context depending on wherein using term " substrate ", substrate can refer to Wafer level substrate refers to singulated device level substrate.Those skilled in the relevant art will also be understood that the technology of the present invention can With Additional examples of composition, and can be real in the case of without below with reference to the number person in the details of Fig. 2A to 4C described embodiments Trample the technology of the present invention.
Fig. 2A to 4C is that the signal for the process for forming SST of the embodiment of technology according to the present invention that illustrates is mild-natured Face figure and cross-sectional view.Fig. 2A to 2L diagram illustratings show each portion of the process of single SST bare dies 200 for clarity Point;However, it should be understood that illustrated step can be implemented in wafer level for process described herein is used to walk It is rapid to generate multiple SST bare dies 200 simultaneously.For example, Fig. 2A and 2B illustrate in process in growth substrates 220 The SST bare dies 200 at stage after upper formation transducer architecture 202.As shown in Fig. 2 B, SST bare dies 200 have first The side 201a and the second side 201b back to the first side 201a.Collective reference Fig. 2A and Fig. 2 B, SST bare die 200 can be included transducing Device structure 202 is separated into multiple features of multiple knots 203 (being individually identified as knot 203a to 203i).For example, it is naked from SST The groove 208 that first side 201a of piece 200 extends through transducer architecture 202 to substrate 220 can be formed in SST bare dies Indivedual knots 203 and neighbouring or other knots 203 are separated and are electrically isolated on 200.
Transducer architecture 202 can include:First semi-conducting material 210, at the first side 201a;Second semi-conducting material 212, at the second side 201b;And active region 214, be located at the first semi-conducting material 210 and the second semi-conducting material 212 it Between.In other embodiments, transducer architecture 202 can also include silicon nitride, aluminium nitride (AlN) and/or other suitable centre Material.
First semi-conducting material 210 and the second semi-conducting material 212 can be doped semi-conducting material.In one embodiment In, the first semi-conducting material 210 can be p-type semiconductor material (for example, P-GaN), and the second semi-conducting material 212 can be N-type Semi-conducting material (for example, N-GaN).In other embodiments, the first semi-conducting material 210 and the second semi-conducting material can be overturned 212.In other embodiments, the first semi-conducting material 210 and the second semi-conducting material 212 can be individually comprising in the followings At least one:GaAs (GaAs), aluminum gallium arsenide (AlGaAs), gallium arsenide phosphide (GaAsP), gallium phosphide (III) (GaP), selenium Change zinc (ZnSe), boron nitride (BN), aluminium gallium nitride alloy (AlGaN) and/or other suitable semi-conducting material.
Active region 214 between first semi-conducting material 210 and the second semi-conducting material 212 can include single Quantum Well (" SQW "), MQW and/or individual particle semi-conducting material (for example, InGaN).In one embodiment, individual particle semi-conducting material (such as InGaN) can have greater than about 10 nanometers and be up to about 500 nanometers of thickness.In a particular embodiment, active region 214 can Include InGaN SQW, GaN/InGaN MQW and/or InGaN block materials.In other embodiments, active region 214 can include AlGaInP (AlGaInP), aluminum indium gallium nitride (AlGaInN) and/or other suitable material or configuration.
In a particular embodiment, in the first semi-conducting material 210,214 and second semi-conducting material 212 of active region at least One can via metal organic chemical vapor deposition (" MOCVD "), molecular beam epitaxy (" MBE "), liquid phase epitaxy (" LPE ") and/ Or mixing vapour phase epitaxy (" HVPE ") is formed in growth substrates 220.In other embodiments, transducer architecture 202 is at least Other suitable growth technology can be used to be formed for a part.
As shown in Fig. 2A and 2B, the first contact 204 can be formed on the first semi-conducting material 210.In some implementations In example, the first contact 204 may extend away in the most of top for first semi-conducting material 210 that underlies.In other embodiments, first Contact 204 can be formed above the smaller portions of the first semi-conducting material 210.In specific arrangements, the first contact 204 can be mirror And/or nickel (Ni), silver-colored (Ag), copper (Cu), aluminium (Al), tungsten (W) and/or other reflectivity materials (are included by reflectivity slider material Material) it is made.As illustrated in Fig. 2A and 2B, the first contact 204 can be to be formed at touching for 210 top of the first semi-conducting material The continuous overlay of point material;However, in other embodiments, SST bare dies 200 can be independent at the first side 201a comprising being positioned at The overlay part of reflex components and the first semi-conducting material 210.It, can be by transducer architecture 202 during subsequent processing stage It is inverted so that the first contact of reflectivity 204 may pass through active region 214 and the second side 201b towards SST bare dies 200 is rebooted Emit (for example, light) (Fig. 2 B).In other embodiments, the first contact 204 can be made of non-reflective materials and/or SST is naked Piece 200 can not include reflex components.Chemical vapor deposition (" CVD "), physical vapour deposition (PVD) (" PVD "), atomic layer can be used It deposits (" ALD "), spin coating, patterning and/or other suitable technology known in the art and forms the first contact 204.
Second contact 206 can include from the first side 201a of SST bare dies 200 extend to the second semi-conducting material 212 or to Multiple buried contact elements 215 in second semi-conducting material 212.With reference to figure 2B, buried contact element 215 can by Etched in transducer architecture 202 or form multiple passages in other ways or opening 219 and is formed, the passage or be open from changing The first side 201a (for example, the first contact 204 or first semi-conducting material 210) of energy device structure 202 extends to the second semiconductor Material 212 or into the second semi-conducting material 212.In one embodiment, opening 219 can be the first semi-conducting material 210 It is upper form the first contact 204 before formed and may extend into a part for the second semi-conducting material 212 or to the second semiconductor material (as shown in Fig. 2 B) in a part for material 212.In another embodiment, opening 219 can be the first of SST bare dies 200 The first slider material 204 is formed at the 201a of side to be formed afterwards.The etched side wall of opening 219 can be coated with dielectric substance 218 With the second contact material that is electrically insulated along the path for extending through the first contact 204, the first semi-conducting material 210 and active region 214 Material 216.Dielectric substance 218 can include silica (SiO2), silicon nitride (SiN) and/or other suitable dielectric substance And opening can be deposited on via known other suitable technology in CVD, PVD, ALD, patterning and/or semiconductor fabrication techniques In 219.
It, can be by disposing the second slider material 216 in through insulated openings 219 with the second half in next process steps Be exposed through part of the conductor material 212 in opening 219 is electrically connected to form buried contact element 215.Second slider material 216 can include titanium (Ti), aluminium (Al), nickel (Ni), silver-colored (Ag) and/or other suitable conductive material.Usable CVD, PVD, ALD, patterning and/or other known suitable technology deposit the second slider material 216.Therefore, as shown in Fig. 2A and 2B, Both the first contact 204 and the second contact 206 can be accessed from the first side 201a electricity of SST bare dies 200.
It is that 204 top of the first contact forms dielectric substance 222 (for example, blunt during Fig. 2 C and 2D diagram illustrating Change material) after stage.In addition to other functions, dielectric substance 222 is also protecting 202 (its of transducer architecture that underlie In be shown in phantom special characteristic in fig. 2 c for clarity) exempt from affected by environment and prevent the first contact 204 and second Contact 206 is electrically short-circuited to each other.Dielectric substance 222 can be identical to or different from the dielectric substance 218 in opening 219.Citing comes It says, dielectric substance 222 can include silicon nitride (SiN), silica (SiO2), polyimides and/or other suitable insulation Material.As demonstrated in Figure 2 C, dielectric substance 222 can include the aperture 224 of the part of the first contact 204 of exposure.Schemed In the embodiment for solving explanation, dielectric substance 222 is included ties each of 203a to 203i associated rectangular opening with indivedual Mouth 224.However, in other embodiments, dielectric substance 222 can include more or fewer apertures 224 and/or aperture 224 There can be different shape (for example, square, circle, irregular shape etc.).Can be used CVD, PVD, patterning, spin coating and/or Other suitable forming method forms dielectric substance 222.Can dielectric substance 222 be removed by selective deposition or selectivity Part and form aperture 224.In the illustrated embodiment, dielectric substance 222 is located so as to be exposed through first Contact 204 with being exposed through that the second contact 206 is distanced from one another cross to open, and therefore reduce during subsequent processing by the contact that This short-circuit possibility.
As shown in Fig. 2 C and 2D, dielectric substance 222 does not cover buried contact element 215.In specific embodiment In, the second contact 206 on a knot (for example, knot 203d) can be electrically coupled to proximity junction (example by interconnection piece 225 via aperture 224 Such as, tie 203e) on the first contact 204 so that described knot (for example, knot 203d and 203e) series coupled.It can be by being situated between in electricity 222 top of material deposits interconnection line between buried contact element 215 and the first contact 204 exposed by aperture 224 226 and form interconnection piece 225.It touches first contact of the electric isolution of dielectric substance 222 204 and second underlie under interconnection line 226 Point 206.Interconnection line 226 (can include those materials for the second slider material 216, such as nickel by suitable conductive material (Ni), silver-colored (Ag), copper (Cu), aluminium (Al), tungsten (W) and/or other suitable conductive material) it is made and deposition, pattern can be used Change and/or other suitable method known in the art is formed.
As demonstrated in Figure 2 C, SST bare dies 200 include the first external terminal 205 that can be positioned on knot 203a.Outside first Portion's terminal 205 can be that the first contact 204 can be exposed through part by tie that the aperture 224 at 203a accesses.Generally, One external terminal 205 is related to the first knot (for example, knot 203a) in the knot (for example, knot 203a to 203i) of multiple series coupleds Connection;However, in other embodiments, the first external terminal 205 can be associated with another knot 203b to 203i.Similar to it is other Each of indivedual knot 203b to 203i associated rectangular apertures 224, can be via the exposure first in dielectric substance 222 The rectangular apertures 224 of the part of contact 204 form the first external terminal 205.In other embodiments, aperture 224 can have not Similar shape (for example, square, circle, irregular shape etc.) is with the first contact 204 of exposure to form the on SST bare dies 200 One external terminal 205.
Similarly, SST bare dies 200 include the second external terminal 207, and second external terminal can be positioned at knot 203i And/or usually at another knot at the terminal of the group of the series coupled of knot 203.Second external terminal 207 can by be suitble to Conductive material (includes those materials for the second slider material 216, such as nickel (Ni), silver-colored (Ag), copper (Cu), aluminium (Al), tungsten (W) and/or other suitable conductive material) be made.Second external terminal 207 can be electrically coupled to related connection (for example, knot The second contact 206 203i) and/or the second semi-conducting material 212.For example, as illustrated in Fig. 2 C, outside second Deposition, patterning and/or other suitable method known in the art can be used to be formed at dielectric substance for terminal 207 222 tops and the second contact 206 for being electrically connected to related connection (for example, knot 203i).
In operation, first terminal 205 and Second terminal 207 can be directly attached and/or in other ways in coupled outside To external device (ED), component or power supply (for example, AC or DC electric power supply).Indivedual knot 203a to 203i are configured to respond to institute Apply voltage and emit light and/or other types of electromagnetic radiation.In an example, SST bare dies 200 can be naked with other SST Piece serial or parallel connection is coupled into SST arrays to realize the high input voltage being incorporated in the device of SST bare dies 200, improves dress whereby Put performance.
Optionally, and in another embodiment, SST bare dies 200 can have be electrically coupled to knot among one or more (for example, Knot 203b to 203h) at interconnection piece 225 or interconnection line 226 the 3rd contact or interconnection contact 250 (for example, exist Knot 203c sentences dotted line and is shown).Interconnection contact 250 can be used to form and be coupled into the volume of array (such as SST arrays) The interconnection of outer bare die.On institute in No. 13/603,106 U.S. patent application case filed an application for 4th in September in 2012 Interconnection contact and interconnection, the patent application case is described in detail in the solid state transducer and high voltage SST arrays of description Full text is incorporated herein by reference.Therefore, it is electrically coupled between knot 203 (for example, between knot 203c and knot 203d) The interconnection contact 250 of interconnection piece 125 provides in high voltage (for example, more knots) SST bare dies 200 can access electrical connection.Such as This, the flowable knot 203 through series coupled of the input voltage that is provided by terminal 205,207 and also SST bare dies 200 and The replacement circuit footpath for providing to improve light output and higher flux delivering is flowed between the string (not showing) of connection coupling.Cause This, is incorporated to the array assemblies (not showing) of the SST bare dies 200 with interconnection contact 250 with overcoming the pre- of knot failure It is standby, so as to provide the variation of the reduction of the biasing across the SST bare dies 200 coupled individually in array format.In addition, even if Array assemblies subtract whereby also held in use, so as to provide improved chip performance and reliability after tying failure Small manufacture cost.
In Additional examples of composition, SST bare dies 200 can be touched comprising multiple interconnections associated with multiple interconnection pieces 125 Point 250 connects (not showing) for providing additional cross between the SST bare dies 200 of (for example) parallel coupled.Herein In class embodiment, for example, be incorporated to the array assemblies of the SST bare dies 200 with one or more interconnection contacts 250 (not showing) may be configured to include the multiple of interconnection piece 225 that SST bare dies 200 are electrically coupled between the bare die string of parallel coupled Interconnection (is not shown).
In one embodiment, interconnection contact 250 can access at the first side 201a of SST bare dies 200 in outside, And can interconnection be formed by wire bonding and/or directly attachment.In other embodiments, interconnection contact 250 can position At the first side 201a of SST bare dies 200, wherein suitable insulation or dielectric substance intervention in interconnection contact 250 with Underlie between the first semi-conducting material 210 and the first contact 204.It can be included for the suitable material of interconnection contact 250 Titanium (Ti), aluminium (Al), nickel (Ni), silver-colored (Ag) and/or other suitable conductive material.CVD, PVD, ALD also can be used or partly lead Known other suitable technology forms interconnection contact 250 in body manufacturing technology.
Fig. 2 E to 2L illustrate during that additional dielectric part and conductive material are added to SST during it is naked The stage of piece 200.In Fig. 2 E, 2G and 2I, the specific of SST bare dies 200 is shown in phantom merely for the purpose of diagram illustrating Underlying features.In one embodiment, additional dielectric part 228 can be formed by the material identical with dielectric substance 222 or Can be different materials.For example, additional dielectric part 228 may include silicon nitride, silica, polyimides and/or its Its suitable dielectric substance.As shown in Fig. 2 E and 2F, additional dielectric part 228 (for example, passivation part) may be selected Property deposit (for example, via CVD, PVD or other suitable process) and include first contact 204, second in SST bare dies 200 The upper of contact 206, interconnection line 226 and interconnection piece 225.In some embodiments, additional dielectric part 228 can pre- shape Into and be positioned at SST bare dies 200 selected electric contact and interconnecting parts above.In the illustrated embodiment, additional electric Media fraction 228 is positioned above the owner in the first contact 204, the second contact 206, interconnection line 226 and interconnection piece 225. In addition, and as shown in Fig. 2 E, additional dielectric part 228 is located, deposits, patterns and/or in other ways through matching somebody with somebody It puts to cover the first external terminal 205 and the second external terminal 207.In other embodiments, SST bare dies 200 can include Cover the dielectric substance and/or portion of the first contact 204 and the second contact 206 and the larger or smaller part of interconnection piece 225 Divide 222 and 228 larger or smaller area.For example, dielectric substance and/or part 222 and 228 can it is deposited so that one or Multiple second contacts 206 are exposed.
Fig. 2 G and 2H illustrate the addition of barrier material 232 (such as barrier metal), and barrier material 232 can be deposited on 228 top of dielectric substance 222 and/or additional dielectric part on first side 201a of SST bare dies 200.Barrier material 232 Cobalt, ruthenium, tantalum, tantalum nitride, indium oxide, tungsten nitride, titanium nitride, tungsten titanium (Wti) and/or other suitable isolation conduction material can be included Material, and CVD, PVD, ALD, patterning and/or other suitable technology known in the art deposition can be used.
With reference next to Fig. 2 I and 2J, metal seed crystal material 234 can be deposited on the first side 201a of SST bare dies 200 Above barrier material 232 and barrier material 232 is adhered to (for example) in transducer architecture 202 and the other outer sets of underliing It provides and is conductively connected between part.In the illustrated embodiment, seed crystal material 234 covers entire first side 201a.One In a embodiment, seed crystal material 234 can include the thin and continuous of copper (Cu), titanium/copper alloy and/or other suitable conductive material Overlay or in other arrangements discontinuous overlay and plating can be passed through, electroless plating or other methods deposit.For example, can be used CVD, PVD, ALD, patterning, sputter-deposition and/or other suitable technology known in the art deposition seed crystal material 234。
Collective reference Fig. 2 G to 2J, barrier material 232 prevent the diffusion of seed crystal material 234 (for example, Cu seed crystal materials), with Exempt to be diffused into such as dielectric substance 222, additional dielectric part 228 or transducer architecture 202 (comprising the first semi-conducting material 210 and second semi-conducting material 212 and active region 214) the semi-conducting material that underlies in, this can change the electricity of SST bare dies 200 Characteristic.
Fig. 2 I and 2J also illustrate during wherein seed crystal material 234 and barrier material 232 are patterned with exposure Underlie stage of dielectric substance 222 or additional dielectric part 228.As shown in Fig. 2 I, seed crystal material 234 and potential barrier material Expect that 232 property of can be chosen remove or etch to form dielectric path 236 on the first side 201a, the path surround and electricity every From the first external terminal 205 and the second external terminal 207.In another embodiment, barrier material 232 and/or seed crystal material 234 Alternative is deposited on dielectric substance 222 and the top of dielectric portion 228, at the same leave be respectively formed barrier material 232 and/ Or those sections in 236 gap of dielectric path of seed crystal material 234.
The seed crystal material 234 on the first side 201a wherein on SST bare dies 200 during Fig. 2 K and 2L diagram illustrating Top forms the stage of metal substrate 238.In one embodiment, metal substrate 238 may include copper (Cu), aluminium (Al), alloy (for example, NiFe alloy) or other suitable material.Metal substrate can pass through plating, electroless plating or known in the art its Its technology is formed.In some embodiments, metal substrate 238 may have about 100 μm of thickness;However, in other embodiments In, metal substrate 238 can have various thickness.As shown in Fig. 2 K and 2L, metal substrate 238 (for example, thick copper substrate) can It is patterned to underlie dielectric substance 222 or additional dielectric part 228 along the exposure of dielectric path 336.In a reality It applies in example, 238 property of can be chosen of metal substrate is electroplated so that dielectric substance 222 and the formation dielectric of dielectric portion 228 Those sections in path 236 are the gap of metal substrate 238.As described, dielectric path 236 surround and is electrically isolated outside first 205 and second external terminal 207 of portion's terminal.It is electrically coupled and is coupled tovertically to the first external terminal 205 and the second external terminal 207 And it is provided by the circular conducting metal substrates 238 in dielectric path 236 in the case where additional wire bonding or joint sheet is not required For the external engagement site being directly attached of external module.
Referring back to Fig. 2 K, metal substrate 238 can be heat conduction so that heat is transferred to outside heat sink from SST bare dies 200 (not showing) and heat pad 240 is provided to SST bare dies 200 on the first side 201a.For example, metal substrate 238 may include have Have at least generally similar to the coefficient of thermal expansion of SST bare dies 200 or similar to the larger encapsulation associated there of SST bare dies 200 Or copper, aluminium or the alloy of the coefficient of thermal expansion of the coefficient of thermal expansion of circuit board.Therefore, heat pad 240 can by by heat transfer to bag Plate, encapsulation, cooling fin or another element of the device of bare die containing SST 200 and reduce the operation temperature of SST bare dies 200.In addition, Although the embodiment illustrated of Fig. 2 K is only comprising a heat pad 240, in other embodiments, SST bare dies 200 can wrap Containing various suitable with any one of various suitable sizes and shape and on the first side 201a of SST bare dies 200 Any one of position place multiple smaller and/or independent heat pad 240.
SST bare dies 200 (Fig. 2 L) could attach to another carrier substrates (not showing) or be inverted in other ways, and metal liner Bottom 238 can provide for the supporting item being further processed on the second side 201b of SST bare dies 200.Fig. 3 A to 3B are Fig. 2 L Schematic cross section of the SST bare dies 200 in the various stages being further processed.For example, Fig. 3 A and 3B are illustrated Being wherein inverted and having removed growth substrates 220 (Fig. 4 B) SST bare dies 200 in the process causes transducer architecture 202 in SST The step of being exposed at the second side 201b of bare die 200.Can by chemical-mechanical planarization (CMP), back-grinding, etching (for example, Wet-type etching, dry-etching etc.), chemically or mechanically remove and/or other removal technologies remove growth substrates 220.Process may be used also Include the roughening of the second semi-conducting material 212 (not showing).Similarly, if it is desired to, then back-grinding, CMP, erosion can be passed through It carves and/or other suitable method (not showing) is ground or thinning metal substrate 138.In the other embodiments not shown, SST Bare die 200 can undergo extra process to enhance or improve (for example, optimization) optical property and/or other properties.For example, may be used Optical element (such as lens) is added to the second side 201b of SST bare dies 200.Gained SST bare dies 200 include the first outer end Heat pad 240 (being shown in Fig. 2 K) at sub 205 (being shown in Fig. 2 K), the second external terminal 207 and the first side 201a, and institute State bare die (for example) can be installed on plate, encapsulation or another component in the case where wire bonding is not required using solder reflow process On.Therefore, directly attachment terminal 205,207 and heat pad 240 allow SST bare dies 200 efficiently to install during single step To plate or other substrates or supporting item.
For illustrative purpose, Fig. 2A to 3B shows each stage of the manufacturing process on indivedual SST bare dies 200.Fig. 4 A are arrived The part of wafer level sub-assembly of the 4C displayings with multiple SST bare dies 200.It those skilled in the art will realize that can Each stage of process described herein is performed in wafer level or in bare die level.Fig. 4 A be with the first side 401a and One of the wafer level sub-assembly 400 of four indivedual SST bare dies 200 comprising generally similar to the bare die shown in Fig. 2 I The plan view divided.Therefore, Fig. 4 A illustrate the stage in manufacturing process, in wafer level sub-assembly 400 in the stage The first side 401a on the barrier material 232 that underlies disposed thereon metal seed crystal (for example, is shown) in Fig. 2 G, 2H and 2J Material 234 and the barrier material 232 that underlies is bonded it to in the transducer architecture 202 that (for example) underlies (institute's exhibition in Fig. 2 J Show) it provides and is conductively connected between other external modules.As demonstrated in Figure 4 A, seed crystal material 234 and the (figure of barrier material 232 Shown in 2J) it is patterned with exposed dielectric substance 222 or additional dielectric part 228 and the multiple dielectrics of formation of underliing Path 236.
Fig. 4 B are the wafer level combinations at the stage generally similar to the stage shown in Fig. 2 K during being in The plan view of the part of part 400.For example, Fig. 4 B illustrate the stage in manufacturing process, in chip in the stage 234 top of seed crystal material on first side 401a of level sub-assembly 400 forms metal substrate 238 and is patterned to be formed Multiple dielectric paths 236.Each of indivedual SST bare dies 200 include heat pad 240.As shown in Fig. 4 C, sub-assembly 400 can form singulated SST bare dies 200 along 402 pelletizing of pelletizing road or can be formed in another embodiment through handling SST arrays.Singulated SST bare dies 200 include the first external terminal 205, the second external terminal at first side 201a, 401a 207 and heat pad 240.
According to foregoing teachings, it will be appreciated that although having described the technology of the present invention for illustrating purposes herein Specific embodiment, but various modifications can be made in the case of without departing from the present invention.SST bare dies 200 and sub-assembly 400 can include The various combination of additional assemblies and/or component described herein.For example, SST bare dies 200 and/or sub-assembly 400 can It is incorporated into the SST arrays with multiple bare dies or sub-assembly.In addition, optical element (such as lens) can be added to indivedual SST In each of bare die 200.In addition, sub-assembly 400 includes 2 × 2 arrays of SST bare dies 200, however, in other embodiments In, sub-assembly can include different number SST bare dies and/or with different shape (for example, rectangle, circle etc.).In addition, can be The particular aspects of the technology of the present invention described in the context of specific embodiment are eliminated in other embodiments.For example, may be used The configuration of dielectric substance 222 and dielectric portion 228 is changed with exposure or covering contact, interconnection piece and/or other conductor wires Various combination.It is in addition, although related to the specific embodiment of the technology of the present invention described in the context of those embodiments The feature of connection, but other embodiments can also show this category feature and and not all embodiments needs must show this category feature to return Belong in the range of the technology of the present invention.Therefore, of the invention and associated technology can cover what is be not explicitly shown or describe herein Other embodiments.

Claims (27)

1. a kind of solid state transducer SST bare dies, including:
Transducer architecture has the first side and the second side opposite with first side, the first half in the first side position Conductor material and the second semi-conducting material at the second side;
Multiple first contacts, wherein indivedual first contacts are electrically coupled to first semi-conducting material;
Multiple second contacts, wherein the second contact is electrically coupled to second semi-conducting material, second contact is changed from described First side of energy device structure extends to second semi-conducting material;
Interconnection piece is formed between at least one first contact and second contact;
Barrier material is located above first contact, second contact and the interconnection piece;And
Conductive material is located above the barrier material, and the conductive material is included to be led to one of first contact electricity First external terminal of letter, with one of second contact the second external terminal of telecommunication and with first outer end The heat pad that each of sub and described second external terminal is electrically isolated.
2. SST bare dies according to claim 1 further comprise in the interconnection piece and first semi-conducting material Between dielectric substance.
3. SST bare dies according to claim 1, wherein first contact and second contact are flush type, and First and second wherein described external terminal is configured to connect to power supply.
4. SST bare dies according to claim 1, wherein the transducer architecture is with described in the first side position First contact and the vertical transducer architecture of the second contact, and wherein described SST bare dies are configured to be directly attached to outer set Part.
5. SST bare dies according to claim 1, wherein multiple high voltages that the transducer architecture includes series coupled change It can device knot.
6. SST bare dies according to claim 1, wherein the SST bare dies be included in one or more indivedual first contacts with Multiple interconnection pieces between one or more second contacts.
7. SST bare dies according to claim 1, further comprise:
Multiple knots;And
3rd contact, is connected to the interconnection piece, and the 3rd contact is configured to be cross connected to another on the second bare die One contact.
8. SST bare dies according to claim 1, wherein the interconnection piece and first and second described semi-conducting material electricity every From.
9. the transducer architecture is separated by SST bare dies according to claim 1 wherein the transducer architecture has Multiple features of first transducer knot and second transducer knot, and wherein described first transducer knot has the second contact of flush type And the second transducer knot has and is exposed through the first contact, and wherein described interconnection piece is formed at the first transducer and ties The second contact of the flush type and described being exposed through between the first contact of tying of the second transducer.
10. a kind of solid state transducer SST chips, including:
Transducer architecture has in the first semi-conducting material of first side position, at the second side opposite with first side The second semi-conducting material and the luminous function area between first semi-conducting material and second semi-conducting material;And
The transducer architecture is separated into multiple Light-emitting diode LED bare dies that can be addressed individually, wherein often by multiple features One LED bare include-
First electric terminal is coupled to first semi-conducting material of the first side position;
Second electric terminal is coupled to second semi-conducting material of the first side position;
Multiple knots are coupled in series between first electric terminal and second electric terminal;
One of multiple the first contacts of inside, described first contact are electrically coupled to first electric terminal;
One of multiple the second contacts of inside, described second contact are electrically coupled to second electric terminal;
Multiple interconnection pieces, inside one or more between first and second contact;
Barrier material is located above first contact of inside, the second contact of the inside and the interconnection piece;And
Conductive material, is located above the barrier material, and the conductive material includes:
First electric terminal;
Second electric terminal;And
Heat pad is electrically isolated with each of first electric terminal and second electric terminal.
11. SST chips according to claim 10 further comprise the 3rd contact for being coupled to the interconnection piece, institute It states the 3rd contact and is configured to be cross connected to another contact on the second bare die.
12. a kind of solid state transducer SST bare dies, including:
First terminal, on the first side of the SST bare dies;
Second terminal, on first side of the SST bare dies;
Multiple SST knots, are coupled in series between first and second described terminal;
Multiple the first contacts of flush type, wherein each indivedual SST knots include at least one the first contact of flush type, and it is wherein described The first contact of flush type is electrically coupled to the first terminal;
Multiple the second contacts of flush type, wherein each indivedual SST knots include at least one the second contact of flush type, and it is wherein described The second contact of flush type is electrically coupled to the Second terminal;
Multiple flush type interconnection pieces, between each indivedual knots, wherein each flush type interconnection piece is by least one flush type The first contact of at least one flush type on second coupling contact points to proximity junction;
Barrier material is located on first contact of flush type, the second contact of the flush type and the flush type interconnection piece Side;And
Conductive material, is located above the barrier material, and the conductive material includes:
The first terminal;
The Second terminal;And
Heat pad is electrically isolated with each of the first terminal and the Second terminal.
13. SST bare dies according to claim 12, wherein the first terminal and the Second terminal are situated between by multiple electricity Matter path is electrically isolated.
14. a kind of method for forming high-voltage LED HVLED, including:
Formation light emitting transducer structure, the second side of the light emitting transducer structure with the first side and first side back pair, It the first semi-conducting material in the first side position, the second semi-conducting material at the second side and is led described the first half Luminous function area between body material and second semi-conducting material;
The first contact is formed in the first side position of the transducer architecture, first contact is electrically coupled to described the first half Conductor material;
Form multiple features, the multiple feature by the transducer architecture and first contact separation into multiple knots, every One is not tied to form the second contact, and second contact is electrically coupled to second semi-conducting material and from the energy converter knot First side of structure extends to second semi-conducting material;
Passivating material is formed above first contact;
At least a portion of first contact is exposed at each indivedual knots by the passivating material;
On proximity junction multiple interconnection pieces are formed between second contact and first contact being exposed through;
Barrier material is deposited on first side of the transducer architecture;
In the barrier material disposed thereon seed crystal material, and the seed crystal material and the barrier material are patterned to expose State one or more parts of passivating material;And
In the case where not covering the part of the passivating material on the seed crystal material deposited metal substrate,
Wherein the multiple tying-in coupled in series electrical by the multiple interconnection piece.
15. according to the method for claim 14, wherein the multiple features for forming the separation transducer architecture include:Institute It states and multiple table tops is etched in transducer architecture.
16. according to the method for claim 14, further comprise forming additional passivation above the multiple interconnection piece Part.
17. according to the method for claim 16, wherein the passivating material and the additional passivation part include dielectric Material.
18. according to the method for claim 14, reflectivity p hard contacts are formed wherein forming the first contact and including.
19. a kind of method for the solid state transducer SST bare dies for forming multiple knots with series coupled, the described method includes:
Chip is provided, the chip has the transducer architecture on substrate and the substrate, and the transducer architecture has: The first semi-conducting material at one side;The second semi-conducting material at the second side opposite with first side;And multiple ditches The transducer architecture is divided into multiple SST bare dies that can be addressed individually with the multiple knot by slot;
It individually ties to form the first contact each, first contact is electrically coupled to first semi-conducting material;
It individually ties to form the second contact for being electrically coupled to second semi-conducting material each, second contact is from described First side of transducer architecture extends to second semi-conducting material;
Interconnection piece is formed between first contact that second contact and second tied first are tied so that described One and second tying-in by the interconnection piece coupled in series electrical;And
Dielectric substance is formed above the interconnection piece;
Barrier material is deposited on first side of the transducer architecture;
Seed crystal material is deposited on the barrier material of the first side position;And
On the seed crystal material deposited metal substrate and
The interconnection piece is covered with multiple encapsulating materials.
20. according to the method for claim 19, further comprise:
The barrier material, the seed crystal material and the metal substrate are patterned with first of the exposure electricity dielectric material Point and the dielectric substance second portion, the second portion and the first portion are in each SST that can be addressed individually It is spaced apart on bare die;
The first external terminal and the second external terminal are provided on first side, first external terminal is naked in the SST On piece is electrically isolated by the first portion and second external terminal is electric by the second portion on the SST bare dies Isolation;And
Via multiple through covering interconnection piece the multiple knot of series coupled between first and second described terminal.
21. according to the method for claim 20, further comprising will be outside first external terminal and described second Terminal is electrically coupled to external module.
22. according to the method for claim 19, wherein depositing the metal substrate is included in each SST that can be addressed individually Heat pad is formed on first side of bare die.
It is electrically coupled to 23. according to the method for claim 19, further comprising providing outside the 3rd of the interconnection piece Terminal, the 3rd external terminal are configured to the another terminal being cross connected on the second bare die.
24. according to the method for claim 19, further comprise described to address individually along pelletizing road is individualized SST bare dies.
25. a kind of High Power LED LED, including:
Light emitting transducer structure, have be positioned at the first semi-conducting material in first side position with first side back pair The second side at the second semi-conducting material between luminous function area;
First contact is electrically coupled to first semi-conducting material of the first side position of the transducer architecture;
Multiple features, by the transducer architecture and first contact separation into multiple knots, wherein each knot is included and is electrically connected It is connected to second semi-conducting material and is extended to from first side of the transducer architecture through the luminous function area Second contact of second semi-conducting material;
Multiple interconnection pieces, on proximity junction between second contact and first contact;
Barrier material is located in the first side position of the transducer architecture above passivation layer and the interconnection piece;And gold Belonging to substrate, be located above the barrier material, the metal substrate includes heat pad,
Wherein the multiple tying-in coupled in series electrical by the multiple interconnection piece.
26. high-capacity LED according to claim 25 further comprises the passivation material above first contact Material, wherein a part for first contact the transducer architecture the first side position by the passivation layer and sudden and violent Dew.
27. high-capacity LED according to claim 25, wherein each of described knot is included in the first side position Heat pad.
CN201380063850.XA 2012-12-07 2013-12-04 Vertical solid state transducer and high voltage solid state transducer and associated system and method with buried contact Active CN104919605B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/708,526 US8963121B2 (en) 2012-12-07 2012-12-07 Vertical solid-state transducers and high voltage solid-state transducers having buried contacts and associated systems and methods
US13/708,526 2012-12-07
PCT/US2013/073055 WO2014089175A1 (en) 2012-12-07 2013-12-04 Vertical solid-state transducers and high voltage solid-state transducers having buried contacts and associated systems and methods

Publications (2)

Publication Number Publication Date
CN104919605A CN104919605A (en) 2015-09-16
CN104919605B true CN104919605B (en) 2018-06-01

Family

ID=

Similar Documents

Publication Publication Date Title
US11563158B2 (en) Vertical solid-state transducers and high voltage solid-state transducers having buried contacts and associated systems and methods
US11183486B2 (en) High voltage solid-state transducers and solid-state transducer arrays having electrical cross-connections and associated systems and methods
CN105679908B (en) Luminescent device
CN104919605B (en) Vertical solid state transducer and high voltage solid state transducer and associated system and method with buried contact

Legal Events

Date Code Title Description
PB01 Publication
SE01 Entry into force of request for substantive examination
GR01 Patent grant