CN104901905A - Special network switch for intelligent substation and data switching method of network switch - Google Patents
Special network switch for intelligent substation and data switching method of network switch Download PDFInfo
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- CN104901905A CN104901905A CN201510202976.1A CN201510202976A CN104901905A CN 104901905 A CN104901905 A CN 104901905A CN 201510202976 A CN201510202976 A CN 201510202976A CN 104901905 A CN104901905 A CN 104901905A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/74—Address processing for routing
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Abstract
The invention relates to a special network switch for an intelligent substation and a data switching method of the network switch. The network switch is characterized in that the network switch includes a plurality of service FPGAs and a central processor; the service FPGAs are connected with one another sequentially so as to form data transmission loops; the service FPGAs are used for the input, transmission, identification, processing and output of messages generated by secondary equipment in the intelligent substation; any one service FPGA is used for performing clock synchronization on the other service FPGAs; and the central processor is used for configuring start address and destination address-contained identification information for messages entering the data transmission loops, and allocating MAC addresses and/or IP addresses with uniqueness for the service FPGAs so as to facilitate identification and processing on corresponding messages according to the identification information. With the network switch and the data switching method thereof of the invention adopted, the start address and destination address-contained identification information can be configured for each service loop, and independent channels can be allocated for the service loops, and the transmission of the messages can be realized accurately in real time, and the integrity, real-time performance and synchronization of signal transfer can be ensured.
Description
Technical field
The invention belongs to intelligent substation technical field, especially a kind of intelligent substation dedicated network switch and method for interchanging data thereof.
Background technology
Intelligent substation is relative to traditional transformer station, and important change is exactly that the communication of signal transmission, secondary circuit are virtual, and all secondary circuit relations all realize by the association of network, and current this association is mainly through realizing with under type:
(1) for point-to-point interconnection, in secondary circuit, the association of signal is carried by optical fiber Hard link and realizes;
(2) in networking connected mode, the association of signal in secondary circuit, a kind of method is divided by the vlan of static state, and carry out configured in advance to realize to switch and secondary device;
(3) in networking connected mode, the association of signal in secondary circuit, another kind of method is divided by the vlan of static state, carries out configured in advance to secondary device, and realized by GMRP mode.
In connected mode (1), directly connect owing to have employed physics, signal adopts point-to-point mode to transmit, ensure that the integrality of Signal transmissions, synchronism and real-time to greatest extent, the feature of secondary circuit is ensured completely, but should see, this mode is not inherently distinguished with the operational mode of traditional transformer station yet simultaneously:
One, due to the physical isolation that physics point to point connect causes, Signal share cannot be realized, thus greatly limit the level of informatization of transformer station, and then the intelligence degree of transformer station is had a greatly reduced quality.
Two, information cannot monitor, transmitting procedure is uncontrollable, because optical fiber is the unique physical carrier of Signal transmissions, makes information transmission just not possess visible implementation and controllability physically.
Three, due to the long range propagation of a large amount of optical fiber of the point-to-point transmission requirement of information, the complexity of constructing and safeguarding is caused greatly to increase than traditional transformer station; The reduction greatly that the problem of these two aspects makes the equipment of intelligent substation supervision property that is maintainable and that run equal, is unfavorable for the raising improving intelligent substation degree.
In connected mode (2), (3), situation is but just contrary, although theoretically, networking mode is that shared the providing of signal may (although in actual implementation process, do also very do not put in place), for the intellectuality of transformer station provides information assurance, but in concrete implementation process, but due to by the network switch inherently feature, the integrality of signal transmission, real-time and synchronism is made to be difficult to be guaranteed.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, a kind of intelligent substation dedicated network switch and method for interchanging data thereof are provided, in order to solve the problem of the integrality of signal transmission, real-time and synchronism.
The present invention solves its technical problem and takes following technical scheme to realize:
A kind of intelligent substation dedicated network switch, comprises multiple business FPGA and the central processing unit be connected with each business FPGA respectively, and each business FPGA connects and composition data transmission loop successively; Described business FPGA is used for the input of the message that secondary device produces in intelligent substation, transmission, identification, process and output, and arbitrary business FPGA is also for carrying out clock synchronous to other business FPGA; The message configuration be used for for entering data transmission loop of described central processing unit comprises the identification information of initial address and destination address, and the MAC Address and/or IP address with uniqueness is configured respectively to each business FPGA and then helps to identify corresponding message according to identification information and process, meanwhile, be the loop table of the accessible type of message of each business FPGA configuration instruction.
And, described business FPGA at least comprises access interface, input port and output port, the access interface of described business FPGA is used for carrying out with the secondary device in intelligent substation the input being connected and then receiving message, the output port of described business FPGA is used for being connected with the input port of other business FPGA, and the input port of described business FPGA is for be connected with the output port of other FPGA and then composition data transmits loop.
And, the described network switch also comprises a ring FPGA be connected between any two adjacent service FPGA, this ring FPGA be used for message transmission and and the ring FPGA of another network switch carry out the transmission that connects and composes loop and then realize message between multiple network switch; Described ring FPGA at least comprises input port, output port, looped network input port and looped network output port, the input port of described ring FPGA is connected with the output port of a business FPGA, the described output port of ring FPGA is connected with the input port of another business FPGA, and the looped network input port of described ring FPGA, looped network output port are respectively used to be connected to form loop with the looped network output port of the ring FPGA of other network switchs, looped network input port.
And described business FPGA processing speed is 100,000,000 grades, described ring FPGA processing speed is gigabit level.
And described business FPGA and described ring FPGA is also for carrying out flow control and delays time to control to the transmission of message.
And whether described business FPGA, also for when described message is the first frame message, detects it according to loop table and allows the message of described type to enter process; If described business FPGA does not allow the message of described type to enter process, then business FPGA inquires whether described central processing unit allows the message of described type to enter described business FPGA process; If described central processing unit allows the message of described type to enter described business FPGA process, then the type of described message writes in its allocation list by described business FPGA, and allows the message of follow-up identical type to enter process.
A method for interchanging data for intelligent substation dedicated network switch, comprises the following steps:
Step 1, multiple business FPGA is adopted to connect structure data transmission loop successively;
Step 2, central processing unit is adopted to be that each business FPGA configures the MAC Address and/or IP address with uniqueness respectively and is the loop table of the accessible type of message of each business FPGA configuration instruction, for the message configuration entering data transmission loop comprises the identification information of initial address and destination address;
Step 3, arbitrary business FPGA is utilized to carry out clock synchronous to all the other each business FPGA;
In step 4, message transmission procedure, the identification information identification corresponding message of each business FPGA entrained by message also processes it.
And, in described message transmission procedure, also comprise and flow control and delays time to control are carried out to the transmission of message.
And the concrete processing method that delays time to control is carried out in the described transmission to message is: measure the time delay of each frame message, be added on measuring the actual time delay obtained in each frame message for delay protection process; Or, to each frame message constant time lag, force each frame message resident regular time in described data transmission loop to supply delay protection process by configuration.
And the concrete processing procedure of described message transmissions is:
(1) if described message is the first frame message, whether described business FPGA detects it according to loop table and allows the message of described type to enter process;
(2) if described business FPGA does not allow the message of described type to enter process, described business FPGA inquires whether described central processing unit allows the message of described type to enter described business FPGA process;
(3) if described central processing unit allows the message of described type to enter described business FPGA process, then the type of described message writes in its loop table by described business FPGA, and allows the message of follow-up identical type to enter process.
Advantage of the present invention and good effect are:
The present invention is reasonable in design, it is built into data transmission loop by adopting multiple business FPGA to connect successively, the identification information of initial address and destination address is contained to each business loop configuration and distributes autonomous channel, thus make the transmission in loop possess point-to-point transmission feature, can accurately complete, the transmission that realizes message in real time under the prerequisite ensureing loop synchronisation, thus solve transformer station process layer information and transmit difference between reliability and sharing.
Accompanying drawing explanation
Fig. 1 is the structural representation of a kind of execution mode of intelligent substation dedicated network switch;
Fig. 2 is the structural representation of the another kind of execution mode of intelligent substation dedicated network switch;
Fig. 3 is the flow chart of a kind of execution mode of method for interchanging data of intelligent substation dedicated network switch.
Fig. 4 is the flow chart of another execution mode of method for interchanging data of intelligent substation dedicated network switch.
Embodiment
Below in conjunction with accompanying drawing, the embodiment of the present invention is further described:
An embodiment of intelligent substation dedicated network switch, as shown in Figure 1, comprise business FPGA and CPU (i.e. central processing unit), this business FPGA quantity is multiple, and this CPU quantity is one.Described CPU is connected with each business FPGA respectively, and in the present embodiment, CPU is connected with each business FPGA by bus, and each FPGA connects and composition data transmission loop successively.Described business FPGA at least comprises access interface, input port and output port, the access interface of business FPGA is used for carrying out with the secondary device in intelligent substation the input being connected and then receiving message, and the output port of business FPGA is used for being connected with the input port of other FPGA, input port is for be connected with the output port of other FPGA and then composition data transmits loop.Certainly, this business FPGA also comprises control port (not shown), and this control port is used for being connected with CPU by bus.For being described by four business FPGA composition datas transmission loops shown in Fig. 1, wherein, the output port (103) of business FPGA (10) connects the input port (112) of business FPGA (11), the output port (113) of business FPGA (11) connects the input port (122) of business FPGA (12), the output port (123) of business FPGA (12) connects the input port (132) of business FPGA (13), the output port (133) of business FPGA (13) connects the input port (102) of business FPGA (10), and then form complete data transmission loop, each business FPGA (10, 11, 12, 13) control port is connected to CPU (20) respectively, and can at arbitrary business FPGA (10, 11, 12, 13) access interface connecting secondary equipment, this secondary device 30 can be connected in the access interface of business FPGA (10) (101).
In this embodiment, business FPGA (10,11,12,13) is mainly used in the input of the message (as GOOSE message, SV message, MMS message and IP message etc.) that secondary device in intelligent substation produces, transmission, identification, process and output, further, arbitrary business FPGA all may be used for carrying out clock synchronous to other each business FPGA.Because require high to the processing time required for the clock synchronous of each business FPGA in switch, the pure hardware circuit FPGA therefore selecting processing speed fast is to carry out clock synchronous.Further, because FPGA is high performance programmable logic device, its integrated level is high, device density can up to tens million of system door, extremely complicated sequential and combinational logic circuit function can be completed, be applicable to high speed, highdensity high end digital Logic Circuit Design, thus utilize this feature of FPGA can realize the permanent circuit of a large amount of Signal transmissions from transmitting terminal to receiving terminal, thus point-to-point transmission is realized on microcosmic, be therefore mainly used to the Network transmission in responsible the present invention.
In this embodiment, CPU (20) the message configuration be mainly used in as entering this data transmission loop comprises the identification information of initial address and destination address, and the MAC Address and/or IP address with uniqueness is configured respectively to each business FPGA (10,11,12,13) and then helps to identify corresponding message according to identification information and process, meanwhile, be also the loop table that each business FPGA (10,11,12,13) configuration indicates accessible type of message.Because these purposes require not high to the processing time, and then traditional low energy-consumption electronic device CPU can be selected to carry out, utilize CPU can make full use of the large feature of software flexibility, carry out several functions design.By there is the address of uniqueness to each business FPGA configuration and be message configuration identifier information, when message transmits in data transmission loop, correct object business FPGA can be found, by this business FPGA message identified and process, effectively can prevent the generation of " network storm ".Certainly, this CPU (20) can also be used for detecting each business FPGA (10,11,12,13) and whether be configured with identical MAC Address and/or IP address, when there is the identical business FPGA of configuration address, at least identical to this two or more business FPGA reconfigure, to guarantee address uniqueness.
Another embodiment of a kind of intelligent substation dedicated network switch, as shown in Figure 2, the network switch can also comprise a ring FPGA, this ring FPGA is connected between any two adjacent service FPGA, its transmission for message and the ring FPGA for another network switch carry out the transmission connecting and composing loop and then realize message between multiple network switch, can expand the scope of application of switch, connect more secondary device.Specifically, ring FPGA at least comprises input port, output port, looped network input port and looped network output port, the input port of ring FPGA is connected with the output port of a business FPGA, the output port of ring FPGA is connected with the input port of another business FPGA, and the looped network input port of ring FPGA, looped network output port are respectively used to be connected to form loop with the looped network output port of the ring FPGA of other network switchs, looped network input port.Shown in Fig. 2, two network switchs (100, 200) loop is formed, wherein, ring FPGA (14) is arranged between business FPGA (11) and business FPGA (12), concrete, the input port (142) of ring FPGA (14) connects the output port (113) of business FPGA (11), the output port (143) of ring FPGA (14) connects the input port (122) of business FPGA (12), the output port (245) of ring FPGA24 in looped network input port (144) the interconnection network switch (200) of ring FPGA (14), and the looped network output port (145) of ring FPGA (14) is connected with the input port (244) of ring FPGA24 and forms loop.
In above-mentioned execution mode, business FPGA (10,11,12,13) processing speed can be 100,000,000 grades to meet the fast transport of signal, and also to be used for connecting other switches due to ring FPGA (14), its signal transmission amount is larger compared to business FPGA (10,11,12,13) process, and processing speed therefore can be selected to be the ring FPGA of gigabit level.
In a preferred embodiment, each business FPGA (10,11,12,13) and ring FPGA (14) can also be used for carrying out flow control and delays time to control to the transmission of message, carry out flow control and can prevent data congestion in switch, carry out the synchronism that delays time to control is conducive to Signal transmissions.
In a preferred embodiment, when each business FPGA (10,11,12,13) is also for being the first frame message at message, detects it according to loop table and whether allowing the message of the type to enter process; If business FPGA (10,11,12,13) does not allow the message of the type to enter process, business FPGA (10,11,12,13) inquires whether CPU (20) allows the message of the type to enter business FPGA (10,11,12,13) process; If CPU (20) allows the message of the type to enter business FPGA (10,11,12,13) process, then the type of message writes in its allocation list by business FPGA (10,11,12,13), and allows the message of follow-up identical type wherein to enter process.In subsequent packet transmitting procedure, for being configured in the message of the type of loop table and not specifying the message of initial address and destination address to be directly abandoned, also effectively can avoid the generation of " network storm ", and then prevent this network switch from using paralysis.
A method for interchanging data for intelligent substation dedicated network switch, as shown in Figure 3, comprises the steps:
Step S1, adopts multiple business FPGA to connect structure data transmission loop successively.
Step S2, CPU is adopted to be that each business FPGA configures the MAC Address and/or IP address with uniqueness respectively and is the loop table of the accessible type of message of each business FPGA configuration instruction, for the message configuration entering data transmission loop comprises the identification information of initial address and destination address.
Step S3, utilizes arbitrary business FPGA to carry out clock synchronous to all the other each FPGA.
Step S4, in message transmission procedure, the identification information identification corresponding message of each business FPGA entrained by message also processes it.
In step s 4 which, can also comprise: flow control and delays time to control are carried out to the transmission of message.
Specifically, in step s 4 which, carrying out in the step of delays time to control to the transmission of message, delays time to control can carried out by the following two kinds mode:
One, the time delay of each frame message being measured, being added on measuring the actual time delay obtained in each frame message for delay protection process.
Two, to each frame message constant time lag, each frame message resident regular time in data transmission loop is forced to supply delay protection process by configuration.
In a preferred embodiment, as shown in Figure 4, specifically in step S4, namely in message transmission procedure, also comprise:
If step S41 message is the first frame message, whether business FPGA detects it according to loop table and allows the message of the type to enter process;
If step S42 business FPGA does not allow the message of the type to enter process, business FPGA inquires whether CPU allows the message of the type to enter business FPGA process;
If step S43 CPU allows the message of the type to enter business FPGA process, then the type of message writes in its loop table by business FPGA, and allows the message of follow-up identical type to enter process.
The present invention is built into data transmission loop by adopting multiple business FPGA to connect successively, each business FPGA configuration is had to MAC Address and/or the IP address of uniqueness, message configuration is contained to the identification information of initial address and destination address simultaneously, be equivalent to the point-to-point transmission of signal (i.e. message), can accurately complete, the transmission that realizes message in real time; By to business FPGA unified clock each in switch, the synchronism of signal transmission can be ensured.
It is emphasized that; embodiment of the present invention is illustrative; instead of it is determinate; therefore the present invention includes the embodiment be not limited to described in embodiment; every other execution modes drawn by those skilled in the art's technical scheme according to the present invention, belong to the scope of protection of the invention equally.
Claims (10)
1. an intelligent substation dedicated network switch, is characterized in that: comprise multiple business FPGA and the central processing unit be connected with each business FPGA respectively, and each business FPGA connects and composition data transmission loop successively; Described business FPGA is used for the input of the message that secondary device produces in intelligent substation, transmission, identification, process and output, and arbitrary business FPGA is also for carrying out clock synchronous to other business FPGA; The message configuration be used for for entering data transmission loop of described central processing unit comprises the identification information of initial address and destination address, and the MAC Address and/or IP address with uniqueness is configured respectively to each business FPGA and then helps to identify corresponding message according to identification information and process, meanwhile, be the loop table of the accessible type of message of each business FPGA configuration instruction.
2. a kind of intelligent substation dedicated network switch according to claim 1, it is characterized in that: described business FPGA at least comprises access interface, input port and output port, the access interface of described business FPGA is used for carrying out with the secondary device in intelligent substation the input being connected and then receiving message, the output port of described business FPGA is used for being connected with the input port of other business FPGA, and the input port of described business FPGA is for be connected with the output port of other FPGA and then composition data transmits loop.
3. a kind of intelligent substation dedicated network switch according to claim 1 and 2, it is characterized in that: the described network switch also comprises a ring FPGA be connected between any two adjacent service FPGA, this ring FPGA be used for message transmission and and the ring FPGA of another network switch carry out the transmission that connects and composes loop and then realize message between multiple network switch; Described ring FPGA at least comprises input port, output port, looped network input port and looped network output port, the input port of described ring FPGA is connected with the output port of a business FPGA, the described output port of ring FPGA is connected with the input port of another business FPGA, and the looped network input port of described ring FPGA, looped network output port are respectively used to be connected to form loop with the looped network output port of the ring FPGA of other network switchs, looped network input port.
4. a kind of intelligent substation dedicated network switch according to claim 3, is characterized in that: described business FPGA processing speed is 100,000,000 grades, and described ring FPGA processing speed is gigabit level.
5. a kind of intelligent substation dedicated network switch according to claim 3, is characterized in that: described business FPGA and described ring FPGA is also for carrying out flow control and delays time to control to the transmission of message.
6. a kind of intelligent substation dedicated network switch according to claim 1, is characterized in that: whether described business FPGA, also for when described message is the first frame message, detects it according to loop table and allow the message of described type to enter process; If described business FPGA does not allow the message of described type to enter process, then business FPGA inquires whether described central processing unit allows the message of described type to enter described business FPGA process; If described central processing unit allows the message of described type to enter described business FPGA process, then the type of described message writes in its allocation list by described business FPGA, and allows the message of follow-up identical type to enter process.
7. the method for interchanging data of intelligent substation dedicated network switch as described in any one of claim 1 to 6, is characterized in that comprising the following steps:
Step 1, multiple business FPGA is adopted to connect structure data transmission loop successively;
Step 2, central processing unit is adopted to be that each business FPGA configures the MAC Address and/or IP address with uniqueness respectively and is the loop table of the accessible type of message of each business FPGA configuration instruction, for the message configuration entering data transmission loop comprises the identification information of initial address and destination address;
Step 3, arbitrary business FPGA is utilized to carry out clock synchronous to all the other each business FPGA;
In step 4, message transmission procedure, the identification information identification corresponding message of each business FPGA entrained by message also processes it.
8. the method for interchanging data of a kind of intelligent substation dedicated network switch according to claim 7, is characterized in that: in described message transmission procedure, also comprises and carry out flow control and delays time to control to the transmission of message.
9. the method for interchanging data of a kind of intelligent substation dedicated network switch according to claim 8, it is characterized in that: the concrete processing method that delays time to control is carried out in the described transmission to message is: measure the time delay of each frame message, being added on measuring the actual time delay obtained in each frame message for delay protection process; Or, to each frame message constant time lag, force each frame message resident regular time in described data transmission loop to supply delay protection process by configuration.
10. the method for interchanging data of a kind of intelligent substation dedicated network switch according to claim 7, is characterized in that: the concrete processing procedure of described message transmissions is:
(1) if described message is the first frame message, whether described business FPGA detects it according to loop table and allows the message of described type to enter process;
(2) if described business FPGA does not allow the message of described type to enter process, described business FPGA inquires whether described central processing unit allows the message of described type to enter described business FPGA process;
(3) if described central processing unit allows the message of described type to enter described business FPGA process, then the type of described message writes in its loop table by described business FPGA, and allows the message of follow-up identical type to enter process.
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