CN104899620A - RFID reading and writing device with safe processing function - Google Patents
RFID reading and writing device with safe processing function Download PDFInfo
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Abstract
The invention discloses an RFID reading and writing device with a safe processing function. The RFID reading and writing device comprises an analog terminal which is used for carrying out data communication with an external antenna, modulating a digital signal and sending the signal to a label through the antenna, and demodulating the signal obtained from the label into a digital signal which is sent to a chip for data processing, an interface module which is used for the data communication between the reading and writing device chip and an external MCU, a digital baseband which is used for the logic realization of a protocol layer and a physical layer, converting data stream into a data signal which is in accordance with an ISO protocol and carrying out CRC verification and parity verification, a safe circuit which is responsible for the data safety in a data communication process and comprises a symmetric encryption and decryption algorithm and an asymmetric encryption and decryption algorithm, and an EEPROM which is used for storing data and the preset values of a number of registers. According to the safe circuit in the embodiment of the present invention, the symmetric encryption algorithm and the asymmetric encryption algorithm are integrated, the safety problem brought by an external chip is solved, and the need of rapid encryption and decryption can be provided.
Description
Technical field
The present invention relates to technical field of RFID, be specifically related to a kind of rfid interrogator with safe handling function.
Background technology
Along with the fast development of Internet of Things infotech and microelectric technique, radio-frequency (RF) identification (Radio Frequency Identification, RFID) technology starts to appear at the industry-by-industries such as medical treatment, finance, logistics, education, food and drink, intelligent transportation, gate inhibition's identification, article identification widely.Except these traditional industries, RFID technique, as the core technology in emerging industry mobile payment, have also been obtained and widelys popularize.As intelligent identifying system, rfid system have automatic identification, speed fast, adapt to various environment, the advantage such as easy to use, deep effect also changes the life of people, becomes the indispensable part of people's life and work.
Along with widespread use and the leakage of more and more rfid system user data of rfid system, how to ensure the key that the high security of system becomes rfid system development and generally applies.Rfid system is be made up of read write line, label (transponder) and data management system etc. under normal circumstances.And wherein read write line and label chip are the cores of rfid system, the high security therefore wanting to improve whole rfid system just must ensure smart card and read write line high security separately.Intelligent card chip at present with individual secure coprocessor is existing a lot, and the read write line chip having individual secure module is relatively less, adds the frequency of operation of read write line, literacy, read or write speed and its security and determine whole rfid system reading efficiency and security.Therefore, the security module independently having high security in Design and implementation read write line chip is necessary.
Current domestic and international most read write line chip can only support symmetrical 3DES, asymmetrical RSA and other cryptographic algorithm, can not meet the needs that it is more and more higher to security.Realize the security of read write line chip, the privacy of the smart card of communication being carried out to authentication and both data transmission in the process of read write line work will be realized.The legitimacy certification of usual identity is made up of authentication protocol and cryptographic algorithm two parts, and disclosed in identifying procedure is, traditional read write line chip needs additional security encryption chip, as the PSAM card with DES/3DES function, but the mode of this additional chip easily reveals data and the key of transmission at chip pin, easy victim interception, existing RFID card reader cannot ensure safety certification, also cannot ensure the security of transmission data.
Summary of the invention
For the functional deficiency of existing security coprocessor, the invention provides a kind of rfid interrogator with safe handling function, make rfid interrogator chip can either complete the basic function of read-write RFID label chip, various security authentication process can also be completed and for data encrypting and deciphering.
The invention provides a kind of rfid interrogator with safe handling function, comprising:
AFE (analog front end), for carrying out data communication with exterior antenna, sends to label by after digital signal modulated by antenna, and the signal receiving got from label is become digital signal, carry out data processing for chip;
Interface module, for the data communication of responsible read write line chip and outside MCU;
Digital baseband, for the logic realization of responsible protocol layer and Physical layer, changes the data-signal meeting ISO agreement into and carries out CRC check, parity checking by stream compression;
Safety circuit, for the data security in responsible data communication process, comprises symmetrical enciphering and deciphering algorithm and asymmetric enciphering and deciphering algorithm;
EEPROM, for storing the preset value of data and some registers.
Described rfid interrogator supports ISO/IEC 15693 agreement or ISO/IEC 14443-A/B agreement.
Described RFID card reader supports serial communication, or Parallel Interface Communication.
Described AFE (analog front end) is used for responsible read write line chip and the label signal carried out in communication process sends and receives, comprise modulation-demodulation circuit, amplifier and filtering circuit, antenna end being responded to the simulating signal of coming becomes can for the digital signal of digital baseband identification, and by signal that digital signal transition becomes to be sent by antenna; And also comprising clock control module and power management module, upper electro-detection, detection of power loss function also realize all herein.
Described digital baseband is used for the realization being responsible for agreement, is by the logical block of protocol hardware, comprises coding/decoding module, mapping block, frame check, fifo module.
Described safety circuit comprises a symmetric encryption operation core, a rivest, shamir, adelman core, SRAM, real random number generator, control module and interface module.
Described symmetric encipherment algorithm comprises DES, 3DES and AES encryption algorithm.
Described rivest, shamir, adelman comprises RSA, ECC cryptographic algorithm.
The rfid interrogator of the band safe handling function of the embodiment of the present invention, safety circuit is integrated with symmetric encipherment algorithm and rivest, shamir, adelman, solves the safety problem that additional chip brings.Described symmetric encipherment algorithm comprises the cryptographic algorithm such as DES, 3DES and AES; Rivest, shamir, adelman comprises RSA, ECC cryptographic algorithm, and these algorithms all adopt hardware implementing, can provide quick encryption and decryption needs.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the rfid interrogator structural representation in the embodiment of the present invention;
Fig. 2 is the rfid interrogator concrete structure schematic diagram in the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making other embodiments all obtained under creative work prerequisite, belong to the scope of protection of the invention.
The structural representation of rfid interrogator chip as shown in Figure 1, it carries out data communication by AFE (analog front end) and exterior antenna, send to label by after digital signal modulated by antenna, and the signal receiving got from label is become digital signal, carry out data processing for chip.The data communication of interface module primary responsibility read write line chip and outside MCU.Digital baseband is responsible for the logic realization of protocol layer and Physical layer, stream compression is changed into the data-signal meeting ISO agreement and carries out CRC check, parity checking etc., and this module makes the radio communication of read write line and label become possibility.Safety circuit is responsible for the data security in data communication process, and it comprises symmetrical enciphering and deciphering algorithm relevant with asymmetric encryption.EEPROM is mainly used in the preset value storing data and some registers.Read write line chip supports various protocols (comprising ISO/IEC 15693, ISO/IEC 14443-A/B), communication (serial ports, parallel port etc.), how user uses this read write line chip, by setting accordingly pre-seting inside EEPROM, the use that it is concrete can be realized.
Fig. 2 shows the concrete inner structure schematic diagram of RFID card reader in the embodiment of the present invention, is described in detail as follows below for each module.
AFE (analog front end) is responsible for read write line chip and the label signal carried out in communication process sends and receives.It comprises modulation-demodulation circuit, amplifier and filtering circuit, and antenna end being responded to the simulating signal of coming becomes can for the digital signal of digital baseband identification, and by signal that digital signal transition becomes to be sent by antenna.It also comprises clock control module and power management module.The functions such as upper electro-detection, detection of power loss also realize all herein.
The realization of digital baseband primary responsibility agreement is by the logical block of protocol hardware.It comprises the modules such as coding/decoding module, mapping block, frame check, FIFO.The chip that the present invention designs meets ISO's 15693 and ISO 14443 Type A & B, and digital baseband block provides the circuit meeting these three kinds of agreements simultaneously.
The chip of the present invention's design uses the EEPROM of 32*16Byte, in order to store the preset value of various register, with the multiple application needs enabling chip meet user.
Safety circuit is extremely important module in read write line chip, is also important technology feature of the present invention.Due to air transmission channel various unsafe factor abrim, thus how to ensure that the data security in communication process seems particularly important.This safety circuit is groundwork of the present invention just, and it comprises a symmetric encryption operation core, a rivest, shamir, adelman core, SRAM, real random number generator, control module and interface module.What rivest, shamir, adelman adopted is the ECC algorithm that unit safe density is the highest at present, and provides the interface of its bottom computing, conveniently calls.
The read write line designed to make the present invention has more application scenario, and in view of present Mifare card commercially occupies the market share greatly, chip adds Cypto1 unit, with satisfied application needs.The read write line designed like this can carry out safety certification by Cypto1 unit, realizes the data communication with Mifare card.
The realization of interface module, makes MCU can carry out the communication of order and data with read write line chip.MCU, by interrupt request and string also bus interface, sends order and data to read write line chip, and read write line chip is also sent to MCU end by interface module data and processes.
The safety circuit of the embodiment of the present invention is integrated in RFID card reader chip, is connected with chip internal controller by bus interface, and then reaches chip encryption and decryption and data transmission object.This safety circuit comprises control module, interface module, SRAM, RSA/ECC (asymmetric) encryption algorithm core, symmetric encipherment algorithm core and real random number generator.This symmetric encipherment algorithm comprises DES/3DES/AES enciphering and deciphering algorithm, and this algorithm may have access to SRAM memory, and encryption and decryption cleartext-ciphertext is all deposited in sram, can read for external bus.This asymmetric arithmetic comprises RSA and ECC algorithm, and its plaintext, ciphertext and intermediate calculation results are all preserved in sram, to save storage resources.The functional parts such as RSA/ECC algorithm has been endorsed a little to add, times point, mould are taken advantage of, mould adds, mould subtracts, scalar multiplication, just can complete complicated mould idempotent calculation in conjunction with these functional parts.This safety circuit can complete various encryption and decryption functions under the effect of control module, the flowing to and flow out of control data.This true Random Number Generator can be safety circuit and provides random number.
This safety circuit comprises control module, interface module, SRAM, ECC (asymmetric) encryption algorithm core, symmetric encipherment algorithm core and real random number generator.
Here control module controls the data stream of whole safety circuit, completes the parsing to order simultaneously.The order inputed in safety circuit is resolved by it, operates corresponding algorithm core and carries out encryption and decryption calculating, and result is sent to outside.
This interface module is responsible for the communication of data, by the data receiver on external bus to SRAM and control module, and exports data to external bus.
Owing to being all large number operation, in encryption process, need to preserve data in time, therefore adopt SRAM to store data, compared to the method directly adopting register, use SRAM can save a large amount of areas.
This symmetric encipherment algorithm core and RSA/ECC algorithm core are the cores of safety circuit, and the various bottom of cryptographic algorithm and top layer operation all realize at this.It can carry out under the control of control module, by the access calculated and to SRAM, completes calculation task.
Real random number generator is that safety circuit provides reliable random number.
Control module, by controlling whole safety circuit module, completes the various security command operation such as generating random number, encryption, deciphering.
Be sent to data and the order of chip from outside MCU, carry out simple judgement and analyze at the interface controller place of chip, the order and the data that belong to safety circuit aspect just can be sent to safety circuit.Order is delivered to control module by safety circuit interface module, and control module, according to order, processes data, and control module comprises overhead control state machine submodule and command analysis submodule.
Command analysis submodule, resolves order, instructs overhead control state machine to carry out command operation.
Chip receives from after the chip order of outside MCU, if judging is security command, then security module is passed in instruction and data, and command analysis module, according to the order received, judges the operation needing to carry out.According to design, security command is defined as follows:
Table 1 safety circuit command definition table(CDT)
Overhead control state machine is responsible for all operations flow process of security module.It is according to the judgement of command analysis module to order, and startup randomizer, symmetric encipherment algorithm core, each module of ECC encryption kernel calculate, and the constrained input of control data stream and SRAM.
To sum up, the rfid interrogator of the band safe handling function of the embodiment of the present invention, safety circuit is integrated with symmetric encipherment algorithm and rivest, shamir, adelman, solves the safety problem that additional chip brings.Described symmetric encipherment algorithm comprises the cryptographic algorithm such as DES, 3DES and AES; Rivest, shamir, adelman comprises RSA, ECC cryptographic algorithm, and these algorithms all adopt hardware implementing, can provide quick encryption and decryption needs.
One of ordinary skill in the art will appreciate that all or part of step in the various methods of above-described embodiment is that the hardware that can carry out instruction relevant by program has come, this program can be stored in a computer-readable recording medium, storage medium can comprise: ROM (read-only memory) (ROM, Read Only Memory), random access memory (RAM, Random Access Memory), disk or CD etc.
Above the rfid interrogator of the band safe handling function that the embodiment of the present invention provides is described in detail, apply specific case herein to set forth principle of the present invention and embodiment, the explanation of above embodiment just understands method of the present invention and core concept thereof for helping; Meanwhile, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.
Claims (8)
1. the rfid interrogator with safe handling function, is characterized in that, comprising:
AFE (analog front end), for carrying out data communication with exterior antenna, sends to label by after digital signal modulated by antenna, and the signal receiving got from label is become digital signal, carry out data processing for chip;
Interface module, for the data communication of responsible read write line chip and outside MCU;
Digital baseband, for the logic realization of responsible protocol layer and Physical layer, changes the data-signal meeting ISO agreement into and carries out CRC check, parity checking by stream compression;
Safety circuit, for the data security in responsible data communication process, comprises symmetrical enciphering and deciphering algorithm and asymmetric enciphering and deciphering algorithm;
EEPROM, for storing the preset value of data and some registers.
2. the rfid interrogator of band safe handling function as claimed in claim 1, it is characterized in that, described rfid interrogator supports ISO/IEC 15693 agreement or ISO/IEC 14443-A/B agreement.
3. the rfid interrogator of band safe handling function as claimed in claim 1, it is characterized in that, described RFID card reader supports serial communication, or Parallel Interface Communication.
4. the rfid interrogator of band safe handling function as claimed in claim 1, it is characterized in that, described AFE (analog front end) is used for responsible read write line chip and the label signal carried out in communication process sends and receives, comprise modulation-demodulation circuit, amplifier and filtering circuit, antenna end being responded to the simulating signal of coming becomes can for the digital signal of digital baseband identification, and by signal that digital signal transition becomes to be sent by antenna; And also comprising clock control module and power management module, upper electro-detection, detection of power loss function also realize all herein.
5. the rfid interrogator of band safe handling function as claimed in claim 1, it is characterized in that, described digital baseband is used for the realization being responsible for agreement, is by the logical block of protocol hardware, comprises coding/decoding module, mapping block, frame check, fifo module.
6. the rfid interrogator of band safe handling function as claimed in claim 1, it is characterized in that, described safety circuit comprises a symmetric encryption operation core, a rivest, shamir, adelman core, SRAM, real random number generator, control module and interface module.
7. the rfid interrogator of band safe handling function as claimed in claim 6, it is characterized in that, described symmetric encipherment algorithm comprises DES, 3DES and AES encryption algorithm.
8. the rfid interrogator of band safe handling function as claimed in claim 6, it is characterized in that, described rivest, shamir, adelman comprises RSA, ECC cryptographic algorithm.
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| CN201510239490.5A CN104899620B (en) | 2015-05-12 | 2015-05-12 | RFID reader-writer with safety processing function |
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| CN107358127A (en) * | 2017-01-25 | 2017-11-17 | 天地融科技股份有限公司 | A kind of recognition methods of legal chip and system |
| CN108899076A (en) * | 2018-06-12 | 2018-11-27 | 涓ユ不 | A kind of medical treatment Quality Control information system and its control method |
| CN110868717A (en) * | 2019-12-04 | 2020-03-06 | 太原理工大学 | Method for improving wireless communication security based on DES encryption algorithm |
| CN111275153A (en) * | 2020-01-15 | 2020-06-12 | 中国电力科学研究院有限公司 | UHF RFID chip supporting digital communication interface and application method thereof |
| CN112232463A (en) * | 2020-12-15 | 2021-01-15 | 广州智慧城市发展研究院 | Low-power-consumption RFID read-write system and method |
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| CN104579870A (en) * | 2014-12-17 | 2015-04-29 | 广东瑞德智能科技股份有限公司 | RFID-chip-based fast networking method and special device |
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Patent Citations (2)
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| CN104184489A (en) * | 2014-08-06 | 2014-12-03 | 成都九洲电子信息系统股份有限公司 | Wireless transmission apparatus based on ultrahigh-frequency RFID |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107358127A (en) * | 2017-01-25 | 2017-11-17 | 天地融科技股份有限公司 | A kind of recognition methods of legal chip and system |
| CN107358127B (en) * | 2017-01-25 | 2019-11-15 | 天地融科技股份有限公司 | A kind of recognition methods and system of legal chip |
| CN108899076A (en) * | 2018-06-12 | 2018-11-27 | 涓ユ不 | A kind of medical treatment Quality Control information system and its control method |
| CN110868717A (en) * | 2019-12-04 | 2020-03-06 | 太原理工大学 | Method for improving wireless communication security based on DES encryption algorithm |
| CN111275153A (en) * | 2020-01-15 | 2020-06-12 | 中国电力科学研究院有限公司 | UHF RFID chip supporting digital communication interface and application method thereof |
| CN112232463A (en) * | 2020-12-15 | 2021-01-15 | 广州智慧城市发展研究院 | Low-power-consumption RFID read-write system and method |
| CN112232463B (en) * | 2020-12-15 | 2021-04-02 | 广州智慧城市发展研究院 | Low-power-consumption RFID read-write system and method |
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