CN104883694B - A kind of wireless interconnection between chips systematic networking method based on honeycomb Ad hoc - Google Patents
A kind of wireless interconnection between chips systematic networking method based on honeycomb Ad hoc Download PDFInfo
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Abstract
The present invention provides a kind of network-building method of wireless interconnection between chips system, the Advanced Idea based on honeycomb Ad hoc technologies and Cross-layer design proposes a kind of can realize that flexibly simple, communication protocol is suitable for high standardization, reliability and cost and the relatively low wireless interconnection between chips systematic networking method of energy consumption for seamless coverage, network structure on pcb board.By the design wireless interconnection between chips of the design to chip nodal function and the network architecture can as wireless user access WIFI network fast and easy, for the further practical based theoretical of chip wireless interconnection technologies, while radio node design standard is carried out during practical and the design of chip chamber wireless networking provides Technical Reference for industrial quarters from now on.In addition the method applied in the present invention is equally applicable to multi-layer PCB board circuit, between electrical equipment, the design of WiNoC networkings.
Description
Technical field
The present invention relates to the wireless interconnection between chips system realized on a kind of pcb board, more particularly to one kind of the system
Network-building method.
Background technology
Computer nowadays hardware circuit increasingly complicates, and in traditional pcb board circuit, chip chamber is still interconnected by metal wire
And number of pins is more, with the continuous improvement of circuit level, working frequency and clock rate, the coupling of chip chamber mutual interference will more
Come it is stronger, it is serious to restrict the problems such as not only occupying a large amount of areas, also cause power consumption in circuit, delay, pressure drop, electromagnetic crosstalk
The design and manufacture of high speed integrated circuit.With the development of CMOS technology so that the size of on-chip antenna and radio circuit is got over
Next smaller, cost significantly reduces, and many scholars propose the intra/inter- wireless interconnection technologies of chip, i.e., using radio frequency/side wireless communication
Formula substitutes conventional metals interconnection line, realizes the wireless connection of the intra/inter- some function modules of chip, effectively alleviates metal line and core
The Limits properties of piece pin.
Ultra wide band interconnects (UWB-I) technology because it has low cost, low-power consumption, high bandwidth, simple in structure, anti-multipath and guarantor
The features such as close property is strong, is widely used in the intra/inter- wireless interconnection systems of chip,
The intra/inter- local area network for carrying out wireless communication composition of chip is then known as wireless chip domain network (Wireless Chip
Area Network, WCAN).
At present foreign study person in three-dimensional perpendicular coupling technique, on piece is antenna integrated, the radio interconnected communication technology etc.
Make remarkable progress, but overall study still lays particular emphasis on the transmitting of the intra/inter- radio interconnected simple function single channel of chip with connecing
Receive, the overall model and communication mechanism for multiple-user network are not furtherd investigate.Although several researchers have proposed wireless
The networking plan of network-on-chip (WiNoC, Wireless Network On Chip), but just for nothing in the piece of SoC design
The line network architecture, is to encapsulate system integrated in tight one single chip, and the position of each process cores is relatively fixed in piece, generally
It belongs to wireless interconnection systems in WCAN chips in thought.
Attached drawing 1 summarizes the advantage that wireless interconnection between chips are realized on pcb board, and attached drawing 2 is then pure wireless to be used on pcb board
Instead of the wireless interconnection between chips system of wired connection, it will help solve PCB and upload system shared bus structure parallel and extend
Property poor, delay and power consumption is higher, the problem of communication efficiency is low, while chip pin quantity can be reduced, improve flexible design
Degree.Compared to SoC systems, its chip layout is designed according to products characteristics, will more be opened and flexibly, from industrialization and
From the perspective of practical, the design of wireless interconnection systems networking plan also great researching value between WCAN chips.Therefore, if
It is very necessary to count out a kind of network-building method that is concisely and efficiently suitable for wireless interconnection between chips system on pcb board.
The content of the invention
The present invention bases oneself upon the special applications scene of wireless interconnection between chips on PCB in WCAN, by merging cellular communication system
The technical advantage of system and Ad-hoc self-organizing networks, and using the thought of Cross-layer design, propose that one kind can be real on pcb board
Existing seamless coverage, network structure are flexibly simple, communication protocol is suitable for standardization, reliability is high and cost and the relatively low chip of energy consumption
Between wireless interconnection systems network-building method.
In order to realize the purpose of foregoing invention, the present invention provides following technical scheme：
First, as shown in figure 3, in order to realize gamut covering of the wireless signal on pcb board, wireless frequency spectrum is efficiently used
Resource, spatial area is more saved by selection, and can realize that the honeycomb being seamlessly connected carries out the network coverage, will whole PCB
Plate is divided into multiple cellular cells, and is distinguish between by different frequency；With reference to on-chip antenna power characteristic and pcb board it is normal
With physical size, from the angle research of the network planning and rational chip layout position is designed, and determine optimal cell radius
And frequency reuse plan.
Secondly, the function of wireless interconnection between chips system interior joint is specified, and its structure is designed.As shown in figure 3,
Using space on individual layer pcb board as communication environments, general network communication models are established.Seen needing to carry out radio interconnected chip
Make RF nodes, and each RF nodes correspond to an antennaverter, the antenna can be the on-chip antenna that is separately provided or
Chip pin with antenna function.This method realizes interchip communication using pure radio interconnected mode, is different from pure wired mutual
Even or using the wired and network architecture that wirelessly mixes, and its achievement in research also may extend to multi-layer PCB board, electrical equipment it
Between and wireless network-on-chip networking situation.
Again, the design of network communication models is carried out：The core concept of cellular communication and ad hoc network is merged,
Learn from other's strong points to offset one's weaknesses, extract the reasonable key element suitable for WCAN.Retain the wireless access knot of MS-BS in cellular system in the network architecture
Structure, with reference to the multi-hop ad hoc thought of Ad-hoc, proposes the flattening network structure that honeycomb is combined with ad hoc network, structure is based on bee
The Ad-hoc wireless chips domain network model of nest covering.
Finally, using Cross-layer design method, each layer communication mechanism is determined, and by increasing between each layer of protocol stack
Vertical interaction come ensure wireless interconnection between chips resource it is efficient using and information transmitting.
Brief description of the drawings
Fig. 1 is the advantage that wireless interconnection between chips are realized on the pcb board mentioned in background
Fig. 2 is to mention the pure wireless interconnection systems of the chip chamber realized on pcb board in background
Fig. 3 is the PCB schematic diagrames based on honeycomb Ad-Hoc in the present invention；
Fig. 4 is Ad Hoc-WCAN schematic diagram of the present invention based on honeycomb covering；
Fig. 5 is the structural design drawing of each chip RF nodes in the present invention；
Embodiment
With reference to embodiment, the present invention is described in further detail.But this should not be interpreted as to the present invention
The scope of above-mentioned theme is only limitted to following embodiment, all models that the present invention is belonged to based on the technology that present invention is realized
Enclose.
Specific networking plan is as shown in figure 4, entirely pcb board is by the cellular cell group of the identical regular hexagon of multiple sizes
Into neighbor cell uses different frequencies, and realizes seamless coverage by the Rational choice frequency division multiplexing factor, it is illustrated that be multiplexing
The factor is 3 situation.
A certain number of chips are placed in each cellular cell, the number is by the area of chip, chip chamber distance D and small
Area radius R determines that chip area is less than plot area under normal circumstances, and chip chamber distance D is the transmitting day of transmission chip
Distance of the line to the reception antenna for receiving chip.
Assuming that the area of chip is sufficiently small, the area compared to cell can be neglected, and each cell SMIC distance between commutator segments D
All it is maximum user volume N identical, then that the cell that numbering is i accommodatesiCan be by radius of society R and chip chamber distance DiDetermine, order Represent downward rounding, thenBut in order to reduce intra-cell interference degree, reduce and jump
Number, need to make ni≤2。
In specific networking, R can be suitably adjusted according to the size of pcb board, and cellular cell area is represented byIf pcb board area is SPCB, then it can determine that open ended largest cell number k on pcb board, wherein Expression rounds up, if open ended maximum core number N in per celliDetermine, can determine whole
Open ended maximum chip-count C is on a pcb board
Refering to Fig. 5, explanation is designed to RF node structures and function：
Each chip can regard a RF node as, in addition to itself radio transmission-receiving function is completed, also need additional lanes by, data
The functions such as storage, forwarding.
Each RF nodes need to be equipped with a RF interface module and route data storage processing unit.
Wherein RF interface modules are by a UWB transceiver with low-power consumption and low cost and variable-frequency on-chip antenna group
Into.
The physical layer of RF nodes is introduced into the TH-PPM Multiple access modulation techniques in IR-UWB, using different pseudorandom time-hopping codes
User is distinguished, it can be achieved that synchronous transfer between user.
Data storage processing unit is route by modules such as routing decision, channel arbitration, virtual cache control and flow controls
Composition.
Routing decision module is used for the path for determining that source node passes through to destination node communication, and is calculated according to corresponding route
Method determines, with minimum hop count realization, to reduce communication delay to greatest extent；
Channel arbitration module can be completed by designing corresponding MAC protocol, mainly solve the competition of wireless channel interior joint, letter
Road distributes and signal collision problem；
In the present invention, RF nodes use multiple channels access mechanism, and control channel is separated with data channel, improves network
Overall performance：Adapted to by the Random Access of CSMA/CA, RTS-CTS-Data-ACK handshake mechanisms and token ring agreement
The WCAN networks of burst service and network user's volume change, avoid conflicting between node.
Buffer control module is realized using tunnel technology, and the caching team of certain amount is equipped with each of which input port
Row, data packet can be stored in different tunnels and in turn output data respectively, so as to avoid the generation of deadlock；
Flow-control module uses distributed traffic control strategy, and different priority is assigned to data flow, and in source
Data flow control is carried out, the data rate in injection WCAN is adjusted, reduces and postpone and improve throughput.
As shown in figure 4, in specific layout, the position of chip is in communication with each other frequently according to its function and with other chips
What degree was laid out, should try one's best to be in communication with each other is placed in same cellular cell than more frequently node, if interstitial content compared with
It is more, then it can be placed in adjacent co-frequency cell；And the node infrequently to communicate should not be placed on same cell, should be placed in
In non-co-frequency cell, and each cell chips position is obeyed and is uniformly distributed, two-by-two apart from approximately equal, and interrelated journey
Spend highest chip and be centrally disposed cluster head of the position as cell, other members are then considered as cluster member.
Each cell can be considered a cluster, by a central node for being in center (cluster head) and other surrounding processing
Node (cluster member) forms.
Cluster head is generally high end chip (such as CPU, data processing centre) or femto cell；
Cluster member is usually rudimentary chip, memory, LED light, prior-warning device, sensing class chip or wave point
Or chip pin.
Cluster head can be operated in different frequency with the wireless transmitter for being in cell edge cluster member in each cell, specific
It can be switched over during communication.
The cluster head of each cell has bifrequency, i.e. f and F, and wherein f is used for intra cell communication, and F is used between cluster head communicate
Being in the node of two cell edges (not including vertex) has bifrequency, i.e. f1 and f2, and wherein f1 is used for and cell 1
Middle member communication, f2 are used for member communication in neighbor cell 2
The node for being in adjacent three cells boundary vertex has 3 kinds of frequencies, i.e., with adjacent three cell frequency；Cell one：
F1, cell two：F2, cell three：f3.
To each nodal frequency of cell switching requirement can conveniently and efficiently find destination node and realize the whole network cover, it is necessary to
Illustrate, in the case of chip layout is rational, being in the chip functions of each cell edge and boundary vertex will become simple, example
Such as, the cluster member in two adjacent non-co-frequency cells is in each other without communication, then is in two cell edges or 3 cells boundary top
The node of point will no longer carry out multifrequency switching, only have single frequency, i.e., the frequency f of residing cell.
Chip is realized in a manner of self-organizing and automatically accessed.Sub-clustering is used to the differentiated control mechanism of cluster head and cluster member
Method construct hierarchy, realizes distributed and central controlled mixed management mechanism.
Cluster member (including cluster head) with cell can carry out the multi-hop communication of self-organizing by identical cell frequency f.
It is between the cluster member of adjacent not co-frequency cell and communicates, need to be using the node of two cell edges as Ingress node
And carry out self-organizing transmission.
Cluster head also has and other co-frequency cells in addition to it can carry out multi-hop ad hoc communication with this cell cluster member
The authority that communicates of cluster head, and be also to be communicated by multi-hop mode between leader cluster node.
When being in the node of adjacent co-frequency cell and being communicated, it need to pass through using the cluster head of respective cell as Ingress node
Two-stage ad hoc multihop mode is transmitted；
As shown in figure 4, the wireless chip domain network based on honeycomb Ad hoc just forms an ordinary node and advanced section
The hierarchical network of point two-stage self-organizing structures.
United using cross-layer cooperated design method to physical layer, data link layer, network layer and transport layer in network
One coordinated management so that can integrally be constrained in system per layer protocol and combined optimization design is carried out under overall performance requirement, protected
Demonstrate,prove the optimization of network performance and high flexibility ratio.
Mentioned in [0024] and [0028] for physical layer and data link layer relevant design.
In the selection of routing algorithm, it is contemplated that the superpower positioning function of UWB chips, the present invention will use region aids road
By this deterministic routing algorithm, shortest path is quickly filtered out by way of table of query and routing, mitigates and report is controlled in WCAN
The quantity of text, and ensure that data packet efficiently transmits.
Routing algorithm elementary tactics is：The path of whole network is reasonably planned first, is selected for each pair node
One shortest path simultaneously recorded in routing table, and when node is communicated, data packet is according to the position enquiring road of destination node
By table, it is route along pre-determined path.
For 4 kinds of scenes of different interchip communications, routing algorithm also needs to realize by following provisions in specific design：
1. the inter-node communication in same cell, should select the path of hop count minimum, when hop count is identical, it should try one's best and avoid
Forwarded by cluster head, to mitigate the burden of cluster head.
2. communicated between being in the node of adjacent co-frequency cell, need to using the cluster head of respective cell as Ingress node,
With reference to the transmission for 1. calculating minimum hop count and realizing data.
3. adjacent 2 not the inter-node communication of co-frequency cell when, need to be using the node of 2 cell adjacent boundaries as entrance section
Point, calculates shortest path.
4. during the inter-node communication of not co-frequency cell apart from each other, it need to pass through and 2. 3. calculate shortest path.
In flow control policy, the present invention will use token and distributed traffic control mechanism according to the above-mentioned network architecture
Realize the monitoring to WCAN network data rates.
The basic thought of flow control is in the present invention：Using a grading control mechanism, first by a global control
Device collects the information of whole WCAN networks, obtains the state of the network overall situation, and different priority is assigned to data flow, directly real
Now to the control management of each cell cluster head, data flow is set to leave network as early as possible；When cell cluster head is received from global control
After the distribution instruction of device, the data charge velocity of each cluster member in its cell is adjusted into property by the way of progressively feeding back,
So that whole network keeps stable state.
It can see from Fig. 2 and Fig. 4, the benefit brought using the WCAN networking modes of honeycomb self-organizing is included：
1. replacing traditional wired interconnection structure on pcb board in a manner of radio interconnected, flexible design degree is improved, it is particularly possible to subtract
The complexity of light multi-layer PCB board design.
2. the mode of self-organizing, it can be achieved that chip automatically accesses, is arranged net quick similar to automatically configuring in WIFI so that
The networking of WCAN is simple and practicable；
3. due to being divided into honeycomb, seamless coverage is realized so that networking has versatility；
4. due to having carried out rational layout to chip position on PCB, shortest path is optimized, significantly reduces signal biography
Defeated energy consumption and delay；
5. the cluster head of each cell can be specified in the network planning, so that simplify the algorithm of cluster head selection, while cluster member
It can be distinguished by by Multiple Access schemes such as TDMA, CDMA, each member node need not safeguard the routing iinformation of complexity, subtract significantly
Lack all kinds of control overheads, reduce delay and power consumption；
6. can be used between each cellular cell and save frequency resource with strategies such as frequency multiplexings, there is system and preferably may be used
Extendibility；
, can be with 7. the power limit of on-chip antenna in the range of very little, reduces power consumption and ensure that transmission quality
Uniting, easy to form standard convention.
The characteristics of this method, connects in the group-network construction and distributed algorithm that are classified in Ad-hoc technologies with cellular radio
Enter mode to be combined, make between WCAN chips it is radio interconnected can as wireless user accesses WIFI network fast and easy, and
Realize self-organizing operation and the seamless coverage of network.Can solve that the network size that WCAN is faced using planar structure is limited asks
Topic, turn avoid the drawbacks of cellular system multiple management is unfavorable for short-range communication.At the same time can space efficient resource and
Frequency resource, improves network overall throughput, reduces network delay and energy consumption, alleviates network congestion degree so that WCAN's
Networking is simple and practicable.It is industrial quarters from now in practicality for the further practical based theoretical of chip wireless interconnection technologies
Radio node design standard is carried out during change and the design of chip chamber wireless networking provides Technical Reference.In addition the present invention is adopted
Scheme is equally applicable to multi-layer PCB board circuit, between electrical equipment, the design of WiNoC networkings.
Above to a kind of wireless interconnection between chips system group network scheme based on honeycomb Ad hoc provided by the present invention into
Go and be discussed in detail.Specific case used herein is set forth the principle of the present invention and embodiment, and the above is implemented
The explanation of example is only intended to help the method and its core concept for understanding the present invention；Meanwhile for the general technology people of this area
Member, according to the thought of the present invention, there will be changes in specific embodiments and applications, in conclusion this explanation
Book content should not be construed as limiting the invention.
Claims (10)
1. a kind of wireless interconnection between chips systematic networking method based on honeycomb Ad hoc, this method realize chip on pcb board
Between pure radio interconnected networking, it is characterised in that this method networking process is as follows：
A) pcb board is divided into multiple cellular cells and seamless coverage is realized by frequency division multiplexing mode；
B) chip placement in each cellular cell, and determine the structure and function of each chip node；
C) position of chip on PCB is laid out and determines the cluster head in each cell and cluster member；
D) chip is realized in a manner of self-organizing and automatically accessed, and is mixed by carrying out distributed and concentration to cluster member and cluster head
Control is closed, realizes the split pole management to wireless interconnection between chips network；
E) Cross-layer design method is used, determines each layer communication mechanism, and by increasing the vertical friendship between each layer of protocol stack
Mutually realize the chip chamber utilization of resources and information transmission.
2. network-building method as claimed in claim 1, it is characterized in that：This method is suitable for single or multiple lift pcb board, electrical equipment
Between and wireless network-on-chip networking.
3. network-building method as described in claim 1, it is characterized in that：Pcb board is divided into identical cellular of multiple sizes
Cell simultaneously realizes seamless coverage by frequency division multiplexing mode, wherein the radius of each cellular cell is carried out according to the size of pcb board
Adjustment, neighbor cell is distinguish between by different frequency, and realizes seamless coverage by selecting frequency multiplexing factor.
4. network-building method as described in claim 1, it is characterized in that：The chip placement in each cellular cell, number of chips
By the area of chip, chip chamber distance D and radius of society R are determined, wherein D is the transmitting antenna of transmission chip to reception chip
The distance of reception antenna.
5. the network-building method as described in claim 1 or 4, it is characterized in that：Distance D between respective cell chips is identical
When, the maximum user volume N that accommodates in the cell that numbering is iiCan be by radius of society R and chip chamber distance DiDetermine, orderRepresent downward rounding, thenBut in order to reduce intra-cell interference degree, reduce and jump
Number, need to make ni≤2。
6. network-building method as claimed in claim 1, it is characterized in that：Each chip except complete the radio transmission-receiving function of itself it
Outside, additional lanes are also needed by the storage of, data, forwarding capability.
7. the network-building method as described in claim 1 or 6, the structure of each chip is deposited by a RF interface module and route data
Storage unit form, wherein RF interface modules are made of a UWB transceiver and frequency conversion on-chip antenna, route data storage cell by
Routing decision, channel arbitration, virtual cache and flow-control module composition.
8. network-building method as claimed in claim 1, it is characterised in that：To in the layout of chip position, the position of chip is root
It is in communication with each other what frequent degree was laid out according to its function and with other chips；To be in communication with each other frequent node be placed on it is same
In cell or adjacent co-frequency cell, and the node infrequently to communicate is placed in non-co-frequency cell, and each cell chips
Position is obeyed and is uniformly distributed, and the highest chip of interrelated degree is placed on cluster head of the center of housing estate position as cell, its
His member is then considered as cluster member.
9. the network-building method as described in claim 1 or 8, it is characterized in that：Used in the definite cell in cluster head and cluster member
The method construct hierarchy of sub-clustering, each cell can be considered a cluster, by cluster head and cluster member composition, wherein cluster head be CPU,
Data processing centre or femto cell；And cluster member be memory, LED light, prior-warning device, sensing class chip, wave point or
Chip pin；And per cell cluster head and it is in 2 cell edges and the cluster member on 3 cell boundary vertex is switched under different frequency
Work.
10. network-building method as claimed in claim 1, it is characterized in that：, will be to thing in network using the method for Cross-layer design
Reason layer, data link layer, network layer and transport layer carry out unified coordinated management, are vertically interacted between each layer.
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| CN105552501A (en) * | 2016-02-17 | 2016-05-04 | 北京艾达方武器装备技术研究所 | Electromagnetic wave interconnection device and method and application thereof |
| CN106792831B (en) * | 2017-01-25 | 2019-08-30 | 合肥工业大学 | The Congestion Avoidance module and its method of radio node grade and Radio Link grade |
| CN106998571B (en) * | 2017-04-01 | 2020-02-14 | 西安邮电大学 | Ad Hoc peer-to-peer network centerless distributed rapid consensus method |
| CN112911716B (en) * | 2021-02-05 | 2023-02-17 | 贵州久华信电子技术有限公司 | Data transmission method, device, equipment and storage medium |
| CN113556166B (en) * | 2021-07-23 | 2022-08-02 | 北京邮电大学 | Power amplifier suitable for air-to-ground ad hoc network node long-distance transmission and high-speed movement |
| CN114330184B (en) * | 2022-03-15 | 2022-07-15 | 上海国微思尔芯技术股份有限公司 | Multi-level grouping method and device |
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| US9064631B2 (en) * | 2012-01-13 | 2015-06-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Through-chip interface (TCI) structure for wireless chip-to-chip communication |
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| CN101320833A (en) * | 2008-07-10 | 2008-12-10 | 上海交通大学 | Antenna on stairway reflection orienting piece used for wireless interconnection between chips |
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