CN104883164B - A kind of reset circuit and electronic equipment with the circuit - Google Patents
A kind of reset circuit and electronic equipment with the circuit Download PDFInfo
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- CN104883164B CN104883164B CN201510229338.9A CN201510229338A CN104883164B CN 104883164 B CN104883164 B CN 104883164B CN 201510229338 A CN201510229338 A CN 201510229338A CN 104883164 B CN104883164 B CN 104883164B
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Abstract
The invention discloses a kind of reset circuit and electronic equipments with the circuit, wherein the reset circuit includes：At least switching branches all the way, controlling brancher and delay branch；The switching branches one terminate reset trigger end, another termination controlling brancher one end；Described another described delay branch one end of termination of controlling brancher；Another end system control terminal of delay branch.The present invention realizes at least switching branches all the way by using discrete device, and controlling brancher, be delayed branch, time-delay reset is carried out to electronic product, to not only reduce design cost, and the reset circuit of discrete device design is fully powered-off when electronic product does not reset, without electric energy loss.
Description
Technical field
The present invention relates to power electronics field, more particularly to a kind of reset circuit and electronics with the circuit are set
It is standby.
Background technology
With the continuous development of power electronic technique and its continuous promotion of production technology, each class of electronic devices layer goes out not
Thoroughly.Current more and more electronic product volume weights tend to small and light, so that laid-up is increasingly difficult to.Especially
It is when crashing and can not resetting occur in product, product will be unable to use.However, generally use is special multiple in the prior art
Position IC realizes reset function, such as：The reset IC of pulse output；Reset IC need not increase peripheral circuit and can be achieved at the same time
Shutdown resets and effectively distinguishes reset and other operating functions etc..
However, during inventor designs electronic equipment, it is found that at least there are the following problems in the prior art：
The Special reset IC used in the prior art not only higher operating costss, and due to resetting IC in product open state
Under be constantly in energized state, to increase the power consumption of product.
Invention content
In view of the above problems, it is proposed that the present invention overcoming the above problem in order to provide one kind or solves at least partly
Problem is stated, the technical proposal of the invention is realized in this way：
On the one hand, the present invention provides a kind of reset circuits, including：At least switching branches all the way, controlling brancher and delay
Branch；
The switching branches one terminate reset trigger end, another termination controlling brancher one end；
Described another described delay branch one end of termination of controlling brancher；
Another end system control terminal of delay branch.
Preferably, when the reset circuit includes double switch branch；The double switch branch is respectively：First switch
When branch and second switch branch；
The first switch branch includes：7th resistance and second switch pipe；
The second switch branch includes：8th resistance and first switch pipe；
Described 7th resistance one end respectively with the reset trigger end KEY_IN, the second switch pipe pin 1 be connected；Institute
State the 7th resistance other end ground connection；The second switch pipe pin 2 connects the first switch pipe pin 3；The second switch pipe
Pin 3 connects the controlling brancher；
Described 8th resistance one end respectively with the reset trigger end USB_IN, the first switch pipe pin 1 be connected；Institute
State the 8th resistance other end ground connection；The first switch pipe pin 2 is grounded.
Preferably, the controlling brancher includes：First resistor, second resistance and third switching tube；
One termination power VCC of the first resistor, the other end respectively with the second switch pipe pin 3, third switching tube
Pin 1 is connected；
One termination power VCC of the second resistance, for the other end respectively with the third switching tube pin 3, reset signal is defeated
Outlet RESET is connected；
The third switching tube pin 2 is grounded.
Preferably, the delay branch includes：3rd resistor, the 4th resistance, the 5th resistance, the 6th resistance, the first capacitance,
Second capacitance and the first amplifier；
Described 3rd resistor one end meets the reset signal output end RESET respectively, described 5th resistance one end, and described
One amplifier pin 5, second capacitance one end；
The 3rd resistor other end connects described 4th resistance one end, the first amplifier pin 1 respectively；
The second capacitance other end ground connection；
The 4th resistance other end ground connection；
The 5th resistance other end connects described 6th resistance one end respectively, is first capacitance one end；
The first capacitance other end ground connection；
6th resistance is another to terminate the first amplifier pin 3；
The first amplifier pin 2 is grounded；
The first amplifier pin 4 connects the system control terminal.
Preferably, the 5th resistance and the first capacitance are configured according to the latency requirement of reset circuit.
The present invention provides a kind of electronic equipment, including：Reset circuit described in any one as above.
Technical scheme of the present invention by using discrete device design described at least switching branches all the way, controlling brancher and
The branch that is delayed realizes the reset function of electronic product, to not only reduce design cost, and the reset electricity of discrete device design
Road is fully powered-off when electronic product does not reset, and no electric energy loss reduces the power consumption of entire electronic product.
Description of the drawings
Fig. 1 is a kind of reset circuit structural schematic diagram provided in an embodiment of the present invention；
Fig. 2 is a kind of switching branches and controlling brancher circuit diagram of reset circuit provided in an embodiment of the present invention；
Fig. 3 is a kind of delay subcircuits figure of reset circuit provided in an embodiment of the present invention；
Fig. 4 is a kind of electronic equipment structural schematic diagram provided in an embodiment of the present invention.
Specific implementation mode
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
If Fig. 1 is to show a kind of reset circuit structural schematic diagram provided in an embodiment of the present invention；The reset circuit includes：
At least switching branches all the way, controlling brancher and delay branch；
The switching branches one terminate reset trigger end, another termination controlling brancher one end；
Described another described delay branch one end of termination of controlling brancher；
Another end system control terminal of delay branch.
It is a kind of reset circuit figure provided in an embodiment of the present invention as shown in Figures 2 and 3 based on above example；Work as institute
When stating reset circuit comprising double switch branch, the reset circuit includes：First switch branch, second switch branch, control
Branch and delay branch；
The first switch branch includes：7th resistance R7 and second switch pipe Q2；
The second switch branch includes：8th resistance R8 and first switch pipe Q1；
The controlling brancher includes：First resistor R1, second resistance R2 and third switching tube Q3；
The delay branch includes：3rd resistor R3, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the first capacitance
C1, the second capacitance C2 and the first amplifier U1；
The one end the 7th resistance R7 respectively with the reset trigger end KEY_IN, 1 phase of second switch pipe Q2 pins
Even；The 7th resistance R7 other ends ground connection；The second switch pipe Q2 pins 2 connect the first switch pipe Q1 pins 3；It is described
Second switch pipe Q2 pins 3 connect one end first resistor R1 of the controlling brancher, the third switching tube Q3 pins 1 respectively；
The one end the 8th resistance R8 respectively with the reset trigger end USB_IN, 1 phase of first switch pipe Q1 pins
Even；The 8th resistance R8 other ends ground connection；The first switch pipe Q1 pins 2 are grounded.
Mono- termination power VCC of the first resistor R1, the other end respectively with the second switch pipe Q2 pins 3, open by third
Pipe Q3 pins 1 are closed to be connected；
Mono- termination power VCC of the second resistance R2, the other end with the third switching tube Q3 pins 3, reset letter respectively
Number output end RESET is connected；
The third switching tube Q3 pins 2 are grounded.
The one end the 3rd resistor R3 meets the reset signal output end RESET, the one end the 5th resistance R5, institute respectively
State the first amplifier U1 pins 5, described one end second capacitance C2；
The 3rd resistor R3 other ends connect the one end the 4th resistance R4, the first amplifier U1 pins 1 respectively；
The second capacitance C2 other ends ground connection；
The 4th resistance R4 other ends ground connection；
The 5th resistance R5 other ends connect the one end the 6th resistance R6 respectively, are first one end capacitance C1；
The first capacitance C1 other ends ground connection；
The 6th resistance R6 is another to terminate the first amplifier U1 pins 3；
The first amplifier U1 pins 2 are grounded；
The first amplifier U1 pins 4 meet the system control terminal SYS_RTSB.
It should be noted that the 5th resistance R5 and the first capacitance C1 values are matched according to the latency requirement of reset circuit
It sets.
Based on the above circuit, operation principle of the present invention is described in detail；
Such as：When setting condition is to charge when USB is inserted into reset trigger end USB_IN, while pressing the delay of key pressing setting
It can just be resetted after time；Specific as follows, when USB is inserted into, USN_IN is high level, and switching tube Q1 is opened, and switching tube Q1 is in
Constant current area, at this time if pushed button, reset trigger end KEY_IN is high level, then switching tube Q2 is opened, and switching tube Q2 also locates
In constant current area, then the poles D of second switch pipe Q2 are pulled low, and the poles G of the third switching tube Q3 become low, the third switching tube
Q3 is closed, and reset signal output end RESET draws high reset signal output end RESET due to there is second resistance R2 pull-up.
After reset signal output end RESET is drawn high, reset signal output end RESET is to the first amplifier U1 power supplies, simultaneously
Reset signal output end RESET is by the 5th resistance R5 to the first capacitance C1 chargings, the 5th resistance R5 resistance values and the first capacitance C1
Capacitance flexible configuration as needed, capacitance-resistance value configuration determine the size of delay time.When to the first capacitance C1 chargings, first
3 voltage of pin of amplifier U1 is by 0V, at this point, since 1 voltage of the first amplifier U1 positive inputs is negative higher than the first amplifier U1
To 3 voltage of input terminal, therefore system control terminal SYS_RSTB exports high level, with more, the pin 3 of the first amplifier U1 that charges
Voltage is higher, when 3 voltage of pin of the first amplifier U1 is higher than the pin 1 of the first amplifier U1, at this time since the first amplifier U1 is negative
It is higher than 1 voltage of positive input to 3 voltage of input terminal, amplifier output switching activity exports low level, realizes and resets.
When reset trigger end USB_IN and/or reset trigger end KEY_IN wherein 1 and/or 2 are not pressed, switch
Pipe Q1 and Q2 are not turned on, and the poles G of switching tube Q3 are high level under the action of first resistor R1 is pulled up, and switching tube Q3 is led at this time
Logical, reset signal output end RESET is pulled low, and can not be powered to U1, and system control terminal SYS_RSTB exports high level at this time, is
System normal work, does not reset.
It should be noted that due to electronic product in the prior art needed after crashing it is multiple by manually carrying out hardware
Position, simultaneously because product button is fewer, if easily reaching reset condition, system can be resetted through constant error, to meeting
At least one switching branches can be set when bringing puzzlement to user's use, therefore reset being set, the preferred embodiment of the present invention uses 2
The method that road or the control of variable connector branch and delay time reset, ensureing can hand-reset but also will not after product crashes
There is the case where accidentally resetting.
As shown in figure 4, being a kind of electronic equipment structural schematic diagram provided in an embodiment of the present invention；The electronic equipment includes：
Reset circuit described in any one as above.
Technical scheme of the present invention by using discrete device design described at least switching branches all the way, controlling brancher and
The branch that is delayed realizes the reset function of electronic product, to not only reduce design cost, and the reset electricity of discrete device design
Road is fully powered-off when electronic product does not reset, and no electric energy loss reduces the power consumption of entire electronic product.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the scope of the present invention.It is all
Any modification, equivalent replacement, improvement and so within the spirit and principles in the present invention, are all contained in protection scope of the present invention
It is interior.
Claims (8)
1. a kind of reset circuit, which is characterized in that including：At least switching branches all the way, controlling brancher and delay branch；
The switching branches one terminate reset trigger end, another termination controlling brancher one end；
Described another described delay branch one end of termination of controlling brancher；
Another terminating systems control terminal of delay branch；
When the reset circuit includes double switch branch；The double switch branch is respectively：First switch branch and second
When switching branches；
The first switch branch includes：7th resistance and second switch pipe；
The second switch branch includes：8th resistance and first switch pipe；
Described 7th resistance one end respectively with reset trigger end KEY_IN, the second switch pipe pin 1 be connected；7th electricity
Hinder other end ground connection；The second switch pipe pin 2 connects the first switch pipe pin 3；The second switch pipe pin 3 meets institute
State controlling brancher；
Described 8th resistance one end respectively with reset trigger end USB_IN, the first switch pipe pin 1 be connected；8th electricity
Hinder other end ground connection；The first switch pipe pin 2 is grounded.
2. reset circuit according to claim 1, which is characterized in that the controlling brancher includes：First resistor, the second electricity
Resistance and third switching tube；
One termination power VCC of the first resistor, the other end respectively with the second switch pipe pin 3, third switching tube pin 1
It is connected；
One termination power VCC of the second resistance, the other end respectively with the third switching tube pin 3, reset signal output end
RESET is connected；
The third switching tube pin 2 is grounded.
3. reset circuit according to claim 2, which is characterized in that the delay branch includes：3rd resistor, the 4th electricity
Resistance, the 5th resistance, the 6th resistance, the first capacitance, the second capacitance and the first amplifier；
Described 3rd resistor one end connects reset signal output end RESET, described 5th resistance one end, the first amplifier pipe respectively
Foot 5, second capacitance one end；
The 3rd resistor other end connects described 4th resistance one end, the first amplifier pin 1 respectively；
The second capacitance other end ground connection；
The 4th resistance other end ground connection；
The 5th resistance other end connects described 6th resistance one end, first capacitance one end respectively；
The first capacitance other end ground connection；
6th resistance is another to terminate the first amplifier pin 3；
The first amplifier pin 2 is grounded；
The first amplifier pin 4 connects the system control terminal；
Wherein, the first amplifier pin 3 is inverting input, and the first amplifier pin 2 is negative power end, and the first amplifier pin 4 is defeated
Outlet.
4. reset circuit according to claim 3, which is characterized in that the 5th resistance and the first capacitance are according to reset
The latency requirement of circuit is configured.
5. a kind of electronic equipment, which is characterized in that including：Reset circuit, the reset circuit include：An at least way switch branch
Road, controlling brancher and delay branch；
The switching branches one terminate reset trigger end, another termination controlling brancher one end；
Described another described delay branch one end of termination of controlling brancher；
Another terminating systems control terminal of delay branch；
When the reset circuit includes double switch branch；The double switch branch is respectively：First switch branch and second
When switching branches；
The first switch branch includes：7th resistance and second switch pipe；
The second switch branch includes：8th resistance and first switch pipe；
Described 7th resistance one end respectively with reset trigger end KEY_IN, the second switch pipe pin 1 be connected；7th electricity
Hinder other end ground connection；The second switch pipe pin 2 connects the first switch pipe pin 3；The second switch pipe pin 3 meets institute
State controlling brancher；
Described 8th resistance one end respectively with reset trigger end USB_IN, the first switch pipe pin 1 be connected；8th electricity
Hinder other end ground connection；The first switch pipe pin 2 is grounded.
6. electronic equipment according to claim 5, which is characterized in that the controlling brancher includes：First resistor, the second electricity
Resistance and third switching tube；
One termination power VCC of the first resistor, the other end respectively with the second switch pipe pin 3, third switching tube pin 1
It is connected；
One termination power VCC of the second resistance, the other end respectively with the third switching tube pin 3, reset signal output end
RESET is connected；
The third switching tube pin 2 is grounded.
7. electronic equipment according to claim 6, which is characterized in that the delay branch includes：3rd resistor, the 4th electricity
Resistance, the 5th resistance, the 6th resistance, the first capacitance, the second capacitance and the first amplifier；
Described 3rd resistor one end connects reset signal output end RESET, described 5th resistance one end, the first amplifier pipe respectively
Foot 5, second capacitance one end；
The 3rd resistor other end connects described 4th resistance one end, the first amplifier pin 1 respectively；
The second capacitance other end ground connection；
The 4th resistance other end ground connection；
The 5th resistance other end connects described 6th resistance one end, first capacitance one end respectively；
The first capacitance other end ground connection；
6th resistance is another to terminate the first amplifier pin 3；
The first amplifier pin 2 is grounded；
The first amplifier pin 4 connects the system control terminal；
Wherein, the first amplifier pin 3 is inverting input, and the first amplifier pin 2 is negative power end, and the first amplifier pin 4 is defeated
Outlet.
8. electronic equipment according to claim 7, which is characterized in that the 5th resistance and the first capacitance are according to reset
The latency requirement of circuit is configured.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510229338.9A CN104883164B (en) | 2015-05-07 | 2015-05-07 | A kind of reset circuit and electronic equipment with the circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510229338.9A CN104883164B (en) | 2015-05-07 | 2015-05-07 | A kind of reset circuit and electronic equipment with the circuit |
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| Publication Number | Publication Date |
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| CN104883164A CN104883164A (en) | 2015-09-02 |
| CN104883164B true CN104883164B (en) | 2018-09-04 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201510229338.9A Active CN104883164B (en) | 2015-05-07 | 2015-05-07 | A kind of reset circuit and electronic equipment with the circuit |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106849921B (en) * | 2017-03-28 | 2023-08-04 | 歌尔科技有限公司 | Hardware reset circuit and electronic product |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103338029A (en) * | 2013-06-20 | 2013-10-02 | 歌尔声学股份有限公司 | Automatic reset device |
| CN103440027A (en) * | 2013-09-03 | 2013-12-11 | 深圳市芯海科技有限公司 | Singlechip and on-chip power-on reset circuit thereof |
| CN103825593A (en) * | 2014-03-18 | 2014-05-28 | 青岛歌尔声学科技有限公司 | Reset signal generating circuit and electronic equipment |
| CN104407687A (en) * | 2014-12-09 | 2015-03-11 | 青岛歌尔声学科技有限公司 | Reset circuit |
| CN204794935U (en) * | 2015-05-07 | 2015-11-18 | 青岛歌尔声学科技有限公司 | Reset circuit and have electronic equipment of this circuit |
-
2015
- 2015-05-07 CN CN201510229338.9A patent/CN104883164B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103338029A (en) * | 2013-06-20 | 2013-10-02 | 歌尔声学股份有限公司 | Automatic reset device |
| CN103440027A (en) * | 2013-09-03 | 2013-12-11 | 深圳市芯海科技有限公司 | Singlechip and on-chip power-on reset circuit thereof |
| CN103825593A (en) * | 2014-03-18 | 2014-05-28 | 青岛歌尔声学科技有限公司 | Reset signal generating circuit and electronic equipment |
| CN104407687A (en) * | 2014-12-09 | 2015-03-11 | 青岛歌尔声学科技有限公司 | Reset circuit |
| CN204794935U (en) * | 2015-05-07 | 2015-11-18 | 青岛歌尔声学科技有限公司 | Reset circuit and have electronic equipment of this circuit |
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| Publication number | Publication date |
|---|---|
| CN104883164A (en) | 2015-09-02 |
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Effective date of registration: 20240513 Address after: 266104 No. 500, Songling Road, Laoshan District, Qingdao, Shandong Patentee after: GOERTEK TECHNOLOGY Co.,Ltd. Country or region after: China Address before: 266061 5, 3 building, Fortune Plaza, 18 Qinling Mountains Road, Laoshan District, Qingdao, Shandong. Patentee before: QINGDAO GOERTEK TECHNOLOGY Co.,Ltd. Country or region before: China |
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