CN104867947A - Pixel structure and thin film transistor - Google Patents
Pixel structure and thin film transistor Download PDFInfo
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- CN104867947A CN104867947A CN201510273677.7A CN201510273677A CN104867947A CN 104867947 A CN104867947 A CN 104867947A CN 201510273677 A CN201510273677 A CN 201510273677A CN 104867947 A CN104867947 A CN 104867947A
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- 239000010409 thin film Substances 0.000 title claims description 16
- 239000010410 layer Substances 0.000 description 99
- 239000011241 protective layer Substances 0.000 description 9
- 239000000758 substrate Substances 0.000 description 9
- 238000002161 passivation Methods 0.000 description 8
- 239000000463 material Substances 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 5
- 229910021389 graphene Inorganic materials 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 239000003989 dielectric material Substances 0.000 description 3
- 238000005286 illumination Methods 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 229920000058 polyacrylate Polymers 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- JYMITAMFTJDTAE-UHFFFAOYSA-N aluminum zinc oxygen(2-) Chemical compound [O-2].[Al+3].[Zn+2] JYMITAMFTJDTAE-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 description 1
- 239000000891 luminescent agent Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910021392 nanocarbon Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- NHDHVHZZCFYRSB-UHFFFAOYSA-N pyriproxyfen Chemical compound C=1C=CC=NC=1OC(C)COC(C=C1)=CC=C1OC1=CC=CC=C1 NHDHVHZZCFYRSB-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
A pixel structure comprises a scanning line, a data line, a grid electrode, a channel layer, a grid dielectric layer, a source electrode, a drain electrode and a pixel electrode. The data lines and the scanning lines are arranged in a staggered mode. The grid is electrically connected with the scanning line. The gate dielectric layer is at least partially between the channel layer and the gate. The source electrode is electrically connected with the data line. The source and the drain are electrically connected with the channel layer, and at least one of the source and the drain comprises a first part and a second part, wherein the first part extends along the first direction, and at least part of the first part is overlapped with the channel layer; the second part is connected with the first part and extends along a second direction, the second direction is not parallel to the first direction, and the second part at least partially overlaps with the grid. The pixel electrode is electrically connected with the drain electrode.
Description
[technical field]
This exposure relates to a kind of dot structure.
[background technology]
Liquid crystal indicator is the display and control utilizing thin-film transistor (Thin FilmTransistor) to carry out each pixel, for the thin-film transistor of bottom gate type (Bottom Gate), when light source luminescents such as backlights, gate electrode has the function of shading for the channel layer being arranged at top, in order to reduce the induced leakage current (Light Leakage Current) that channel layer produces when thin-film transistor disconnects, to maintain the image quality of the good switching characteristic of thin-film transistor and liquid crystal indicator.
Because source electrode and drain electrode also cannot cover by the grid of thin-film transistor completely, the light that part backlight is sent utilizes reflection between source/drain and grid and admission passage layer, cause extra induced leakage current, particularly current high brightness backlights product-derived, its induced leakage current caused is serious especially, and then reduces the image quality of liquid crystal indicator.Therefore, how to reduce because the induced leakage current that the light reflection between source/drain and grid produces is an important topic in fact.
[summary of the invention]
A technology aspect of the present invention is providing a kind of dot structure, in order to improve the problem that above prior art is mentioned.
One embodiment of the present invention provides a kind of dot structure, comprises scan line, data wire, grid, channel layer, gate dielectric layer, source electrode, drain electrode and pixel electrode.Data wire and scan line are crisscross arranged.Grid is electrically connected scan line.Gate dielectric layer is at least partly between channel layer and grid.Source electrode is electrically connected data wire.Source electrode is electrically connected channel layer with drain electrode, and source electrode comprises Part I and Part II with the wherein at least one that drains, and wherein Part I extends along first direction, and Part I is overlapping with channel layer at least partly.Part II connects Part I, and extends along second direction, and second direction is not parallel with first direction, and Part II is at least part of and gate overlap.Pixel electrode is electrically connected drain electrode.
In one or more execution mode of the present invention, source electrode comprises Part III and Part IV with the wherein another one that drains.Part III extends along third direction, and Part III is overlapping with channel layer at least partly.Part IV connects Part III, and extends along fourth direction, and fourth direction is not parallel with third direction, and Part IV is at least part of and gate overlap.
In one or more execution mode of the present invention, fourth direction does not extend through channel layer.
In one or more execution mode of the present invention, third direction extends through channel layer.
In one or more execution mode of the present invention, second direction does not extend through channel layer.
In one or more execution mode of the present invention, first direction extends through channel layer.
Another embodiment of the present invention provides a kind of dot structure, comprises scan line, data wire, grid, channel layer, gate dielectric layer, source electrode, drain electrode and pixel electrode.Data wire and scan line are crisscross arranged.Grid is electrically connected scan line.Gate dielectric layer is at least partly between channel layer and grid.Source electrode is electrically connected data wire.Source electrode is electrically connected channel layer with drain electrode, and source electrode comprises Part I, Part II and the first turning point with the wherein at least one that drains, wherein Part I is overlapping with channel layer at least partly, Part II is at least partly not overlapping with channel layer with gate overlap, first turning point connects Part I and Part II extends along different directions to make Part I and Part II, and the first turning point and grid are overlapping at least partly.Pixel electrode is electrically connected drain electrode.
In one or more execution mode of the present invention, source electrode comprises Part III, Part IV and the second turning point with the wherein another one that drains.Part III is overlapping with channel layer at least partly, Part IV is at least partly not overlapping with channel layer with gate overlap, second turning point connects Part III and Part IV extends along different directions to make Part III and Part IV, and wherein the second turning point and grid are overlapping at least partly.
In one or more execution mode of the present invention, the long axis direction of Part IV does not extend through channel layer.
In one or more execution mode of the present invention, the long axis direction of Part III extends through channel layer.
In one or more execution mode of the present invention, the long axis direction of Part II does not extend through channel layer.
In one or more execution mode of the present invention, the long axis direction of Part I extends through channel layer.
Another embodiment of the invention provides a kind of thin-film transistor, comprises grid, channel layer, gate dielectric layer, source electrode and drain electrode.Channel layer is positioned on grid.Gate dielectric layer is at least partly between channel layer and grid.Source electrode is electrically connected channel layer with drain electrode, and source electrode comprises Part I and Part II with the wherein at least one that drains, and wherein Part I extends along first direction, and Part I is overlapping with channel layer at least partly.Part II connects Part I, and extends along second direction, and second direction is not parallel with first direction, and Part II is at least part of and gate overlap.
In one or more execution mode of the present invention, source electrode comprises Part III and Part IV with the wherein another one that drains.Part III extends along third direction, and Part III is overlapping with channel layer at least partly.Part IV connects Part III, and extends along fourth direction, and fourth direction is not parallel with third direction, and Part IV is at least part of and gate overlap.
In one or more execution mode of the present invention, fourth direction does not extend through channel layer.
In one or more execution mode of the present invention, third direction extends through channel layer.
In one or more execution mode of the present invention, second direction does not extend through channel layer.
In one or more execution mode of the present invention, first direction extends through channel layer.
[accompanying drawing explanation]
Fig. 1 illustrates the dot structure top view according to an embodiment of the present invention.
Fig. 2 illustrates the profile of the line segment I-I along Fig. 1.
Fig. 3 illustrates the profile of the line segment II-II along Fig. 1.
Fig. 4 illustrates the profile of the line segment III-III along Fig. 1.
Fig. 5 and Fig. 6 illustrates the dot structure top view according to the different execution mode of the present invention respectively.
Fig. 7 A and Fig. 7 B illustrates the local top view according to the dot structure of one embodiment of the invention and the dot structure of a control group respectively.
Fig. 8 illustrates Fig. 7 A induced leakage current result measured under different backlight illumination from the dot structure of Fig. 7 B.
[symbol description]
10: dot structure
101: scan line
102: data wire
103: grid
104,104 ': drain electrode
104 (a): Part I
104 (b): Part II
104 (c): the first turning point
105,105 ': source electrode
105 (a): Part III
105 (b): Part IV
105 (c): the second turning point
106: channel layer
107: pixel electrode
108: substrate
109: gate dielectric layer
110: passivation layer
112: protective layer
120,130: incident light
α: angle
I-I, II-II, III-III: line segment
X, Y: direction
[embodiment]
Below will with graphic exposure embodiments of the present invention, as clearly stated, the details in many practices will be explained in the following description.But should be appreciated that, the details in the plurality of practice is not applied to limit the present invention.That is, in some embodiments of the present invention, the details in the plurality of practice is non-essential.In addition, for the purpose of simplicity of illustration, some known usual structures and element will illustrate in the mode simply illustrated in the drawings.
Referring to Fig. 1 and Fig. 2, wherein, Fig. 1 illustrates the top view of the dot structure 10 according to an embodiment of the present invention, and Fig. 2 is then the profile of the line segment I-I illustrated along Fig. 1.Dot structure 10 comprises scan line 101, data wire 102, grid 103, channel layer 106, gate dielectric layer 109, source electrode 105, drain electrode 104 and pixel electrode 107, wherein grid 103, channel layer 106, gate dielectric layer 109, source electrode 105, drain electrode 104 form thin-film transistor jointly, whether show so as to controlling dot structure 10.
Data wire 102 and scan line 101 are crisscross arranged.Grid 103 is electrically connected scan line 101.Gate dielectric layer 109 is at least partly between channel layer 106 and grid 103.Source electrode 105 is electrically connected data wire 102.Source electrode 105 is electrically connected channel layer 106 respectively with drain electrode 104.Pixel electrode 107 is electrically connected drain electrode 104.
In the present embodiment, drain electrode 104 comprises Part I 104 (a) and Part II 104 (b).The Part I 104 (a) of drain electrode 104 extends along first direction, and the Part I 104 (a) of drain electrode 104 and channel layer 106 partly overlap, and completely overlapping with grid 10.The Part II 104 (b) of drain electrode 104 connects the Part I 104 (a) of drain electrode 104, and extend along second direction, and the Part II 104 (b) of drain electrode 104 and grid 103 partly overlap, and not overlapping with channel layer 106.Aforesaid first direction is such as the direction X of Fig. 1, and second direction is such as the direction Y of Fig. 1.First direction is not parallel with second direction, that is accompanies the angle α of non-zero between first direction and second direction.
In the present embodiment, drain electrode 104 more comprises the first turning point 104 (c), first turning point 104 (c) connects the Part I 104 (a) of drain electrode 104 and the Part II 104 (b) of drain electrode, and through the first turning point 104 (c), allow the Part I 104 (a) of drain electrode 104 extend towards first direction (that is direction X of Fig. 1) and second direction (that is direction Y of Fig. 1) respectively with the Part II 104 (b) of drain electrode 104.
As shown in Figure 1, in the present embodiment, the Part I 104 (a) of drain electrode 104 extends along first direction (that is direction X), and first direction can extend through channel layer 106.In other words, the long axis direction of the Part I 104 (a) of drain electrode 104 can extend through channel layer 106.Thus, the data-signal that data wire 102 provides will be able to pass to drain electrode 104 from source electrode 105 via channel layer 106, and by the data-signal of channel layer 106, pixel electrode 107 be passed to Part II 104 (b) in the Part I 104 (a) sequentially via drain electrode 104, the first turning point 104 (c).
On the other hand, second direction (that is direction Y of Fig. 1) is then do not extend through channel layer 106.That is, the long axis direction of the Part II 104 (b) of drain electrode 104 can not extend through channel layer 106, and the incident light 120 sent to avoid backlight injects channel layer 106 by the reflection between drain electrode 104 and grid 103.
More particularly, referring to Fig. 1 and Fig. 3, wherein Fig. 3 illustrates the profile of the line segment II-II along Fig. 1.After the incident light 120 sent when backlight is incident to gate dielectric layer 109 from the place that drain electrode 104 and grid 103 are underlapped, incident light 120 can advance in gate dielectric layer 109 by the reflection between drain electrode 104 and grid 103.Because light has the characteristic of straight ahead, so incident light 120 can be left from the first turning point 104 (c) of drain electrode 104 along second direction (that is direction Y of Fig. 1) by the Part II 104 (b) of drain electrode 104, and can not turn by drain 104 Part I 104 (a) and inject channel layer 106, make channel layer 106 produce induced leakage current.
In the present embodiment, angle α between first direction (that is direction X of Fig. 1) and second direction (that is direction Y of Fig. 1) can be and is less than or equal to about 90 degree, to allow along the Part II 104 (b) of the progressive incident light 120 of second party by drain electrode 104, but can not turn and inject channel layer 106 by the Part I 104 (a) of drain electrode 104 again, make channel layer 106 produce induced leakage current.Should be appreciated that, although the angle α that Fig. 1 illustrates between first direction (i.e. direction X) and second direction (i.e. direction Y) is 90 degree, but angle α also can be other angles, as long as amount incident light 120 can being injected channel layer 106 is reduced to the degree that can accept.
Return Fig. 1, in the present embodiment, source electrode 105 comprises Part III 105 (a) and Part IV 105 (b).The Part III 105 (a) of source electrode 105 extends along third direction, and the Part III 105 (a) of source electrode 105 and channel layer 106 partly overlap, and completely overlapping with grid 10.The Part IV 105 (b) of source electrode 105 connects the Part III 105 (a) of source electrode 105, and extend along fourth direction, and the Part IV 105 (b) of source electrode 105 and grid 103 partly overlap, and not overlapping with channel layer 106.Aforesaid third direction is such as the direction Y of Fig. 1, and fourth direction is such as the direction X of Fig. 1.Third direction is not parallel with fourth direction, that is accompanies the angle α of non-zero between third direction and fourth direction.
In present embodiment, source electrode 105 more comprises the second turning point 105 (c), second turning point 105 (c) connects the Part III 105 (a) of source electrode 105 and the Part IV 105 (b) of source electrode 105, and through the second turning point 105 (c), allow the Part IV 105 (b) of the Part III 105 (a) of source electrode 105 and source electrode 105 extend along third direction (that is direction Y of Fig. 1) and fourth direction (that is direction X of Fig. 1) respectively.
As shown in Figure 1, in the present embodiment, the Part III 105 (a) of source electrode 105 extends along third direction (that is direction Y), and third direction can extend through channel layer 106.In other words, the long axis direction of the Part III 105 (a) of source electrode 105 can extend through channel layer 106.Thus, the Part III 105 (a) of the Part IV 105 (b) sequentially via source electrode 105, the second turning point 105 (c), source electrode 105 is passed to channel layer 106 by the data-signal that data wire 102 provides, and passes to drain electrode 104 via channel layer 106.
On the other hand, fourth direction (that is direction X of Fig. 1) is then do not extend through channel layer 106.In other words, the long axis direction of the Part IV 105 (b) of source electrode 105 can not extend through channel layer 106, and the incident light sent to avoid backlight injects channel layer 106 by the reflection between source electrode 105 and grid 103.
More particularly, referring to Fig. 1 and Fig. 4, wherein Fig. 4 illustrates the profile of the line segment III-III along Fig. 1.After the incident light 130 provided when backlight is incident to gate dielectric layer 109 from the place that source electrode 105 and grid 103 are underlapped, incident light 130 advances in gate dielectric layer 109 by the reflection between source electrode 105 and grid 103.Because light has the characteristic of straight ahead, so incident light 130 is left from the second turning point 105 (c) of source electrode 105 along fourth direction (that is direction X of Fig. 1) by the Part IV 105 (b) of source electrode 105, and can not turn by the Part III 105 (a) of source electrode 105 and inject channel layer 106, make channel layer 106 produce induced leakage current.
In the present embodiment, the angle α of third direction (that is direction Y of Fig. 1) and fourth direction (that is direction X of Fig. 1) is for being less than or equal to 90 degree, to allow the direct Part IV 105 (b) by source electrode 105 of incident light 130 advanced along fourth direction, but can not turn by the Part III 105 (a) of source electrode 105 and inject channel layer 106, making channel layer 106 produce induced leakage current.Should be appreciated that, although the angle α that Fig. 1 illustrates between third direction (i.e. direction Y) and fourth direction (i.e. direction X) is 90 degree, but angle α also can be other angles, as long as amount incident light 130 can being injected channel layer 106 is reduced to the degree that can accept.
In aforesaid execution mode, the drain electrode 104 in dot structure 10 and source electrode 105 all have the design of turning point, but in other embodiments, only can also be drained 104 designs with turning point, as shown in Figure 5, or only source electrode 105 has the design of turning point, as shown in Figure 6.
Get back to the 1st, 2 figure, above-mentioned dot structure 10 is arranged on substrate 108, and wherein substrate 108 can be hard substrate or soft substrate plate.Hard substrate can be such as glass substrate.Soft substrate plate can be such as polyimides (Polyimide; PI) substrate.
Above-mentioned scan line 101 can belong to same patterned conductive layer, such as the first metal layer with grid 103.Above-mentioned source electrode 105, drain electrode 104 can belong to same patterned conductive layer, such as the second metal level with data wire 102.The material of above-mentioned the first metal layer and the second metal level can be any metal, such as: titanium, molybdenum, chromium, iridium, aluminium, copper, silver, gold or above-mentioned combination in any, its generation type can be film, photoetching and etch process.More particularly, the thin film manufacture process described in this section can be physical vaporous deposition, such as sputtering method.
The material of above-mentioned gate dielectric layer 109 can be any dielectric material, such as: silicon nitride, silica, silicon oxynitride, graphene oxide, nitrogenize Graphene, nitrogen graphene oxide, polymeric material or above-mentioned combination in any, its generation type can be film, photoetching and etch process.
The material of above-mentioned channel layer 106 can be any semi-conducting material, such as: amorphous silicon, polysilicon, low temperature polycrystalline silicon, monocrystalline silicon, oxide semiconductor (oxide semiconductor), Graphene or above-mentioned combination in any, its generation type can be film, photoetching and etch process.
The material of above-mentioned pixel electrode 107 can be any electric conducting material, such as: tin indium oxide, indium zinc oxide, zinc oxide aluminum, Graphene, nano carbon tube or above-mentioned arbitrary combination, its generation type can be film, photoetching and etch process.
In the present embodiment, dot structure 10 still optionally comprises passivation layer 110 and protective layer 112.This passivation layer 110 can cover scan line 101, data wire 102, grid 103, channel layer 106, drain electrode 104 and source electrode 105, with impact or the pollution of avoiding the plurality of element to be subject to environmental factor.Protective layer 112 is covered on passivation layer 110.In the present embodiment, protective layer 112 directly covers passivation layer 110, but this does not limit the present invention, if having other laminations above passivation layer 110, such as other dielectric layers or barrier layer, protective layer 112 also can cover the plurality of lamination.That is protective layer 112 can directly or indirectly cover passivation layer 110.
The material of above-mentioned passivation layer 110 can be Inorganic Dielectric Material, such as silicon nitride, silica, silicon oxynitride or above-mentioned combination in any.The material of above-mentioned protective layer 112 can be any organic dielectric materials, such as: acrylic polymer (acrylic polymer).The thickness of protective layer 112 can be about 3 μm of (microns; Micrometer).The generation type of protective layer 112 can be such as spin-coating method.
Fig. 7 A and Fig. 7 B illustrates the local top view according to the dot structure of embodiments of the invention and the dot structure of control group respectively.Fig. 8 illustrates according to the dot structure of Fig. 7 A and Fig. 7 B induced leakage current result measured under different backlight illumination, and its transverse axis is the voltage difference of grid and source electrode, the longitudinal axis by under grid pressure reduction different from source electrode in drain the electric current that obtains of measurement.
Please also refer to Fig. 7 A and Fig. 7 B, Fig. 7 A is the dot structure according to embodiments of the invention, drain electrode 104 in dot structure includes the Part I 104 (a) and Part II 104 (b) that extend towards different directions respectively, and in order to connect the first turning point 104 (c) of Part I 104 (a) and Part II 104 (b).Source electrode 105 in dot structure includes the Part III 105 (a) and Part IV 105 (b) that extend towards different directions respectively, and in order to connect the second turning point 105 (c) of Part III 105 (a) and Part IV 105 (b).The drain electrode 104 ' of control group in Fig. 7 B in dot structure does not all have turning point design with source electrode 105 '.Find under different backlight illumination (from 20 from the experimental result of Fig. 8,000nits to 1,500,000nits), the induced leakage current of embodiments of the invention declines 30% ~ 40% than the light leakage current of control group, proves that the present embodiment effectively can reduce induced leakage current really.
In sum, because drain electrode and/or source electrode have the first (three) part and the second (four) part extended towards different directions respectively, so incident light can directly be left from turning point by drain electrode and/or source electrode, can not turn again and inject channel layer, therefore can reduce the induced leakage current of channel layer.
Although the present invention discloses as above with execution mode; so itself and be not used to limit the present invention, anyly have the knack of this those skilled in the art, without departing from the spirit and scope of the present invention; when being used for a variety of modifications and variations, therefore protection scope of the present invention is when being as the criterion depending on the accompanying claim person of defining.
Claims (18)
1. a dot structure, is characterized in that, comprising:
Scan line;
One data wire, interlocks with this scan line;
One grid, is electrically connected this scan line;
One channel layer;
One gate dielectric layer, at least partly between this channel layer and this grid;
One source pole, is electrically connected this data wire;
One drain electrode, this source electrode and this drain electrode are electrically connected this channel layer, and this source electrode and this source electrode wherein at least one comprise:
One Part I, extends along a first direction, and this Part I is overlapping with this channel layer at least partly; And
One Part II, connects this Part I, and extends along a second direction, and this second direction is not parallel with this first direction, and this Part II is at least part of and this gate overlap; And
One pixel electrode, is electrically connected this drain electrode.
2. dot structure as claimed in claim 1, it is characterized in that, this source electrode and this drain electrode wherein another one comprise:
One Part III, extends along a third direction, and this Part III is overlapping with this channel layer at least partly; And
One Part IV, connects this Part III, and extends along a fourth direction, and this fourth direction is not parallel with this third direction, and this Part IV is at least part of and this gate overlap.
3. dot structure as claimed in claim 2, it is characterized in that, this fourth direction does not extend through this channel layer.
4. dot structure as claimed in claim 2, it is characterized in that, this third direction extends through this channel layer.
5. dot structure as claimed in claim 1, it is characterized in that, this second direction does not extend through this channel layer.
6. dot structure as claimed in claim 1, it is characterized in that, this first direction extends through this channel layer.
7. a dot structure, is characterized in that, comprising:
Scan line;
One data wire, interlocks with this scan line;
One grid, is electrically connected this scan line;
One channel layer;
One gate dielectric layer, at least partly between this channel layer and this grid;
One source pole, is electrically connected this data wire;
One drain electrode, this source electrode and this drain electrode are electrically connected this channel layer, and this source electrode and this drain electrode is wherein at least one comprises:
One Part I, overlapping with this channel layer at least partly;
One Part II, at least part of and this gate overlap, not overlapping with this channel layer; And
One first turning point, connects this Part I and this Part II extends along different directions to make this Part I and this Part II, and it is characterized in that, this first turning point is overlapping at least partly with this grid; And
One pixel electrode, is electrically connected this drain electrode.
8. dot structure as claimed in claim 7, it is characterized in that, wherein another comprises for this source electrode and this drain electrode:
One Part III, overlapping with this channel layer at least partly;
One Part IV, at least part of and this gate overlap, not overlapping with this channel layer; And
One second turning point, connects this Part III and this Part IV extends along different directions to make this Part III and this Part IV, and it is characterized in that, this second turning point is overlapping at least partly with this grid.
9. dot structure as claimed in claim 8, it is characterized in that, the long axis direction of this Part IV does not extend through this channel layer.
10. dot structure as claimed in claim 8, it is characterized in that, the long axis direction of this Part III extends through this channel layer.
11. dot structures as claimed in claim 7, it is characterized in that, the long axis direction of this Part II does not extend through this channel layer.
12. dot structures as claimed in claim 7, it is characterized in that, the long axis direction of this Part I extends through this channel layer.
13. 1 kinds of thin-film transistors, is characterized in that, comprise:
One grid;
One channel layer, is positioned on this grid;
One gate dielectric layer, at least partly between this grid and this channel layer;
One source pole, is electrically connected this channel layer; And
One drain electrode, be electrically connected this channel layer, it is characterized in that, this source electrode and this source electrode wherein at least one comprise:
One Part I, extends along a first direction, and this Part I is overlapping with this channel layer at least partly; And
One Part II, connects this Part I, and extends along a second direction, and this second direction is not parallel with this first direction, and this Part II is at least part of and this gate overlap.
14. thin-film transistors as claimed in claim 13, it is characterized in that, this source electrode and this drain electrode wherein another one comprise:
One Part III, extends along a third direction, and this Part III is overlapping with this channel layer at least partly; And
One Part IV, connects this Part III, and extends along a fourth direction, and this fourth direction is not parallel with this third direction, and this Part IV is at least part of and this gate overlap.
15. thin-film transistors as claimed in claim 14, it is characterized in that, this fourth direction does not extend through this channel layer.
16. thin-film transistors as claimed in claim 14, it is characterized in that, this third direction extends through this channel layer.
17. thin-film transistors as claimed in claim 13, it is characterized in that, this second direction does not extend through this channel layer.
18. thin-film transistors as claimed in claim 13, it is characterized in that, this first direction extends through this channel layer.
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| Application Number | Priority Date | Filing Date | Title |
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| TW104112099A TWI589973B (en) | 2015-04-15 | 2015-04-15 | Pixel structure and thin film transistor |
| TW104112099 | 2015-04-15 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW586224B (en) * | 2003-03-28 | 2004-05-01 | Au Optronics Corp | Pixel structure and method for forming the same |
| TWI296158B (en) * | 2006-02-20 | 2008-04-21 | Chunghwa Picture Tubes Ltd | Thin film transistor, thin film transistors array substrate and repairing method thereof |
| CN101621039A (en) * | 2008-07-01 | 2010-01-06 | 中华映管股份有限公司 | Pixel structure manufacturing method and pixel structure |
| US20100134741A1 (en) * | 2008-12-02 | 2010-06-03 | Youn-Hak Jeong | Display substrate, method for manufacturing the same, and display panel having the same |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW586224B (en) * | 2003-03-28 | 2004-05-01 | Au Optronics Corp | Pixel structure and method for forming the same |
| TWI296158B (en) * | 2006-02-20 | 2008-04-21 | Chunghwa Picture Tubes Ltd | Thin film transistor, thin film transistors array substrate and repairing method thereof |
| CN101621039A (en) * | 2008-07-01 | 2010-01-06 | 中华映管股份有限公司 | Pixel structure manufacturing method and pixel structure |
| US20100134741A1 (en) * | 2008-12-02 | 2010-06-03 | Youn-Hak Jeong | Display substrate, method for manufacturing the same, and display panel having the same |
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| TWI589973B (en) | 2017-07-01 |
| TW201636716A (en) | 2016-10-16 |
| CN104867947B (en) | 2017-12-22 |
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