CN104852763A - Circuit for detecting average optical power at PINA end - Google Patents
Circuit for detecting average optical power at PINA end Download PDFInfo
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- CN104852763A CN104852763A CN201510162827.7A CN201510162827A CN104852763A CN 104852763 A CN104852763 A CN 104852763A CN 201510162827 A CN201510162827 A CN 201510162827A CN 104852763 A CN104852763 A CN 104852763A
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- 244000099147 Ananas comosus Species 0.000 title claims abstract description 28
- 235000007119 Ananas comosus Nutrition 0.000 title claims abstract description 27
- 230000003287 optical effect Effects 0.000 title abstract description 7
- 239000004065 semiconductor Substances 0.000 claims description 35
- 238000001514 detection method Methods 0.000 abstract description 9
- 238000012544 monitoring process Methods 0.000 description 8
- 238000004891 communication Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
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- 238000012546 transfer Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
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- 210000001503 joint Anatomy 0.000 description 1
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- 230000003071 parasitic effect Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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Abstract
The invention provides a circuit for detecting average optical power at a PINA end. The circuit comprises a trans-impedance front-end amplifying circuit using an input end as a gate electrode and a negative feedback network. The trans-impedance front-end amplifying circuit using the input end as the gate electrode converts current IPD input from a PINK end into a voltage signal VOUT, outputs the voltage signal VOUT, and generates a voltage signal VPINA at the PINK end. The negative feedback network comprises a first operation amplifier I0 and a second operation amplifier I1. The voltage signal VOUT is input into the negative input end of the second operation amplifier I1. The voltage signal VPINA is input into the positive input end of the first operation amplifier I0. A first resistor Rf' is connected between the negative input end of the first operation amplifier I0 and the positive input end of the second operation amplifier I1. The resistance value of the Rf' is equal to that of a trans-resistor Rf. The circuit for detecting average optical power at the PINA end is low in power consumption and high in detection precision.
Description
Technical field
The present invention relates to optical communication field, particularly relate to a kind of circuit detecting average light power.
Background technology
In the optical fiber communication application in modern times, need to monitor in real time the light pulse power of Optical Fiber Transmission, to realize the intelligent diagnostics to communication failure.Achieve a butt joint and receive the monitoring of luminous power, can by monitoring the photoelectric current of photodiode, and then conversion luminous power size of retrodicting.This field, monitoring is carried out to the photoelectric current of photodiode in receiving unit there is following difficult point:
First, monitor optical electric current is little: accurately monitor the circuit that received optical power needs sensitivity very high usually.Be applied as example with 1.25Gbps, such transfer rate needs to monitor the following luminous power of-30dBm, converts as photoelectric current is 1 μ A level, realize the accurate monitoring to μ A level electric current, is one of difficult point of design supervisory circuit.
Secondly, monitor optical current dynamic range is wide: supervisory circuit needs the luminous power of monitoring from-30dBm to about 0dBm, and change reaches 30dB, and corresponding photoelectric current is 1 μ about A-1mA, and change reaches 1000 times.Guarantee that can both realize the accurate monitoring of photoelectric current in so wide scope is one of difficult point designing supervisory circuit, does not often accomplish so wide scope by the mode of common current mirror or resistance sampling.
Moreover, monitoring loss problem: photodiode rear class need to access TIA (trans-impedance amplifier) due to TIA be at a high speed, the circuit of low noise, therefore the photo current monitoring device introduced can not have influence on bandwidth, the low-noise characteristic of TIA, must have enough good isolation, this is also one of difficult point of supervisory circuit design.
In order to realize the monitoring to average light power, conventional art as shown in Figure 1, needs a mirror image TIA, and its current sinking is the same with TIA, and TIA is in order to improve speed, and noise decrease power consumption is usually larger.Accuracy of detection depends on loop gain A
lGorder of magnitude, when
time very little, gm
5gm
6value all can be very little, makes | A
lG| very little, thus accuracy of detection is lower.The input of 50 modules and amplifier is directly connected on the input of 20 modules, can form capacitive load, thus increases the equivalent input noise of 20 module TIA signalling channels, reduces bandwidth simultaneously, thus makes sensitivity deterioration.
Summary of the invention
Technical problem underlying to be solved by this invention is to provide a kind of circuit detecting average light power at PINA end, and low in energy consumption, accuracy of detection is high.
In order to solve above-mentioned technical problem, the invention provides and a kind ofly detect the circuit of average light power at PINA end, comprising: input be grid across resistance frontend amplifying circuit and negative feedback network;
Input is the electric current I inputted by PINK end across resistance frontend amplifying circuit of grid
pDbe converted into voltage signal V
oUTexport, and produce voltage signal V at PINK end
pINA;
Described negative feedback network comprises the first amplifier I0 and the second amplifier I1; Described voltage signal V
oUTinput the negative input of the second amplifier I1; Described voltage signal V
pINAinput the electrode input end of the first amplifier I0; Be connected the first resistance between the negative input of described first amplifier I0 and the electrode input end of the second amplifier I1, its resistance with across hindering R
fidentical.
In a preferred embodiment: described voltage signal V
pINAwith voltage signal V
oUTand be respectively equipped with a RC filter circuit and the 2nd RC filter circuit between the first amplifier I0, the second amplifier I1.
In a preferred embodiment: the output of described first amplifier I0 is connected with the grid of the first metal-oxide-semiconductor M1, the source electrode of described first metal-oxide-semiconductor M1 is connected with the negative input of the first amplifier I0, and drain electrode is connected with current output terminal MON.
In a preferred embodiment: the output of described second amplifier I1 is connected with the grid of the second metal-oxide-semiconductor M0, the source ground of described first metal-oxide-semiconductor M0.
In a preferred embodiment: described first resistance and across resistance R
ftwo ends in parallel with the 3rd metal-oxide-semiconductor Mf, the 4th metal-oxide-semiconductor Mf ' respectively; 3rd metal-oxide-semiconductor Mf has identical breadth length ratio with the 4th metal-oxide-semiconductor Mf '.
In a preferred embodiment: described first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M0, the 3rd metal-oxide-semiconductor Mf, the 4th metal-oxide-semiconductor Mf ' are NMOS tube.
In a preferred embodiment: the power consumption of described first amplifier I0, the second amplifier I1 is much smaller than the power consumption across resistance frontend amplifying circuit.
In a preferred embodiment: the loop gain of described first amplifier I0, the second amplifier I1 is much larger than 1.
Compared to prior art, technical scheme of the present invention possesses following beneficial effect:
1. the invention provides a kind of circuit detecting average light power at PINA end, because the power consumption in circuit is except across except resistance amplifying circuit itself, also from the first amplifier I0 and the second amplifier I1; And the power consumption of amplifier can be done very low, be far smaller than the power consumption of TIA itself.Therefore, compared to conventional art, greatly reduce power consumption.
2. the invention provides a kind of circuit detecting average light power at PINA end, the gain of two loops | A
lG0| with | A
lG1| all very large, therefore when small-signal, accuracy of detection is improved.
3. the invention provides a kind of circuit detecting average light power at PINA end, have employed RC filtering to get V
oUTwith V
pINAdC level, therefore effectively isolated across resistance amplifying circuit and testing circuit, load can not have been formed to signalling channel across resistance amplifying circuit.
4. the invention provides and a kind ofly detect the circuit of average light power at PINA end, across resistance R
ftwo ends paralleling MOS pipe respectively with the first resistance, ensures V
oUTwith V
pINAthere is distortion more by a small margin, ensure accuracy of detection, promote detection range.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of prior art;
Fig. 2 is circuit structure diagram in the embodiment of the present invention 1;
Fig. 3 is circuit structure diagram in the embodiment of the present invention 2.
Embodiment
Hereafter the present invention will be further described in conjunction with the accompanying drawings and embodiments.
With reference to figure 2, a kind ofly detect the circuit of average light power at PINA end, comprising: input be grid across resistance frontend amplifying circuit and negative feedback network;
Input is the electric current I inputted by PINK end across resistance frontend amplifying circuit of grid
pDbe converted into voltage signal V
oUTexport, and produce voltage signal V at PINK end
pINA;
Described negative feedback network comprises the first amplifier I0 and the second amplifier I1; Described voltage signal V
oUTinput the negative input of the second amplifier I1; Described voltage signal V
pINAinput the electrode input end of the first amplifier I0; The first resistance R is connected between the negative input of described first amplifier I0 and the electrode input end of the second amplifier I1
f', its resistance with across hindering R
fidentical.
Described voltage signal V
pINAwith voltage signal V
oUTand be respectively equipped with a RC filter circuit and the 2nd RC filter circuit between the first amplifier I0, the second amplifier I1.
The output of described first amplifier I0 is connected with the grid of the first metal-oxide-semiconductor M1, and the source electrode of described first metal-oxide-semiconductor M1 is connected with the negative input of the first amplifier I0, and drain electrode is connected with current output terminal MON.
The output of described second amplifier I1 is connected with the grid of the second metal-oxide-semiconductor M0, the source ground of described first metal-oxide-semiconductor M0.
In the present embodiment: described first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M0 are NMOS tube.The power consumption of described first amplifier I0, the second amplifier I1 is much smaller than the power consumption across resistance frontend amplifying circuit.The loop gain of described first amplifier I0, the second amplifier I1 is much larger than 1
The operation principle of foregoing circuit is as follows: the electric current of input is the photogenerated current I of photoelectric detector PD
pD, it is a random binary digit signal, if
for its mean value.Follow-up input be grid across resistance amplifying circuit I
pDtransfer into random voltages signal V to
oUT, and hold generation voltage signal V at PINA
pINA.If
for V
oUTmean value,
for V
pINAmean value.
I
bfor giving the certain initial current of the second metal-oxide-semiconductor M0, ensure its gm
0enough large.R
ds0it is the parasitic source-drain resistances of M0.
Due to across resistance amplifying circuit adopt input be grid across resistance amplifying circuit, therefore, I
pDto flow through completely across resistance R
f.Therefore can obtain:
V
PINA-V
OUT＝I
PD*R
f
V
pINAwith V
oUTcan be obtained by RC filter network
with
Work as V
pINAwith V
oUTamplitude distortion less time,
with
all be in V
pINAwith V
oUTcentre position, now can obtain:
If the gain of the first amplifier I0 and the second amplifier I1 is respectively A
i0, A
i1, I0 and I1 place negative feedback network loop gain is respectively A
lG0with A
lG1can obtain:
A
LG1＝-A
I1*gm
0*R
f
Due to I
bfor giving M
0certain initial current, even if
very little, its gm
0also enough large, therefore | A
lG1| can do larger.Therefore, even if
when very little, also can obtain:
gm
1*(R
f+R
ds0*|A
LG1|)>>1
Therefore:
A
LG0≈-A
I0
| A
lG0| value depends on the gain of amplifier I0, and the gain of I0 adopts suitable construction can do larger.Therefore can obtain:
Therefore obtain:
Thus achieve the object detecting average light power at PINA end.
Embodiment 2
The difference of the present embodiment and embodiment 1 is: described first resistance and across hindering R
ftwo ends in parallel with the 3rd metal-oxide-semiconductor Mf, the 4th metal-oxide-semiconductor Mf ' respectively, and the 3rd metal-oxide-semiconductor Mf has identical breadth length ratio with the 4th metal-oxide-semiconductor Mf '.Ensure V
oUTwith V
pINAthere is distortion more by a small margin, ensure accuracy of detection, promote detection range.
The above; be only the present invention's preferably embodiment, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.
Claims (8)
1. detect the circuit of average light power at PINA end, it is characterized in that comprising: input be grid across resistance frontend amplifying circuit and negative feedback network;
Input is the electric current I inputted by PINK end across resistance frontend amplifying circuit of grid
pDbe converted into voltage signal V
oUTexport, and produce voltage signal V at PINK end
pINA;
Described negative feedback network comprises the first amplifier I0 and the second amplifier I1; Described voltage signal V
oUTinput the negative input of the second amplifier I1; Described voltage signal V
pINAinput the electrode input end of the first amplifier I0; The first resistance R is connected between the negative input of described first amplifier I0 and the electrode input end of the second amplifier I1
f', its resistance with across hindering R
fidentical.
2. a kind of circuit detecting average light power at PINA end according to claim 1, is characterized in that: described voltage signal V
pINAwith voltage signal V
oUTand be respectively equipped with a RC filter circuit and the 2nd RC filter circuit between the first amplifier I0, the second amplifier I1.
3. a kind of circuit detecting average light power at PINA end according to claim 2, it is characterized in that: the output of described first amplifier I0 is connected with the grid of the first metal-oxide-semiconductor M1, the source electrode of described first metal-oxide-semiconductor M1 is connected with the negative input of the first amplifier I0, and drain electrode is connected with current output terminal MON.
4. a kind of circuit detecting average light power at PINA end according to claim 3, is characterized in that: the output of described second amplifier I1 is connected with the grid of the second metal-oxide-semiconductor M0, the source ground of described first metal-oxide-semiconductor M0.
5. a kind of circuit detecting average light power at PINA end according to claim 4, is characterized in that: described first resistance R
f' and across resistance R
ftwo ends in parallel with the 3rd metal-oxide-semiconductor Mf, the 4th metal-oxide-semiconductor Mf ' respectively; 3rd metal-oxide-semiconductor Mf has identical breadth length ratio with the 4th metal-oxide-semiconductor Mf '.
6. a kind of circuit detecting average light power at PINA end according to claim 5, is characterized in that: described first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M0, the 3rd metal-oxide-semiconductor Mf, the 4th metal-oxide-semiconductor Mf ' are NMOS tube.
7. a kind of circuit detecting average light power at PINA end according to claim 1, is characterized in that: the power consumption of described first amplifier I0, the second amplifier I1 is much smaller than the power consumption across resistance frontend amplifying circuit.
8. a kind of circuit detecting average light power at PINA end according to claim 1, is characterized in that: the loop gain of described first amplifier I0, the second amplifier I1 is much larger than 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510162827.7A CN104852763B (en) | 2015-04-08 | 2015-04-08 | A kind of circuit that average light power is detected at PINA ends |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510162827.7A CN104852763B (en) | 2015-04-08 | 2015-04-08 | A kind of circuit that average light power is detected at PINA ends |
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| Publication Number | Publication Date |
|---|---|
| CN104852763A true CN104852763A (en) | 2015-08-19 |
| CN104852763B CN104852763B (en) | 2017-07-11 |
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|---|---|---|---|
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002176324A (en) * | 2000-12-05 | 2002-06-21 | Toshiba Corp | Light receiving circuit |
| CN101621252A (en) * | 2009-08-07 | 2010-01-06 | 天津泛海科技有限公司 | Direct-current (DC) restoration and DC monitoring circuit |
| JP2012175228A (en) * | 2011-02-18 | 2012-09-10 | Nec Corp | Light-receiving power monitor circuit, optical receiver, method and program |
| CN202750095U (en) * | 2012-09-10 | 2013-02-20 | 电子科技大学 | Optical receiver |
| US20130287392A1 (en) * | 2012-04-25 | 2013-10-31 | Mark HEIMBUCH | Circuits and Methods for Monitoring Power Parameters in an Optical Transceiver |
| CN203423692U (en) * | 2013-07-26 | 2014-02-05 | 厦门优迅高速芯片有限公司 | Compatible average optical power monitoring circuit |
| CN204559577U (en) * | 2015-04-08 | 2015-08-12 | 厦门优迅高速芯片有限公司 | The circuit of average light power is detected at PINA end |
-
2015
- 2015-04-08 CN CN201510162827.7A patent/CN104852763B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002176324A (en) * | 2000-12-05 | 2002-06-21 | Toshiba Corp | Light receiving circuit |
| CN101621252A (en) * | 2009-08-07 | 2010-01-06 | 天津泛海科技有限公司 | Direct-current (DC) restoration and DC monitoring circuit |
| JP2012175228A (en) * | 2011-02-18 | 2012-09-10 | Nec Corp | Light-receiving power monitor circuit, optical receiver, method and program |
| US20130287392A1 (en) * | 2012-04-25 | 2013-10-31 | Mark HEIMBUCH | Circuits and Methods for Monitoring Power Parameters in an Optical Transceiver |
| CN202750095U (en) * | 2012-09-10 | 2013-02-20 | 电子科技大学 | Optical receiver |
| CN203423692U (en) * | 2013-07-26 | 2014-02-05 | 厦门优迅高速芯片有限公司 | Compatible average optical power monitoring circuit |
| CN204559577U (en) * | 2015-04-08 | 2015-08-12 | 厦门优迅高速芯片有限公司 | The circuit of average light power is detected at PINA end |
Non-Patent Citations (3)
| Title |
|---|
| SHIH-HAO HUANG,ETAL.: "A 10-Gb/s OEIC with Meshed Spatially-Modulated Photo Detector in 0.18-Photo Detector in 0.18-um CMOS Technology", 《IEEE JOURNAL OF SOLID-STATE CIRCUITS》 * |
| 林少衡: "0.18μm CMOS 2.5Gbps带AGC功能的前置放大器", 《中国集成电路》 * |
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|---|---|
| CN104852763B (en) | 2017-07-11 |
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Address after: 361000 402, No. 52, guanri Road, phase II, software park, Xiamen, Fujian Patentee after: Xiamen Youxun Chip Co.,Ltd. Country or region after: China Address before: 361000 402, No. 52, guanri Road, phase II, software park, Xiamen, Fujian Patentee before: XIAMEN UX HIGH-SPEED IC Co.,Ltd. Country or region before: China |