CN104850111A - Hardware-in-loop test method and system - Google Patents

Hardware-in-loop test method and system Download PDF

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Publication number
CN104850111A
CN104850111A CN201410548469.9A CN201410548469A CN104850111A CN 104850111 A CN104850111 A CN 104850111A CN 201410548469 A CN201410548469 A CN 201410548469A CN 104850111 A CN104850111 A CN 104850111A
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signal
test
switch
abnormal
test signal
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CN104850111B (en
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荀野
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Beijing Treasure Car Co Ltd
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Beiqi Foton Motor Co Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B23/00Testing or monitoring of control systems or parts thereof
    • G05B23/02Electric testing or monitoring
    • G05B23/0205Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
    • G05B23/0259Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the response to fault detection
    • G05B23/0275Fault isolation and identification, e.g. classify fault; estimate cause or root of failure
    • G05B23/0278Qualitative, e.g. if-then rules; Fuzzy logic; Lookup tables; Symptomatic search; FMEA
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00Network arrangements or protocols for supporting network services or applications

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  • Physics & Mathematics (AREA)
  • Fuzzy Systems (AREA)
  • Mathematical Physics (AREA)
  • Quality & Reliability (AREA)
  • General Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The invention provides a hardware-in-loop test method and system. The method comprises the steps of: firstly, obtaining a plurality of test signals and setting a switch for at least one test signal; and then detecting all the test signals and judging whether the test signal with the set switch is abnormal, switching off the test signal in case of abnormity, cutting off the abnormal signal, reassigning the test signal, and continuing the test. In the scheme, a switch is set for each test signal, if some test signal is abnormal in the test process, the test signal is switched off, the abnormal test signal is cut off and reassigned with a suitable value, and the test goes on. In this way, the problem in the prior art that the downloading test is needed to be performed again after the abnormal signal is handled is solved; and by means of manual assignment, the influence of the abnormal signal to the test is prevented temporarily, other signals are tested, and the abnormal signal can be tested subsequently, so that the integral efficiency of the test is improved.

Description

A kind of hardware-in―the-loop test method and system
Technical field
The present invention relates to new energy vehicle controller field tests, specifically a kind of method and system of hardware-in―the-loop test.
Background technology
Along with the development of automotive engineering and universal, car owning amount gets more and more, and its environmental problem caused also becomes increasingly conspicuous.New-energy automobile is widely regarded as one of main path solving the problem such as automobile exhaust pollution and petroleum-based energy shortage.The power system of entire new energy automobile mainly contains electrokinetic cell, power battery management system (BMS, Battery Management System), drive motor, electric machine controller (MCU, Motor Control Unit), entire car controller (VCU, Vehicle Control Unit), engine, engine controller (ECU, Electronic Control Unit) composition.Along with the fast development of new-energy automobile, also more and more important to the properties of product of its power system kernel component, reliability requirement.
In order to ensure the performance of these core components, it is necessary for carrying out many-sided test to its characteristic.At present, in new energy vehicle controller hardware-in-the-loop test, mainly utilize real control unit for vehicle VCU, the environmental model of simulation is downloaded to the emulation testing carrying out control unit for vehicle VCU in testing apparatus.
At present, above-mentioned emulation testing is carried out based on DSPACE real-time emulation system, DSPACE real-time emulation system is the software and hardware workbench of a set of control system's development based on MATLAB/Simulink and the hardware-in-the-loop simulation developed by German DSPACE company, achieves the complete seamless link with MATLAB/Simulink/RTW.The advantages such as DSPACE real-time system has real-time, and reliability is high, and extendibility is good.Processor in DSPACE hardware system has computing power at a high speed, and is equipped with abundant I/O support, and user can combine as required; Software environment powerful and easy to use, comprise code automatically to generate/download and test/the kit debugged.DSPACE software and hardware has become the first-selected real-time platform carrying out rapid control prototyping checking and hardware-in-the-loop simulation at present.
As disclosed a kind of stroke-increasing electric automobile controller test system in Chinese patent literature CN102955475A, comprise interconnective stroke-increasing electric automobile controller and DSPACE hardware-in-loop simulation equipment, DSPACE hardware-in-loop simulation equipment generates whole real vehicle simulate signal according to realistic model, and is connected to stroke-increasing electric automobile controller by line.In test process, first MATLAB is utilized to set up whole models of stroke-increasing electric automobile except controller, then this model is compiled in DSPACE, the operation interface be associated for model is designed again in DSPACE, carry out according to the operation identical with real vehicle on operation interface afterwards, the full detail of simulating on DSPACE on car load can be realized, carry out the full test of controller.
In test process, because VCU part of functions is made mistakes, environmental model is caused to respond improper, this just needs VCU model by the time to test after remodifying again, in addition engine, battery, motor and BMS, MCU, EMS etc. are related to because environmental model is huger, in test process due to a certain signal of environmental model send improper, this just needs environmental model by the time to revise, then recompilate, be downloaded into testing apparatus again and could continue test, the time of meeting at substantial and manpower, delayed test progress.
Summary of the invention
For this reason, technical matters to be solved by this invention be based on DSPACE in prior art in ring test, to need when going wrong etc. to be repaired after recompilate again, expend larger time and manpower, even if thus propose to go wrong in a kind of test process also can human intervention continue test efficient method of testing.
For solving the problems of the technologies described above, the method and system that a kind of hardware-in―the-loop test is provided of the present invention.
A kind of hardware-in―the-loop test method, comprises
Obtain some test signals, and switch is set at least one test signal;
Detect all test signals,
Judge whether the described test signal arranging switch occurs exception, close this test signal when occurring abnormal, block this abnormal signal, and to this test signal again assignment, proceed test.
Preferably, obtain some test signals, and the process of switch be set at least one test signal, comprising:
Obtain CAN protocol normative document;
Extract the information in CAN protocol normative document, obtain all CAN signal;
Set up the annexation between signal;
For one or more signal setting switch.
Preferably, obtain some test signals, and the process of switch be set at least one test signal, comprising:
Obtain IO file, the signal in extraction document;
Set up the annexation between described signal;
For one or more signal setting switch.
Preferably, close in the process of this test signal when described appearance is abnormal, also comprise the step of feedback abnormal signal.
Preferably, judge whether the described test signal arranging switch occurs exception, when occurring abnormal, close this test signal, block this abnormal signal, and to this test signal again assignment, after proceeding test, after also comprising abnormal signal eliminating, this test signal is opened, proceed test.
In addition, the present invention also provides a kind of hardware-in―the-loop test system, comprises
Switch element: obtain some test signals, and switch is set at least one test signal;
Detecting unit: detect all test signals,
Judging unit: judge whether the described test signal arranging switch occurs exception, close this test signal when occurring abnormal, block this abnormal signal, and to this test signal again assignment, proceed test.
Preferably, described switch element comprises:
CAN file acquisition subelement: obtain CAN protocol normative document;
Signal extraction subelement: extract the information in CAN protocol normative document, obtain all CAN signal;
CAN signal connexon unit: set up the annexation between signal;
CAN signal switch subelement: be one or more signal setting switch.
Preferably, described switch element comprises:
IO file acquisition subelement: obtain IO file, the signal in extraction document;
I/O signal connexon unit: set up the annexation between described signal;
I/O signal switch subelement: be one or more signal setting switch element.
Preferably, described judging unit also comprises feedback subelement, feedback abnormal signal.
Preferably, also comprise recovery subelement in described judging unit, this test signal is opened after getting rid of by abnormal signal, proceeds test.
Technique scheme of the present invention has the following advantages compared to existing technology,
1, hardware-in―the-loop test method of the present invention is at least one test signal deploy switch, in test process, if when certain arranges the test signal exception of switch, then close this test signal, block abnormal signal and again give suitable value, testing.Like this, just avoid in prior art, after needing to solve this abnormal signal, re-start the problem downloading test, the manually mode of assignment, this abnormal signal of temporary close, on the impact of test, is tested other signal, this abnormal signal can follow-up test, improves the whole efficiency of test.
2, hardware-in―the-loop test method of the present invention, test signal comprises from the signal in the CAN protocol normative document in CAN, and the signal in IO file, one or more in these test signals are configured respectively, reduce the abnormal impact on test of individual signals, improve testing efficiency.
3, hardware-in―the-loop test method of the present invention, can also feed back the signal of exception, feed back to developer or maintainer, allows them search the reason of abnormal signal further, queueing problem.
4, hardware-in―the-loop test method of the present invention, this test signal can also be opened, switch back original state after being got rid of by abnormal signal, uses this signal to proceed test, and completes test, ensure that the integrality of test.
5, hardware-in―the-loop test system of the present invention, comprise switch element, detecting unit and judging unit, the interruption of environmental model and control unit for vehicle VCU communication signal when hardware-in―the-loop test can be realized, and carry out manual assignment at experimental situation interface directly to the signal interrupted, other partial functions of checking control unit for vehicle VCU can be continued, improve hardware-in-the-loop test efficiency.
Accompanying drawing explanation
In order to make content of the present invention be more likely to be clearly understood, below according to a particular embodiment of the invention and by reference to the accompanying drawings, the present invention is further detailed explanation, wherein
Fig. 1 is the process flow diagram of the embodiment 1 of hardware-in―the-loop test method of the present invention;
Fig. 2 is the process flow diagram that in the embodiment 3 of hardware-in―the-loop test method of the present invention, interface module is set up;
Fig. 3 is the schematic diagram of test macro in the embodiment 3 of hardware-in―the-loop test method of the present invention;
Fig. 4 is process flow diagram in the embodiment 3 of hardware-in―the-loop test method of the present invention;
Fig. 5 is the structured flowchart of hardware-in―the-loop test system of the present invention.
Embodiment
embodiment 1:
There is provided a kind of hardware-in―the-loop test method in the present embodiment, process flow diagram as shown in Figure 1, comprises the steps:
First, obtain some test signals, and switch is set for each test signal.Test signal is herein come in self-testing system.As test signal carrys out self-virtual engine controller ECU in a test system, this test signal is input in the run time infrastructure RTI of test macro and tests.In this step, for the some or all signals from engine controller ECU, switch is provided with, the effect of this switch to turn off this signal, and this signal closes has no progeny, and cannot be input in run time infrastructure RTI, but, but manually can give this signal assignment again.
As the embodiment that other can be replaced, the test signal arranging switch herein can be CAN signal, I/O signal and other need in test process arbitrarily test signal.Except in the present embodiment being each signal setting switch, can also be one or more signal setting switches of these needs tests, if conveniently controlled all signals, switch can be set for all measured signals, in order to reduce the quantity arranging switch, also only switch can be set for the part signal of signal of interest or easily appearance mistake.
Then, in test process, detect all test signals.Due in test process, each test signal constantly sends over from ECU, and is input in RTI and tests.
In testing process, judge whether each test signal occurs exception, then close this test signal when occurring abnormal, block this abnormal signal, and manual assignment is re-started to this test signal, then proceed test.During due to test signal exception, follow-up test cannot be carried out, in order to not affect follow-up test effect, retest after avoiding revising this abnormal signal, then close this test signal, be manually revised as suitable signal, thus continue to complete test, improve the efficiency of test.
Hardware-in―the-loop test method described in the present embodiment is each test signal deploy switch, in test process, if when certain test signal is abnormal, then close this test signal, blocks abnormal signal and again gives suitable value, testing.Like this, just avoid in prior art, after needing to solve this abnormal signal, re-start the problem downloading test, the manually mode of assignment, this abnormal signal of temporary close, on the impact of test, is tested other signal, this abnormal signal can follow-up test, improves the whole efficiency of test.
embodiment 2:
On the basis of above-described embodiment 1, provide in the present embodiment and obtain some test signals, and be the concrete mode that each test signal arranges switch.The test signal herein selected is selected as required, ites is desirable to which signal to carry out manual assignment for, then for which signal be configured.The mode being configured for CAN signal and being configured for I/O signal is provided in the present embodiment.In other implementations, can be configured for the one in CAN signal or I/O signal separately, also can be configured all simultaneously.Configure which signal, then follow-uply can carry out manually turning off for which signal and assignment operates.
The process be configured for CAN signal is as follows:
First, obtain CAN protocol normative document, i.e. DBC file is exactly the database file that suffix is DBC.Information in DBC file comprise CAN network middle controller quantity, have which controller, have which message, have which signal in controller, message belonging to each message.
Then, extract the information in DBC file, obtain the information of all CAN signal.Extract dbc fileinfo program by M language compilation, ask the length of dbc, screening useful information, finally generates the function of structure form, and comprising in this structure allly allly needs information above.Like this, the CAN signal in DBC file is just obtained.
Afterwards, the annexation between CAN signal is set up.Submodule is added by the api function (as add_block) calling Simulink module, reply new interpolation module title and position are arranged mutually, module title is according to the information extracted in dbc file, all CAN signal are named, complete the line between module simultaneously, being now that all signals increase switch, giving over to hand switch when testing; Signalization name on signal wire.Like this, be just provided with switch for each CAN signal, for follow-up hand switch controls to provide basis.
For I/O signal, the process be configured is as follows:
First, IO file is obtained, the information of the signal in extraction document.This process comprises the information in the hardware profile first extracted in IO file, comprises the list of the simulating signal of input and output in IO, digital signal, pwm signal, comprises title, corresponding passage, reference voltage, reference channel information.Extract IO fileinfo program by M language compilation, ask the length of IO, screening useful information, finally generates the function of structure form, and comprising in this structure allly allly needs information above.
Then, the annexation between described signal is set up; Simulink basic module is added with M language, reply new interpolation module title and position are arranged mutually, CMOS macro cell is divided into three layers according to the information extracted in IO file, primary module is I/O module, and submodule is simulating signal, digital signal, pwm signal module, comprises all signals of hardware profile in submodule, all I/O signal are named, complete the line between module, each signal needs to arrange switch module simultaneously, gives over to hand switch when testing; Signalization name on signal wire.Like this, just switch is provided with for each I/O signal.
In the present embodiment, test signal comprises from the signal in the CAN protocol normative document in CAN, and the signal in IO file, is configured respectively these test signals, reduces the abnormal impact on test of individual signals, improves testing efficiency.
In the present embodiment, judging whether each test signal occurs exception, closing this test signal when occurring abnormal, block this abnormal signal, and to this test signal again assignment, proceeding, in the process of testing, also to comprise the step of feedback abnormal signal.When judging abnormal signal, then this abnormal signal being fed back to developer or maintainer, instructing them to go completion system reparation, finding out the reason of abnormal signal, fix a breakdown.After this, this test signal can also be opened after getting rid of by abnormal signal, makes the signal of this signal still self-testing system, proceeds test, thus completes test.
embodiment 3:
A kind of application example of concrete hardware-in―the-loop test method is provided in the present embodiment, measuring system constructing is carried out by building environmental model, need to arrange interface module in building, this module by using M language compilation script function in matlab, call automatically-generating module by function, be then applied in environmental model.
In interface module, automatically can generate the switch of CAN signal and the switch of I/O signal, flow process as shown in Figure 2, write and comprise the following steps by automatically generating program:
1) dbc document analysis is realized.Import dbc file, extract the information in DBC file, comprise the quantity of CAN network middle controller, have which controller, have in controller, message belonging to which message, each message have which signal.Extract dbc fileinfo program by M language compilation, ask the length of dbc, screening useful information, finally generates the function of structure form, and comprising in this structure allly allly needs information above.
2) IO document analysis is realized.Import IO file, extract the information in hardware profile, comprise the list of the simulating signal of input and output in IO, digital signal, pwm signal, comprise title, corresponding passage, reference voltage, reference channel information.Extract IO fileinfo program by M language compilation, ask the length of IO, screening useful information, finally generates the function of structure form, and comprising in this structure allly allly needs information above.
3) CAN module generates.Writing of CAN module generator program, submodule can be added by the api function (as add_block) calling Simulink module, reply new interpolation module title and position are arranged mutually, module title is according to the information extracted in dbc file, all CAN signal are named, complete the line between module, all signals increase switch module simultaneously, give over to hand switch when testing; Signalization name on signal wire.The automatic generation of CAN module is divided into three layers, and primary module is CAN module, comprises each controller message module, as BMS, MCU, TCU, EMS etc., comprises all signals that each controller sends in submodule.
4) I/O module generates.Method and CAN generation module similar, simulink basic module is added with M language, reply new interpolation module title and position are arranged mutually, CMOS macro cell is divided into three layers according to the information extracted in IO file, primary module is I/O module, submodule is simulating signal, digital signal, pwm signal module, all signals of hardware profile are comprised in submodule, all I/O signal are named, complete the line between module simultaneously, each signal needs to arrange switch module, gives over to hand switch when testing; Signalization name on signal wire.
5) interface editing.Design a model with GUI in matlab and automatically generate interface, be convenient to use easy to operate in the future.During Module Generation, only need open the interface designed, import dbc file, import IO file, complete Module Generation.
Illustrate with reference to accompanying drawing 3, in DSPACE emulation testing, after interface module generates automatically, concrete test process is as follows:
1) when environmental model is built, import dbc and the IO configuration file of this project, generate interface module.
2) interface module input end and virtual controller output end connect, and as controllers such as BMS, EMS, MCU, TCU, output terminal and the RTI interface of interface module connect, and carry out necessary setting, as shown in Figure 3.
3) compiling downloads in DSPACE equipment, when a certain signal of environmental model in test process sent not at that time, at experimental situation interface, find the position of this signal in interface module, switching over corresponding for this signal to manual test, namely block the improper value that environmental model sends, manual assignment can have been carried out from experimental situation interface to this signal, continue other functional tests of control unit for vehicle VCU.Meanwhile, the problem of location is issued tactful slip-stick artist and modeling engineering teacher modifies.
4) when model modification completes and tests, switching over corresponding for this signal is returned model sending value, i.e. the signal value of reception environment model transmission, continue this functional test, whole process as shown in Figure 4.
The present embodiment is based on DSPACE hardware in loop platform, a kind of automatic generation method and method of testing of environmental model interface module are provided, the interruption of environmental model and control unit for vehicle VCU communication signal when hardware-in―the-loop test can be realized, and carry out manual assignment at experimental situation interface directly to the signal interrupted, other partial functions of checking control unit for vehicle VCU can be continued, improve hardware-in-the-loop test efficiency.
In the present embodiment, interface module can generate automatically according to the dbc file of CAN and I/O signal file, as long as dissimilar entire car controller exploitation provides dbc file and the I/O signal file of CAN, avoids loaded down with trivial details repetitive operation.
embodiment 4:
There is provided a kind of hardware-in―the-loop test system in the present embodiment, structured flowchart as shown in Figure 5, comprises
Switch element: obtain some test signals, and switch is set at least one test signal.
Detecting unit: detect all test signals,
Judging unit: judge whether the described test signal arranging switch occurs exception, close this test signal when occurring abnormal, block this abnormal signal, and to this test signal again assignment, proceed test.
As the embodiment that other can be replaced, the test signal arranging switch herein can be CAN signal, I/O signal and other need in test process arbitrarily test signal.Except in the present embodiment being each signal setting switch, can also be one or more signal setting switches of these needs tests, if conveniently controlled all signals, switch can be set for all measured signals, in order to reduce the quantity arranging switch, also only switch can be set for the part signal of signal of interest or easily appearance mistake.
In the present embodiment, described switch element comprises:
CAN file acquisition subelement: obtain CAN protocol normative document and DBC file;
Signal extraction subelement: extract the information in DBC file, obtain the information of all CAN signal;
CAN signal connexon unit: set up the annexation between signal;
CAN signal switch subelement: be one or more signal setting switch.
In further embodiment, described switch element comprises:
IO file acquisition subelement: obtain IO file, the information of the signal in extraction document;
I/O signal connexon unit: set up the annexation between described signal;
I/O signal switch subelement: be one or more signal setting switch element.
Further, described judging unit also comprises feedback subelement, feedback abnormal signal.
Further, also comprise recovery subelement in described judging unit, this test signal is opened after getting rid of by abnormal signal, proceeds test.
Hardware-in―the-loop test system described in the present embodiment, comprise switch element, detecting unit and judging unit, the interruption of the communication signal when hardware-in―the-loop test can be realized, and carry out manual assignment directly to the signal interrupted, other partial functions in verifying test system can be continued, improve hardware-in-the-loop test efficiency.
Obviously, above-described embodiment is only for clearly example being described, and the restriction not to embodiment.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without the need to also giving all embodiments.And thus the apparent change of extending out or variation be still among the protection domain of the invention.
Those skilled in the art should understand, embodiments of the invention can be provided as method, system or computer program.Therefore, the present invention can adopt the form of complete hardware embodiment, completely software implementation or the embodiment in conjunction with software and hardware aspect.And the present invention can adopt in one or more form wherein including the upper computer program implemented of computer-usable storage medium (including but not limited to magnetic disk memory, CD-ROM, optical memory etc.) of computer usable program code.
The present invention describes with reference to according to the process flow diagram of the method for the embodiment of the present invention, equipment (system) and computer program and/or block scheme.Should understand can by the combination of the flow process in each flow process in computer program instructions realization flow figure and/or block scheme and/or square frame and process flow diagram and/or block scheme and/or square frame.These computer program instructions can being provided to the processor of multi-purpose computer, special purpose computer, Embedded Processor or other programmable data processing device to produce a machine, making the instruction performed by the processor of computing machine or other programmable data processing device produce device for realizing the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
These computer program instructions also can be stored in can in the computer-readable memory that works in a specific way of vectoring computer or other programmable data processing device, the instruction making to be stored in this computer-readable memory produces the manufacture comprising command device, and this command device realizes the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
These computer program instructions also can be loaded in computing machine or other programmable data processing device, make on computing machine or other programmable devices, to perform sequence of operations step to produce computer implemented process, thus the instruction performed on computing machine or other programmable devices is provided for the step realizing the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
Although describe the preferred embodiments of the present invention, those skilled in the art once obtain the basic creative concept of cicada, then can make other change and amendment to these embodiments.So claims are intended to be interpreted as comprising preferred embodiment and falling into all changes and the amendment of the scope of the invention.

Claims (10)

1. a hardware-in―the-loop test method, is characterized in that, comprises
Obtain some test signals, and switch is set at least one test signal;
Detect all test signals;
Judge whether the described test signal arranging switch occurs exception, close this test signal when occurring abnormal, block this abnormal signal, and to this test signal again assignment, proceed test.
2. method according to claim 1, is characterized in that, obtains some test signals, and arranges the process of switch at least one test signal, comprising:
Obtain CAN protocol normative document;
Extract the information in CAN protocol normative document, obtain all CAN signal;
Set up the annexation between signal;
For one or more signal setting switch.
3. method according to claim 1, is characterized in that, obtains some test signals, and arranges the process of switch at least one test signal, comprising:
Obtain IO file, the signal in extraction document;
Set up the annexation between described signal;
For one or more signal setting switch.
4. the method according to claim 1 or 2 or 3, is characterized in that, closes in the process of this test signal when described appearance is abnormal, also comprises the step of feedback abnormal signal.
5. method according to claim 4, it is characterized in that, judge whether the described test signal arranging switch occurs exception, close this test signal when occurring abnormal, block this abnormal signal, and to this test signal again assignment, after proceeding test, after also comprising abnormal signal eliminating, this test signal is opened, proceed test.
6. a hardware-in―the-loop test system, is characterized in that, comprises
Switch element: obtain some test signals, and switch is set at least one test signal;
Detecting unit: detect all test signals,
Judging unit: judge whether the described test signal arranging switch occurs exception, close this test signal when occurring abnormal, block this abnormal signal, and to this test signal again assignment, proceed test.
7. system according to claim 6, is characterized in that, described switch element comprises:
CAN file acquisition subelement: obtain CAN protocol normative document;
Signal extraction subelement: extract the information obtained in CAN protocol normative document, obtain all CAN signal;
CAN signal connexon unit: set up the annexation between signal;
CAN signal switch subelement: be one or more signal setting switch.
8. system according to claim 6, is characterized in that, described switch element comprises:
IO file acquisition subelement: obtain IO file, the signal in extraction document;
I/O signal connexon unit: set up the annexation between described signal;
I/O signal switch subelement: be one or more signal setting switch element.
9. the system according to claim 6 or 7 or 8, it is characterized in that, described judging unit also comprises feedback subelement, feedback abnormal signal.
10. system according to claim 9, is characterized in that, also comprises recovery subelement in described judging unit, and this test signal is opened after getting rid of by abnormal signal, proceeds test.
CN201410548469.9A 2014-10-16 2014-10-16 A kind of hardware-in―the-loop test method and system Expired - Fee Related CN104850111B (en)

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CN106302010A (en) * 2016-08-11 2017-01-04 北京经纬恒润科技有限公司 A kind of CANopen network service emulation test method and relevant device
CN106707065A (en) * 2016-12-31 2017-05-24 安徽优旦科技有限公司 Battery management system standard DBC interface automatic testing system and method
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