CN104836575A - Phase adjustable frequency oscillator used for phase detecting circuit - Google Patents
Phase adjustable frequency oscillator used for phase detecting circuit Download PDFInfo
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- CN104836575A CN104836575A CN201410045053.5A CN201410045053A CN104836575A CN 104836575 A CN104836575 A CN 104836575A CN 201410045053 A CN201410045053 A CN 201410045053A CN 104836575 A CN104836575 A CN 104836575A
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Abstract
The invention provides a phase adjustable frequency oscillator used for a phase detecting circuit, characterized by comprising N cascaded unit delay units with a same circuit structure, and a multibit signal selector; N unit delay units form a circular oscillator, the differences of timing sequence phases outputted by the N unit delay units are consistent, and output terminals of the N unit delay units all have taps connected to the multibit signal selector which is formed by series connecting a digital analog converter and N cascaded enhanced NMOS pipes with a same circuit structure; through selection of the multibit signal selector, the timing sequence frequencies of outputted signals of the phase adjustable frequency oscillator are the same, and phase precision is linearly tunable, wherein N is no less than 2. According to the invention, through adjustment in a digital mode, the oscillation frequency of the phase adjustable frequency oscillator is synchronous with a main clock or signal frequency, thereby providing convenience for performing phase adjustment on outputted signals, and effectively reducing circuit design difficulty and meanwhile guaranteeing phase detection precision.
Description
Technical field
The present invention relates to semiconductor fabrication process, in particular to a kind of adjustable phase frequency oscillator for phase detecting circuit.
Background technology
In the ASIC circuit design comprising MEMS gyro instrument, need the phase place of special phase detecting circuit to sensor signal to monitor, and revise the phase frequency of induced signal and adjustment drive circuit thus.Common phase detecting circuit provides correlation timing to process to phase-detection integrator according to the zero crossing position of detection signal, in the prior art, this sequential for control phase detector is generally produced by system master clock, thus there is an intrinsic phase error as shown in Figure 1 with the zero crossing position of detection signal, this phase error, after the accumulation of phase-detection integrator is amplified, obviously can worsen the precision of phase detecting circuit.
The compensation of prior art to above-mentioned phase error mainly contains two kinds of modes: first kind of way, do not revise the phase error between detection signal and Control timing sequence, according to the size estimating phase error, gain-boosted op amp compensation is carried out by the final output of special digital algorithm to phase detecting circuit, this compensation way is because cannot judge the inconsistent error brought of phase place accurately, be difficult to compensate accurately final output, simultaneously, realize this compensation way need complicated digital correction algorithm circuit and increase special automatic gain control circuit at phase detecting circuit output, the performance of numeral correction algorithm circuit and automatic gain control circuit also have impact on the compensation precision of phase error to a great extent, the second way, extra DLL or the DDS circuit increased is used to provide the special sequential of out of phase to solve phase error problems for phase detecting circuit, this compensation way needs to increase extra circuit, adds the complexity of phase detecting circuit, power consumption area and design difficulty.
Therefore, need to propose a kind of new circuit structure, to solve the problem.
Summary of the invention
For the deficiencies in the prior art, the invention provides a kind of adjustable phase frequency oscillator for phase detecting circuit, it is characterized in that, comprise N number of unit delay elements and multibit signal selector with same circuits structure of cascade, described N number of unit delay elements forms a ring oscillator, the difference of the timing rhohase that described N number of unit delay elements exports is consistent, the output of described N number of unit delay elements all has tap to be connected to described multibit signal selector, described multibit signal selector is in series by N number of enhancement mode NMOS tube with same circuits structure of a digital to analog converter and another cascade, by the selection of described multibit signal selector, the frequency of the sequential of the output signal of described adjustable phase frequency oscillator is consistent and phase accuracy is linearly adjustable, wherein, N is more than or equal to 2.
Further, by the number selecting the numerical value of described N to determine described unit delay elements, to obtain the phase output with different accuracy.
Further, when described phase detecting circuit is applied to gyroscope, described N is more than or equal to 31.
Further, described N number of unit delay elements is formed by the CMOS inverter of band bias voltage and bias current.
Further, described CMOS inverter is made up of an enhancement mode NMOS tube and an enhancement mode PMOS, the grid of described NMOS tube and described PMOS connects together as input, the drain electrode of described NMOS tube and described PMOS connects together as output, the source electrode of described PMOS is connected to the output of described digital to analog converter, and the source electrode of described NMOS tube is connected to the drain electrode of another NMOS tube described.
Further, the input of described digital to analog converter is connected to the providing source of digital controlled signal, and the output of described digital to analog converter is connected to the grid of another NMOS tube described, the source ground of another NMOS tube described.
Further, described digital to analog converter by input described digital controlled signal be converted to put on described ring oscillator bias voltage or bias current to change time of delay, thus regulate the output frequency of described ring oscillator, and the dynamic range of described digital to analog converter and resolution determine reference frequency output and the degree of regulation of described ring oscillator.
According to the present invention, the frequency of oscillation of the adjustable phase frequency oscillator for phase detecting circuit can be regulated to digitally synchronous with master clock or signal frequency, phase adjusted can be carried out to output signal easily simultaneously, while effectively reducing circuit design difficulty, ensure that the precision of phase-detection.
Accompanying drawing explanation
Following accompanying drawing of the present invention in this as a part of the present invention for understanding the present invention.Shown in the drawings of embodiments of the invention and description thereof, be used for explaining principle of the present invention.
In accompanying drawing:
The schematic diagram of the phase error that Fig. 1 exists when being and adopting existing phase detecting circuit implementing phase to detect;
Fig. 2 A is the schematic diagram of the adjustable phase frequency oscillator for phase detecting circuit that the present invention proposes;
Fig. 2 B is the electrical block diagram of the adjustable phase frequency oscillator for phase detecting circuit that the present invention proposes.
Embodiment
In the following description, a large amount of concrete details is given to provide more thorough understanding of the invention.But, it is obvious to the skilled person that the present invention can be implemented without the need to these details one or more.In other example, in order to avoid obscuring with the present invention, technical characteristics more well known in the art are not described.
In order to thoroughly understand the present invention, by following description, detailed step is proposed, to explain the adjustable phase frequency oscillator for phase detecting circuit of the present invention's proposition.Obviously, the specific details that the technical staff that execution of the present invention is not limited to semiconductor applications has the knack of.Preferred embodiment of the present invention is described in detail as follows, but except these are described in detail, the present invention can also have other execution modes.
Should be understood that, " comprise " when using term in this manual and/or " comprising " time, it indicates exists described feature, entirety, step, operation, element and/or assembly, but does not get rid of existence or additional other features one or more, entirety, step, operation, element, assembly and/or their combination.
[exemplary embodiment]
Usually there is the complexity of the low or increasing circuit of compensation precision in the compensation way implemented for the intrinsic phase error existed in existing phase detecting circuit, the problem of power consumption area and design difficulty, in order to solve the problem, the present invention proposes a kind of adjustable phase frequency oscillator for phase detecting circuit, by increasing this adjustable phase frequency oscillator in the phase detecting circuit comprising MEMS gyro instrument, significantly can reduce the phase error between detection signal and Control timing sequence, simultaneously, compared with prior art, complexity in circuits and shared chip area also greatly reduce.
As shown in Figure 2 A, it illustrates the operation principle of the adjustable phase frequency oscillator for phase detecting circuit that the present invention proposes.The phase place of output timing is changed by N number of unit delay elements of cascade, every grade of unit delay elements has identical circuit structure, therefore, the difference of the timing rhohase of every grade of unit delay elements output is consistent, again by the selection of the multibit signal selector 200 of input digital controlled signal, can the phase accuracy of linear regulation output signal, thus the sequential consistent with detection signal phase frequency can be obtained.By the number selecting the numerical value of described N to determine unit delay elements, to obtain the phase output with different accuracy.
As shown in Figure 2 B, above-mentioned N number of unit delay elements all adopts the simplest CMOS inverter, changes time of delay by the mode changing bias voltage or bias current, thus regulates the output frequency of the ring oscillator be made up of N number of CMOS inverter of cascade.For every grade of CMOS inverter, by an enhancement mode NMOS tube (hereinafter referred to as N pipe) and enhancement mode PMOS (hereinafter referred to as a P pipe) composition, the grid of two pipes connects together as input, the drain electrode of two pipes connects together as output, the source electrode of P pipe is connected to the providing source-digital to analog converter 201 of bias voltage or bias current, the source electrode of N pipe is connected to the drain electrode of another N pipe, the source ground of another N pipe described, the grid of another N pipe described is connected to the output of digital to analog converter 201.The digital controlled signal of input can be converted to by digital to analog converter 201 bias voltage that puts on described ring oscillator in system application or bias current changes time of delay, thus regulating the output frequency of described ring oscillator, the dynamic range of digital to analog converter 201 and resolution determine reference frequency output and the degree of regulation of described ring oscillator.Described oscillator adopts multistage odd number CMOS inverter mode to obtain output frequency, the output of every grade of inverter all has tap to be connected to multibit signal selector 200, therefore the precision of the final adjustable phase exported is relevant to the progression of inverter, for being applicable to gyroscope application, the progression N of inverter is more than or equal to 31.N number of N pipe with same circuits structure of digital to analog converter 201 and another cascade is in series and forms multibit signal selector 200, the input of digital to analog converter 201 is connected to the providing source of digital controlled signal, and the output of digital to analog converter 201 is connected to the grid of each N pipe in N number of N pipe of another cascade.
According to the present invention, the frequency of oscillation of the adjustable phase frequency oscillator for phase detecting circuit can be regulated to digitally synchronous with master clock or signal frequency, phase adjusted can be carried out to output signal easily simultaneously, while effectively reducing circuit design difficulty, ensure that the precision of phase-detection.
The present invention is illustrated by above-described embodiment, but should be understood that, above-described embodiment just for the object of illustrating and illustrate, and is not intended to the present invention to be limited in described scope of embodiments.In addition it will be appreciated by persons skilled in the art that the present invention is not limited to above-described embodiment, more kinds of variants and modifications can also be made according to instruction of the present invention, within these variants and modifications all drop on the present invention's scope required for protection.Protection scope of the present invention defined by the appended claims and equivalent scope thereof.
Claims (7)
1. the adjustable phase frequency oscillator for phase detecting circuit, it is characterized in that, comprise N number of unit delay elements and multibit signal selector with same circuits structure of cascade, described N number of unit delay elements forms a ring oscillator, the difference of the timing rhohase that described N number of unit delay elements exports is consistent, the output of described N number of unit delay elements all has tap to be connected to described multibit signal selector, described multibit signal selector is in series by N number of enhancement mode NMOS tube with same circuits structure of a digital to analog converter and another cascade, by the selection of described multibit signal selector, the frequency of the sequential of the output signal of described adjustable phase frequency oscillator is consistent and phase accuracy is linearly adjustable, wherein, N is more than or equal to 2.
2. adjustable phase frequency oscillator according to claim 1, is characterized in that, by the number selecting the numerical value of described N to determine described unit delay elements, to obtain the phase output with different accuracy.
3. adjustable phase frequency oscillator according to claim 2, is characterized in that, when described phase detecting circuit is applied to gyroscope, described N is more than or equal to 31.
4. adjustable phase frequency oscillator according to claim 1, is characterized in that, described N number of unit delay elements is formed by the CMOS inverter of band bias voltage and bias current.
5. adjustable phase frequency oscillator according to claim 4, it is characterized in that, described CMOS inverter is made up of an enhancement mode NMOS tube and an enhancement mode PMOS, the grid of described NMOS tube and described PMOS connects together as input, the drain electrode of described NMOS tube and described PMOS connects together as output, the source electrode of described PMOS is connected to the output of described digital to analog converter, and the source electrode of described NMOS tube is connected to the drain electrode of another NMOS tube described.
6. adjustable phase frequency oscillator according to claim 1, it is characterized in that, the input of described digital to analog converter is connected to the providing source of digital controlled signal, and the output of described digital to analog converter is connected to the grid of another NMOS tube described, the source ground of another NMOS tube described.
7. adjustable phase frequency oscillator according to claim 6, it is characterized in that, described digital to analog converter by input described digital controlled signal be converted to put on described ring oscillator bias voltage or bias current to change time of delay, thus regulate the output frequency of described ring oscillator, and the dynamic range of described digital to analog converter and resolution determine reference frequency output and the degree of regulation of described ring oscillator.
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| CN201410045053.5A CN104836575B (en) | 2014-02-07 | 2014-02-07 | A kind of adjustable phase frequency oscillator for phase detecting circuit |
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| CN201410045053.5A CN104836575B (en) | 2014-02-07 | 2014-02-07 | A kind of adjustable phase frequency oscillator for phase detecting circuit |
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| CN104836575A true CN104836575A (en) | 2015-08-12 |
| CN104836575B CN104836575B (en) | 2018-11-27 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105207670A (en) * | 2015-09-10 | 2015-12-30 | 重庆西南集成电路设计有限责任公司 | Segmented low-voltage control gain ring oscillator and tuning slope switching circuit |
| CN108627190A (en) * | 2017-07-28 | 2018-10-09 | 无锡思泰迪半导体有限公司 | A kind of high-precision Magnetic Sensor correcting structure and bearing calibration based on integrated circuit |
| CN112615589A (en) * | 2020-12-15 | 2021-04-06 | 海光信息技术股份有限公司 | Method and device for adjusting frequency of ring oscillator, storage medium and equipment |
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| CN101789783A (en) * | 2009-01-22 | 2010-07-28 | 中芯国际集成电路制造(上海)有限公司 | Digital delay phase-locked loop |
| CN102386916A (en) * | 2011-09-21 | 2012-03-21 | 复旦大学 | Digital pulse width modulator circuit capable of reducing power consumption and chip area |
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2014
- 2014-02-07 CN CN201410045053.5A patent/CN104836575B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101789783A (en) * | 2009-01-22 | 2010-07-28 | 中芯国际集成电路制造(上海)有限公司 | Digital delay phase-locked loop |
| CN102386916A (en) * | 2011-09-21 | 2012-03-21 | 复旦大学 | Digital pulse width modulator circuit capable of reducing power consumption and chip area |
Non-Patent Citations (1)
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| 王磊: "CMOS电荷泵锁相环的分析与设计", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105207670A (en) * | 2015-09-10 | 2015-12-30 | 重庆西南集成电路设计有限责任公司 | Segmented low-voltage control gain ring oscillator and tuning slope switching circuit |
| CN105207670B (en) * | 2015-09-10 | 2018-01-30 | 重庆西南集成电路设计有限责任公司 | It is segmented low pressure control gain ring oscillator and tuning slope change-over circuit |
| CN108627190A (en) * | 2017-07-28 | 2018-10-09 | 无锡思泰迪半导体有限公司 | A kind of high-precision Magnetic Sensor correcting structure and bearing calibration based on integrated circuit |
| CN108627190B (en) * | 2017-07-28 | 2023-12-19 | 杭州思泰微电子有限公司 | High-precision magnetic sensor correction structure and correction method based on integrated circuit |
| CN112615589A (en) * | 2020-12-15 | 2021-04-06 | 海光信息技术股份有限公司 | Method and device for adjusting frequency of ring oscillator, storage medium and equipment |
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| CN104836575B (en) | 2018-11-27 |
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