CN104821053A - Door magnetic control system for smart home - Google Patents

Door magnetic control system for smart home Download PDF

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Publication number
CN104821053A
CN104821053A CN201510194190.XA CN201510194190A CN104821053A CN 104821053 A CN104821053 A CN 104821053A CN 201510194190 A CN201510194190 A CN 201510194190A CN 104821053 A CN104821053 A CN 104821053A
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CN
China
Prior art keywords
pin
resistance
electric capacity
door
chip
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CN201510194190.XA
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Chinese (zh)
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CN104821053B (en
Inventor
郑孟峰
苏宏育
叶进荣
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深圳市贝晶光电科技有限公司
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Priority to CN201510194190.XA priority Critical patent/CN104821053B/en
Publication of CN104821053A publication Critical patent/CN104821053A/en
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Publication of CN104821053B publication Critical patent/CN104821053B/en

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    • GPHYSICS
    • G08SIGNALLING
    • G08BSIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B13/00Burglar, theft or intruder alarms
    • G08B13/02Mechanical actuation
    • G08B13/08Mechanical actuation by opening, e.g. of door, of window, of drawer, of shutter, of curtain, of blind

Abstract

The invention relates to a smart home device, more particularly to a door magnetic control system for a smart home. The door magnetic control system for the smart home in the invention comprises a door magnetic chip U1, a communication module and a signal acquisition circuit. The door magnetic control system is simple in structure, can complete identification process of opening and closing information of a door and a window only with the door magnetic chip U1, the communication module, the signal acquisition circuit and a power supply, is provided with a micro switch for preventing demolition, and is highly safe. The door magnetic control system for the smart home in the invention further comprises an alarm system accessed to a z-wave network, an upper computer, a control host and a monitoring system. Through connection of the z-wave network to the alarm system, the upper computer, the control host and the monitoring system, the door magnetic control system can achieve linkage with other devices in the z-wave network through the control host, and the devices can operate collaboratively.

Description

A kind of door magnetic control system for Smart Home
Technical field
The present invention relates to intelligent family equipment, particularly relate to the door magnetic control system for Smart Home.
Background technology
Smart Home take house as platform, utilize comprehensive wiring technology, the network communications technology, security precautions technology, automatic control technology, audio frequency and video technology by integrated for facility relevant for life staying idle at home, build the management system of efficient housing facilities and family's schedule affairs, promote house security, convenience, comfortableness, artistry, and realize the living environment of environmental protection and energy saving.
Along with Internet information technique progress, Smart Home has become a part for our life gradually, Household security system protection family's property safety, personal safety.Household security system carrys out the opening and closing situation of induction monitor door mainly through door magnetic, record the door and window opening and closing information of non-triggering alarm system, kinsfolk observes by Remote and solves unusual condition, the complex structure of existing door magnetic control system, door magnetic and warning system link, and control system can not realize multiple intelligent home device remote interlocking.
Summary of the invention
Door magnetic structure for door magnetic control system in prior art is complicated, and control system can not realize the interlock of multiple intelligent home device.The invention provides the door magnetic for Smart Home that the simple and safe performance of a kind of structure is high, for achieving the above object, the present invention adopts following technical scheme:
For a door magnetic control system for Smart Home, described door magnetic control system comprises:
Signal acquisition circuit, gathers door and window opening and closing information, and is sent to a magnetic chip;
Door magnetic chip, for the treatment of the opening and closing information of signal acquisition circuit, judges door and window opening and closing information, triggers or removes warning system, door magnetic control signal door and window opening and closing information being sent by communication module and receive for the treatment of communication module;
Communication module, for being sent to z-wave network-based control main frame by door and window opening and closing information and accepting the door magnetic control signal of z-wave network-based control main frame;
Power module, for powering to signal acquisition circuit, communication module, door magnetic chip.
Wherein, described signal acquisition circuit comprises the first switch, second switch, the 3rd switch, and the first switch is used for control signal Acquisition Circuit and is connected with door magnetic chip or disconnects; Second switch is used for control signal Acquisition Circuit and sends alerting signal to door magnetic chip; 3rd switch is used for control signal Acquisition Circuit and sends opening of doors and windows or door and window closure signal to door magnetic chip.
Wherein, described signal acquisition circuit comprises XOR gate integrated circuit, electric capacity C10, electric capacity C15, electric capacity C16, electric capacity C17, electric capacity C18, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, resistance R9, resistance R11, the first switch, second switch, the 3rd switch;
Described XOR gate integrated circuit U5 the 2nd pin, the 7th pin, the 12nd pin, the 13rd pin connect digitally; 3rd pin connects the 4th pin, and the 6th pin connects the 9th pin;
8th pin contact resistance R5, the 3rd pin of connection door magnetic chip U1 after connecing electric capacity C18 filtering digitally; 14th pin is through connecing electric capacity C10 out-put supply digitally;
First switch one end ground connection, the first switch other end connects one end of electric capacity C15 one end, resistance R7 one end, resistance R4, another termination of electric capacity C15 digitally, the other end of resistance R7 connects power supply, the 10th pin of other end connection door magnetic chip U1 of resistance R4, the 1st pin 1A of XOR gate integrated circuit U5;
Second switch one end ground connection, the other end connects electric capacity C17 one end, resistance R9 one end, resistance R11 one end, the other end ground connection of electric capacity C17, the other end of resistance R9 connects power supply, the 15th pin of other end connection door magnetic chip U1 of resistance R11, the 10th pin 3B of XOR gate integrated circuit U5;
3rd switch one end ground connection, the other end connects electric capacity C16 one end, resistance R8 one end, resistance R6 one end, the other end ground connection of electric capacity C16, another termination of resistance R8, resistance R7 one end, resistance R9 one end, power supply, the 13rd pin of other end connection door magnetic chip U1 of resistance R6, the 5th pin of XOR gate integrated circuit U5.
Wherein, also comprise warning system, host computer, main control system, supervisory system, described host computer is connected with warning system, supervisory system, door magnetic control system by main control system.
Wherein, described main control system, door magnetic control system, supervisory system, warning system form Z_Wave network by communication module, described main control system is connected with described host computer, for the control command of host computer is sent to supervisory system, door magnetic control system, warning system, for the duty of door magnetic control system, warning system, supervisory system being sent to host computer display.
Wherein, described host computer is set to smart mobile phone, panel computer and PC.
For a control method for the door magnetic control system of Smart Home, it is characterized in that:
The door and window opening and closing information collected is sent to a magnetic chip by step one, signal acquisition circuit,
Step 2, door magnetic chip accept and process door and window opening and closing information, judge that door and window opening and closing information belongs to normal and opens or unnormal unlocking;
Step 3, when door and window opening and closing information belong to normally open time, door and window opening and closing information is sent to main control system through communication module
Step 4, when door and window opening and closing information belongs to unnormal unlocking, door magnetic opening and closing information is sent to main control system through communication module by door magnetic chip, and sends open command to supervisory system and warning system.
Step 5, main control system receives door and window opening and closing information, and shows.
Wherein, in described step 2, the door and window opening and closing information that in signal acquisition circuit, the 3rd switch sends is unnormal unlocking.
Wherein, described step 5 also comprises.Door and window opening and closing information is sent to handheld terminal or PC display by main control system.
Wherein, in described step 4, after supervisory system starts, the video information of shooting and audio-frequency information are sent to main control system and store.
The invention provides a kind of door magnetic control system for Smart Home, described door magnetic control system comprises: signal acquisition circuit, gathers door and window opening and closing information, and is sent to a magnetic chip U1; Door magnetic chip U1, for the treatment of the information of signal acquisition circuit, carries out to door and window opening and closing information identifications and judges to identify, trigger or releasing warning system, and the process information of communication module transfer gate magnetic chip U1 by being connected with door magnetic chip U1; Communication module, sends radiofrequency signal to z-wave network; Power supply, for signal acquisition circuit, door magnetic chip U1 power.Signal acquisition circuit gathers the opening and closing information of each switch, the signal of door magnetic chip U1 Received signal strength Acquisition Circuit, door and window is not locked, normally opened, the second switch of signal acquisition circuit disconnects, the signal of door magnetic chip U1 Received signal strength Acquisition Circuit also makes the judgement process of normal condition, door and window is locked, tolled breakdown invasion, 3rd switch is touched, door magnetic chip U1 makes the process of warning system, the structure of door magnetic is simple, only need a magnetic chip U1, communication module, signal acquisition circuit, power supply just can complete the identifying processing of door and window opening and closing information, be provided with for preventing the microswitch tolled breakdown, security performance is good.
Present invention also offers a kind of control method of the door magnetic control system for Smart Home:
The door and window opening and closing information collected is sent to a magnetic chip U1 by step one, signal acquisition circuit;
Step 2, door magnetic chip U1 accept and process door and window opening and closing information, judge that door and window opening and closing information belongs to normal and opens or unnormal unlocking;
Step 3, when door and window opening and closing information belong to normally open time, door and window opening and closing information is sent to main control system through communication module
Step 4, when door and window opening and closing information belongs to unnormal unlocking, door magnetic opening and closing information is sent to main control system through communication module by door magnetic chip U1, and sends open command to supervisory system and warning system;
Step 5, main control system receives door and window opening and closing information, and shows.
Door magnetic control system can the open and-shut mode of automatic door aligning window be monitored by said method, record can be carried out to the normal unlatching of door and window to save backup, simultaneously, to unlatching improper with door and window, signal acquisition circuit can collection promptly and accurately, and sending to a magnetic chip U1, door magnetic chip U1 is reported to the police by communication module triggering alarm system.Door magnetic control system can safety, full automatic control door window-like state, for house security brings guarantee.
Accompanying drawing explanation
Fig. 1 is door magnetic chip U1 and temperature inductor connecting circuit figure;
Fig. 2 is the circuit diagram of signal acquisition circuit;
Fig. 3 is battery J5 circuit diagram;
Fig. 4 is DLL (dynamic link library) J3 circuit diagram;
Fig. 5 is embodiment 1 magnetic control system illustrative configurations block diagram;
Fig. 6 is embodiment 2 magnetic control system illustrative configurations block diagrams;
Fig. 7 is main control system illustrative configurations block diagram;
Fig. 8 is route control unit circuit diagram;
Fig. 9 is route storage unit circuit figure;
Figure 10 is wifi communication unit circuit diagram;
Figure 11 is Ethernet interface element circuit figure;
Figure 12 is Power Management Unit circuit diagram;
Figure 13 is z-wave wireless communication unit circuit diagram;
Figure 14 is z-wave storage unit circuit figure;
Figure 15 is SPI interface unit circuit diagram.
Figure 16 is signal amplification circuit structured flowchart;
Figure 17 is the data input module circuit diagram of signal amplification circuit;
Figure 18 is the power transfer module circuit diagram of signal amplification circuit;
Figure 19 is the signal amplification module circuit diagram of signal amplification circuit;
Figure 20 is the interrupt circuit figure of signal amplification circuit;
Figure 21 is the circuit diagram figure of the flash memory module circuit of signal amplification circuit;
Figure 22 is the z-wave signal processing module circuit diagram of signal amplification circuit;
Figure 23 is the circuit diagram of the voltage-regulating circuit of signal amplification circuit;
Figure 24 is the antenna ANT1 circuit diagram of signal amplification circuit.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.
Embodiment 1
As shown in Figure 5, a kind of door magnetic control system 6 for Smart Home, described door magnetic control system 6 comprises signal acquisition circuit 1, power module 2, communication module 4, door magnetic chip U1.
Signal acquisition circuit 1, for gathering door and window opening and closing information, and is sent to a magnetic chip U1.Door magnetic chip U1, for the treatment of the opening and closing information of signal acquisition circuit 1, judges door and window opening and closing information, triggers or removes warning system 7, door magnetic control signal door and window opening and closing information being sent by communication module 4 and send for the treatment of communication module 4.Communication module 4, for being sent to the main control system 9 of z-wave network 5 and accepting the door magnetic control signal of main control system 9 of z-wave network 5 by door and window opening and closing information.Power module 2, for powering to signal acquisition circuit 1, communication module 4, door magnetic chip U1.
As shown in Figure 2, described signal acquisition circuit 1 comprises the first switch, second switch, the 3rd switch, and the first switch is used for control signal Acquisition Circuit 1 and is connected with door magnetic chip U1 or disconnects; Second switch is used for control signal Acquisition Circuit 1 and sends opening of doors and windows or door and window closure signal to door magnetic chip U1; 3rd switch is used for control signal Acquisition Circuit 1 and sends alerting signal to door magnetic chip U1.
Described signal acquisition circuit 1 comprises XOR gate integrated circuit U5, electric capacity C10, electric capacity C15, electric capacity C16, electric capacity C17, electric capacity C18, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, resistance R9, resistance R11, first switch, second switch, 3rd switch, described first switch is used for control gate magnetic access z-wave network 5, 3rd switch is micro-control switch, for normally closed switch, second switch is reed contact, for normally closed switch or normal open switch, door magnetic touches contact when being tolled breakdown, alert trigger, second switch can prevent the magnetic from being removed by force.Described 3 switches cooperatively interact settling signal collecting work, the first switch, second switch, the 3rd switch
Described XOR gate integrated circuit U5 the 2nd pin, the 7th pin, the 12nd pin, the 13rd pin connect digitally; 3rd pin connects the 4th pin, and the 6th pin connects the 9th pin; 8th pin contact resistance R5, the 3rd pin of connection door magnetic chip U1 after connecing electric capacity C18 filtering digitally; 14th pin is through connecing electric capacity C10 out-put supply digitally;
First switch one end ground connection, the first switch other end connects one end of electric capacity C15 one end, resistance R7 one end, resistance R4, another termination of electric capacity C15 digitally, the other end of resistance R7 connects power supply, the 10th pin of other end connection door magnetic chip U1 of resistance R4, the 1st pin 1A of XOR gate integrated circuit U5;
Second switch one end ground connection, the other end connects electric capacity C17 one end, resistance R9 one end, resistance R11 one end, the other end ground connection of electric capacity C17, the other end of resistance R9 connects power supply, the 15th pin of other end connection door magnetic chip U1 of resistance R11, the 10th pin 3B of XOR gate integrated circuit U5;
3rd switch one end ground connection, the other end connects electric capacity C16 one end, resistance R8 one end, resistance R6 one end, the other end ground connection of electric capacity C16, another termination of resistance R8, resistance R7 one end, resistance R9 one end, power supply, the 13rd pin of other end connection door magnetic chip U1 of resistance R6, the 5th pin 2B of XOR gate integrated circuit U5.
As shown in Figure 3, the present embodiment power module 2 is battery J5, and the 1st pin of battery J5 connects diode anode, and the 2nd pin of diode cathode out-put supply VCC, battery J5 connects digitally.
As shown in Figure 1, door magnetic chip U1 arranges the 1st pin, the 2nd pin, the 3rd pin, the 4th pin, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 11st pin, the 12nd pin, the 13rd pin, the 14th pin, the 15th pin, the 16th pin GND, the 17th pin, the 18th pin.1st pin, the 6th pin, the 12nd pin, the 16th pin, the 17th pin connect digitally.2nd pin connects power supply VCC through resistance R15.3rd pin connects the 8th pin of XOR gate integrated circuit U5, the 4th pin connecting resistance R12 one end, and resistance R12 other end sending and receiving optical diode D7 negative electrode, the anode of light emitting diode D7 meets power supply VCC.GND pin, the NC pin of the 5th pin jointing temp induction module U3, the 7th pin connects,
As shown in Figure 4, DLL (dynamic link library) J3 is provided with the 1st pin of ground connection, the 2nd pin be connected with door magnetic chip U1 the 2nd pin, the 3rd pin be connected with door magnetic chip U1 the 7th pin, the 4th pin be connected with door magnetic chip U1 the 8th pin, the 3rd pin that is connected with door magnetic chip U1 the 9th pin, and the 7th pin of DLL (dynamic link library) J3 connects power supply VCC.
As shown in Figure 1,18th pin of communication module 4 connection door magnetic chip U1, described communication module 4 comprises interface J4, inductance L 2, electric capacity C13, electric capacity C14, inductance L 2 one end connects U1 the 18th pin, electric capacity C13 one end respectively, another termination capacitor C14 one end of inductance L 2, interface J4 the 1st pin, electric capacity C14 other end ground connection, another termination processor of electric capacity C13 U the 17th pin and ground connection.
As shown in Figure 1, temperature sense module U3 is provided with 2 GND pin, 1 NC pin, V+ pin, Vout pin, 5th pin of GND pin, NC pin connection handling device U1, connects power supply VCC after V+ foot meridian capacitor C filtering, the 14th pin of the Vout pin connection door magnetic chip U1 of temperature sense module U3.
XOR gate integrated circuit U5 is provided with the 1st pin, the 2nd pin, the 3rd pin, the 4th pin, the 5th pin, the 6th pin, the 7th pin, the 8th pin, the 9th pin, the 10th pin, the 11st pin, the 12nd pin, the 13rd pin, the 14th pin;
2nd pin, the 7th pin, the 12nd pin, the 13rd pin connect digitally; 3rd pin connects the 4th pin, and the 6th pin connects the 9th pin;
The 8th pin contact resistance R5 of XOR gate integrated circuit U5, the 3rd pin of connection door magnetic chip U1 after connecing electric capacity C18 filtering digitally; 14th pin is through meeting electric capacity C10 out-put supply VCC digitally.
First switch one termination digitally, the first switch other end connects one end of electric capacity C15 one end, resistance R7 one end, resistance R4, another termination of electric capacity C15 digitally, the other end of resistance R7 connects power supply VCC, the 10th pin of other end connection door magnetic chip U1 of resistance R4, the 1st pin of XOR gate integrated circuit U5.
Second switch one termination digitally, the other end connects electric capacity C17 one end, resistance R9 one end, resistance R11 one end, another termination of electric capacity C17 digitally, the other end of resistance R9 connects power supply VCC, the 15th pin of other end connection door magnetic chip U1 of resistance R11, the 10th pin of XOR gate integrated circuit U5.
3rd switch one termination digitally, the other end connects electric capacity C16 one end, resistance R8 one end, resistance R6 one end, another termination of electric capacity C16 digitally, another termination of resistance R8, resistance R7 one end, resistance R9 one end, the 13rd pin of other end connection door magnetic chip U1 of power supply VCC, resistance R6, the 5th pin of XOR gate integrated circuit U5.
Embodiment 2
As shown in Figure 6, the door magnetic control system 6 of Smart Home also bag warning system 7, host computer 10, main control system 9, supervisory system 8.
Described host computer 10 is connected with warning system 7, supervisory system 8, door magnetic control system 6 by main control system 9, and described host computer 10 is set to smart mobile phone, panel computer and PC.Warning system 7, host computer 10, main control system 9, supervisory system 8 can realize, with other equipment linkages of z-wave network 5, realizing collaborative work between each equipment by main control system 9.
Described main control system 9, door magnetic control system 6, supervisory system 8, warning system 7 form z-wave network by communication module 4, described main control system 9 is connected with described host computer 10, for the control command of host computer 10 is sent to supervisory system 8, door magnetic control system 6, warning system 7, show for the duty of door magnetic control system 6, warning system 7, supervisory system 8 is sent to host computer 10.
The door magnetic control system 6 of Smart Home of the present invention have employed following control method:
The door and window opening and closing information collected is sent to a magnetic chip U1 by step one, signal acquisition circuit 1,
Step 2, door magnetic chip U1 accept and process door and window opening and closing information, judge that door and window opening and closing information belongs to normal and opens or unnormal unlocking;
Step 3, when door and window opening and closing information belong to normally open time, door and window opening and closing information is sent to main control system 9 through communication module 4
Step 4, when door and window opening and closing information belongs to unnormal unlocking, door magnetic opening and closing information is sent to main control system 9 through communication module 4 by door magnetic chip U1, and sends open command to supervisory system 8 and warning system 7.
Step 5, main control system 9 receives door and window opening and closing information, and shows.
In step 2, the door and window opening and closing information that in signal acquisition circuit 1, the 3rd switch sends is unnormal unlocking.
Step 5 also comprises.Door and window opening and closing information is sent to handheld terminal or PC display by main control system 9.
In step 4, the video information of shooting and audio-frequency information are sent to main control system 9 and store after starting by supervisory system 8.
In the present embodiment, host computer 10 is provided with 2 mode of operations, normal mode and monitoring mode, and normal mode is applicable to kinsfolk and is in, and monitoring mode is suitable for and the situation of sleeping or kinsfolk goes out.
When host computer 10 is under normal mode of operation, when door Magnetic testi is opened to door and window, the information detected is sent to main control system 9 by door magnetic, and host computer 10 shows the status information of door and window in real time; Door magnetic also sends control command to supervisory system 8, and triggers supervisory system 8 pairs of door and windows and capture or make a video recording; The data of capturing or shooting obtains can be sent to main control system 9 by supervisory system 8 simultaneously, and host computer 10 shows and stores in real time;
When the 3rd switch on door magnetic is touched, when detecting that door and window shows unusual condition, the information detected is sent to main control system 9 by door magnetic, and host computer 10 shows the status information of door and window in real time; Door magnetic also sends control command to warning system 7, and triggering alarm system 7 is reported to the police; Door magnetic also sends control command to supervisory system 8, and triggers supervisory system 8 pairs of door and windows and capture or make a video recording; The data of capturing or shooting obtains can be sent to main control system 9 by supervisory system 8 simultaneously, and host computer 10 shows and stores in real time;
When host computer 10 is under monitoring mode of operation, when door Magnetic testi is opened to door and window, the information detected is sent to main control system 9 by door magnetic, and host computer 10 shows the status information of door and window in real time; Door magnetic also sends control command to supervisory system 8, and triggers supervisory system 8 pairs of door and windows and capture or make a video recording; The data of capturing or shooting obtains can be sent to main control system 9 by supervisory system 8 simultaneously, and host computer 10 shows and stores in real time; Host computer 10 sends control command to warning system 7, and triggering alarm system 7 is reported to the police;
When door Magnetic testi unusual condition existing to door and window, the information detected is sent to main control system 9 by door magnetic, and host computer 10 shows the status information of door and window in real time; Door magnetic also sends control command to warning system 7, and triggering alarm system 7 is reported to the police; Door magnetic also sends control command to supervisory system 8, and triggers supervisory system 8 pairs of door and windows and capture or make a video recording; The data of capturing or shooting obtains can be sent to main control system 9 by supervisory system 8 simultaneously, and host computer 10 shows and stores in real time;
Observe unusual condition by host computer 10 and solve unusual condition, removing the alarm response of warning system 7
As shown in Figure 7, main control system 9 comprises route control unit 11, route storage unit 13, wifi communication unit 14, Ethernet interface unit 15, z-wave wireless communication unit 17, z-wave storage unit 16, SPI interface unit 18, Power Management Unit 12.
As shown in Figure 8, route control unit 11 comprises router chip U17, electric capacity C199, electric capacity C225, electric capacity C226, electric capacity C227, electric capacity C228, electric capacity C233, electric capacity C234, electric capacity C235, electric capacity C236, electric capacity C198, electric capacity C231, electric capacity C191, electric capacity C190, electric capacity C146, electric capacity C101, electric capacity C102, electric capacity C195, electric capacity C141, electric capacity C237, electric capacity C154, electric capacity C143, electric capacity C156, electric capacity C238, electric capacity C150, electric capacity C151, electric capacity C249, electric capacity C149, electric capacity C148, electric capacity C152, electric capacity C245, electric capacity C239, inductance L 112, inductance L 1270, inductance L 124, inductance L 113, inductance L 114, resistance R216, resistance R200, resistance R173, resistance R223, resistance R214, crystal resonator Y20, electric capacity C315, electric capacity C316, resistance R490, resistance R491, socket J11, electric capacity C155, resistance R170, resistance R175, electric capacity C224, electric capacity C229, resistance R137, resistance R270, resistance R139, resistance R131, resistance R133, resistance R135, resistance R141, resistance R143, resistance R264, wave filter U24, USB plug USB11, electric capacity C175, electric capacity C132, electric capacity C133, resistance R176, resistance R177, inductance L 118, wire jumper seat J25, resistance R494, resistance R495, resistance R108, light emitting diode D11, electric capacity C167, resistance R110, button J12, resistance R111, light emitting diode D15, resistance R112, button J13.
10V digital power connects after digitally filtering through electric capacity C199 and is connected with the 3rd pin VDD10 of router chip U17; One termination 10V digital power of inductance L 1270, the other end is connected with the 4th pin AVDD10, the 14th pin AVDD10 of electric capacity C225, electric capacity C226, electric capacity C227, electric capacity C228, electric capacity C233 and router chip U17, the 25th pin AVDD10, the 32nd pin AVDD10_PHYPLL respectively, and the other end of electric capacity C225, electric capacity C226, electric capacity C227, electric capacity C228, electric capacity C233 all connects digitally; One termination 3.3V digital power of inductance L 112, the other end is connected with the 9th pin AVDD33, the 20th pin AVDD33 of electric capacity C234, electric capacity C235, electric capacity C236 and router chip U17, the 30th pin AVDD33_PHYPLL respectively, and the other end of electric capacity C234, electric capacity C235, electric capacity C236 all connects digitally; The 31st pin IBREF of router chip U17 connects digitally through resistance R216; 33rd pin of router chip U17 is connected with one end of 10V digital power and electric capacity C198 and electric capacity C231 respectively, and the other end of electric capacity C198 and electric capacity C231 all connects digitally; 3.3V digital power connects after digitally filter filter through electric capacity C191 and is connected with the 41st pin VDD33_25_18 of router chip U17; 3.3V digital power connects after digitally filter filter through electric capacity C190 and is connected with the 53rd pin VDD33_25_18 of router chip U17; 3.3V digital power connects after digitally filter filter through electric capacity C101 and is connected with the 67th pin VDD33_25_18 of router chip U17; 3.3V digital power connects after digitally filter filter through electric capacity C102 and is connected with the 79th pin VDD33_25_18 of router chip U17; 3.3V digital power connects after digitally filter filter through electric capacity C195 and is connected with the 87th pin VDD33_LDO of router chip U17; 3.3V digital power connects after digitally filter filter through electric capacity C239 and is connected with the 119th pin VDD33 of router chip U17; 10V digital power connects after digitally filter filter through electric capacity C146 and is connected with the 64th pin VDD10 of router chip U17; One end of resistance R311 is connected with 3.3V digital power, and the other end is connected with electric capacity C143, electric capacity C154 respectively, and another termination of electric capacity C143, electric capacity C154 digitally; 3.3V digital power connects after digitally filtering through electric capacity C152 and is connected with one end of inductance L 114, the other end of inductance L 114 connects after digitally filtering through electric capacity C245 and is connected with the 112nd pin AVDD33_BG of router chip U17, the other end of inductance L 114 is also connected with the 109th pin AVDD33X of router chip U17 through electric capacity C148, and the other end of inductance L 114 is also connected with the 96th pin AVDD33_USB of router chip U17 through electric capacity C156; 10V digital power connects after digitally filtering through electric capacity C249 and is connected with one end of inductance L 113, the other end of inductance L 113 connects after digitally filtering through electric capacity C149 and is connected with the 103rd pin AVDD10_PCIE of router chip U17, and the other end of inductance L 113 also connects respectively after digitally filtering through electric capacity C150 and electric capacity C151 and is connected with 97 pin AVDD10_USB; 10V digital power connects after digitally filtering through electric capacity C238, be connected with the 95th pin SWR_VDD10 of router chip U17, also be connected with one end of resistance R223, the other end of resistance R223 connects after digitally filtering through electric capacity C141 and electric capacity C237 respectively and is connected with one end of inductance L 124, and the other end of inductance L 124 is connected with SWR_LX and the 91st pin SWR_LX respectively; The 93rd pin SWR_MODE of router chip U17 connects digitally through resistance R173.
The 1st pin XTALP of crystal resonator Y20 connects digitally through electric capacity C316, then is connected with the 110th pin XO of router chip U17 through resistant series; The 2nd pin GND of crystal resonator Y20 and the equal ground connection of the 4th pin GND; The 3rd pin XTALP of crystal resonator Y20 connects digitally through electric capacity C315, then is connected with the 111st pin XI of router chip U17 through resistance R490.
2nd pin of debugging interface J11, the 4th pin, the 6th pin, the 8th pin, the 10th pin, the 12nd pin all connect digitally; 3.3V digital power connects after digitally filtering through electric capacity C155, then is connected with the 1st pin of debugging interface J11 through resistance R175, is also connected with the 11st pin of debugging interface J11 through resistance R170; 3rd pin of debugging interface J11 is connected with the 128th pin JTAGTDI of router chip U17; 5th pin of debugging interface J11 is connected with the 1st pin JTAGTDO of router chip U17; 7th pin of debugging interface J11 is connected with the 2nd pin JTAGTMS of router chip U17; 9th pin of debugging interface J11 is connected with the 127th pin JTAGCLK of router chip U17.
1st pin VBUS of USB socket connects digitally filtering through electric capacity, then is connected with the 1st pin of wire jumper seat J25; 2nd pin DN of USB socket connects after digitally filtering through electric capacity C132, then is connected with the 2nd pin of wave filter U24; 3rd pin DP of USB socket connects after digitally filtering through electric capacity C133, then is connected with the 3rd pin of wave filter U24; 4th pin GND of USB socket connects in analog; 5th pin Chassis of USB socket and the 6th pin Chassis all connects shielding ground; Tandem electric inductance L118 is gone back between 4th pin GND of USB socket and the 5th pin Chassis; 1st pin of wave filter is connected with the 99th pin USB_DN of router chip U17; 4th pin of wave filter is connected with the 98th pin USB_DP of router chip U17; Series resistor R176 between 1st pin of wave filter and the 2nd pin; Series resistor R177 between 3rd pin of wave filter and the 4th pin; One end of inductance L 116 is connected with power supply VIN, and the other end is connected with the 2nd pin of electric capacity C188, electric capacity C189 and wire jumper seat respectively, and the other end of electric capacity C188 and electric capacity C189 all digitally; 3rd pin of wire jumper seat is through resistance R494 and resistance R495 ground connection; One end of resistance R108 is connected with 3.3V digital power, and the other end is connected with the anode of light emitting diode D11, and the negative electrode of light emitting diode D11 connects digitally; 3.3V digital power connects after digitally filtering through electric capacity C167 and is connected with one end of resistance R110, and the other end of resistance R110 is through being connected with the 128th pin JTGTDI of router chip U17 with resistance R156; Resistance R156 is connected with one end of button J12 with the link of resistance R110, and another termination of button J12 digitally; 3.3V digital power is connected with the anode of light emitting diode D15 through resistance R111, and the negative electrode of light emitting diode D15 is connected with one end of resistance R161, and the other end of resistance R161 is connected with the 1st pin JTGTDO of router chip U17; 3.3V digital power is connected with one end of resistance R160 through resistance R112, resistance R160 is also connected with one end of button J13 with the tie point of resistance R112, digitally, the other end of resistance R160 is connected with the 127th pin JTAGCLK of router chip U17 another termination of button J13.
The 48th pin MA4 of router chip U17 is connected with 3.3V digital power through resistance R137; The 43rd pin MA8 of router chip U17 is connected with 3.3V digital power through resistance R270; The 37th pin MA12 of router chip U17 is connected with 3.3V digital power through resistance R139; The 42nd pin MA9 of router chip U17 is connected with 3.3V digital power through resistance R131; The 39th pin MA10 of router chip U17 is connected with 3.3V digital power through resistance R133; The 38th pin MA11 of router chip U17 is connected with 3.3V digital power through resistance R135; The 35th pin BS1 of router chip U17 is connected with 3.3V digital power through resistance R141; The 36th pin BS0 of router chip U17 is connected with 3.3V digital power through resistance R143; The 125th pin U0TXD of router chip U17 is connected with 3.3V digital power through resistance R264;
As shown in Figure 9, route storage unit 13 comprises synchronous DRAM U11, electric capacity C197, electric capacity C208, electric capacity C210, resistance R500, resistance R187, resistance R201, electric capacity C144, electric capacity C145, electric capacity C230, electric capacity C162, electric capacity C163, electric capacity C164, electric capacity C165; Route storage unit 13 also comprises flash storage U19, electric capacity C219, resistance R210, resistance R212;
For synchronous DRAM provides stable 3.3V digital power after 3.3V digital power connects digitally filtering respectively through electric capacity C144, electric capacity C145, electric capacity C230, electric capacity C162, electric capacity C163, electric capacity C164, electric capacity C165, the 1st pin VCC of synchronous DRAM U11, the 3rd pin VCCQ, the 9th pin VCCQ, the 14th pin VCC, the 27th pin VCC all connect 3.3V digital power; The 6th pin VSSQ of synchronous DRAM U11, the 12nd pin VSSQ, the 28th pin VSS, the 41st pin VSS, the 46th pin VSSQ, the 52nd pin VSSQ, the 54th pin VSS all connect digitally; 3.3V digital power also connects after digitally filter filtering through electric capacity C197, then is connected with the 43rd pin VCCQ, the 49th pin VCCQ of synchronous DRAM U11 respectively; 3.3V is digitally also connected with the 118th pin GPIOB5 of router chip U17 through resistance R500; The 38th pin CLK of synchronous DRAM U11 connects respectively after digitally filtering through electric capacity C210 and electric capacity C208 and is connected with one end of resistance R201, and the other end of resistance R201 is connected with the 65th pin MCLK of router chip U17; The 37th pin CKE of synchronous DRAM U11 is connected with 3.3V digital power through resistance R187; The 2nd pin DQ0 of synchronous DRAM U11 is connected with the 62nd pin MD0 of router chip U17; The 4th pin DQ1 of synchronous DRAM U11 is connected with the 61st pin MD1 of router chip U17; The 5th pin DQ2 of synchronous DRAM U11 is connected with the 60th pin MD2 of router chip U17; The 7th pin DQ3 of synchronous DRAM U11 is connected with the 59th pin MD3 of router chip U17; The 8th pin DQ4 of synchronous DRAM U11 is connected with the 58th pin MD4 of router chip U17; The 10th pin DQ5 of synchronous DRAM U11 is connected with the 57th pin MD5 of router chip U17; The 11st pin DQ6 of synchronous DRAM U11 is connected with the 56th pin MD6 of router chip U17; The 13rd pin DQ7 of synchronous DRAM U11 is connected with the 55th pin MD7 of router chip U17; The 42nd pin DQ8 of synchronous DRAM U11 is connected with the 71st pin MD8 of router chip U17; The 44th pin DQ9 of synchronous DRAM U11 is connected with the 72nd pin MD9 of router chip U17; The 45th pin DQ10 of synchronous DRAM U11 is connected with the 73rd pin MD10 of router chip U17; The 47th pin DQ11 of synchronous DRAM U11 is connected with the 74th pin MD11 of router chip U17; The 48th pin DQ12 of synchronous DRAM U11 is connected with the 75th pin MD12 of router chip U17; The 50th pin DQ13 of synchronous DRAM U11 is connected with the 76th pin MD13 of router chip U17; The 51st pin DQ14 of synchronous DRAM U11 is connected with the 77th pin MD14 of router chip U17; 53rd pin DQ15 and the MD15 of synchronous DRAM U11 connects; The 15th pin LDQM of synchronous DRAM U11 is connected with the 54th pin LDQM of router chip U17; The 16th pin WE of synchronous DRAM U11 is connected with the 82nd pin WE# of router chip U17; The 17th pin CAS of synchronous DRAM U11 is connected with the 81st pin CAS# of router chip U17; The 19th pin CS of synchronous DRAM U11 is connected with the 83rd pin MSD_CS0B of router chip U17; The 20th pin BS0 of synchronous DRAM U11 is connected with the 36th pin BS0 of router chip U17; The 21st pin BS1 of synchronous DRAM U11 is connected with the 35th pin BS1 of router chip U17; The 39th pin UDQM of synchronous DRAM U11 is connected with the 69th pin UDQM of router chip U17; The 23rd pin A0 of synchronous DRAM U11 is connected with the 52nd pin MA0 of router chip U17; The 24th pin A1 of synchronous DRAM U11 is connected with the 51st pin MA1 of router chip U17; The 25th pin A2 of synchronous DRAM U11 is connected with the 50th pin MA2 of router chip U17; The 26th pin A3 of synchronous DRAM U11 is connected with the 49th pin MA3 of router chip U17; The 29th pin A4 of synchronous DRAM U11 is connected with the 48th pin MA4 of router chip U17; The 30th pin A5 of synchronous DRAM U11 is connected with the 46th pin MA5 of router chip U17; The 31st pin A6 of synchronous DRAM U11 is connected with the 45th pin MA6 of router chip U17; The 32nd pin A7 of synchronous DRAM U11 is connected with the 44th pin MA7 of router chip U17; The 33rd pin A8 of synchronous DRAM U11 is connected with the 43rd pin MA8 of router chip U17; The 34th pin A9 of synchronous DRAM U11 is connected with the 42nd pin MA9 of router chip U17; The 22nd pin A10 of synchronous DRAM U11 is connected with the 39th pin MA10 of router chip U17; The 35th pin A11 of synchronous DRAM U11 is connected with the 38th pin MA11 of router chip U17; The 36th pin A12 of synchronous DRAM U11 is connected with the 37th pin MA12 of router chip U17 through resistance R200;
The 1st pin CS of flash storage U19 is connected with the 123rd pin SF_CS0# of router chip U17; The 2nd pin SO/SIO1 of flash storage U19 is connected with the 122nd pin SF_SDIO1 of router chip U17; 3rd pin of flash storage U19 is connected with 3.3V digital power through resistance R210; 4th pin of flash storage U19 connects digitally; The 5th pin SO/SIO0 of flash storage U19 is connected with the 121st pin SF_SDIO0 of router chip U17; The 6th pin SCLK of flash storage U19 is connected with the 120th pin SF_SCK of router chip U17; The 7th pin NC/SIO3 of flash storage U19 is connected with 3.3V digital power through resistance R212; 3.3V digital power connects after digitally filtering through electric capacity C219 and is connected with the 8th pin VCC of flash storage U19;
As shown in Figure 10, WIFI communication unit 14 comprises PCI connector JP1, resistance R501; Resistance R20, resistance R34, resistance R510, resistance R511, resistance R512, resistance R513, light emitting diode D1, light emitting diode D25, light emitting diode D26, electric capacity C325, electric capacity C326,
The 1st pin WAKE# of PCI connector JP1 is connected with the 2nd pin JTGTMS of router chip U17 through resistance R159, the 2nd pin 3.3V of PCI connector JP1, 24th pin+3.3VAUX and the 52nd pin+3.3V all accesses 3.3V digital power, the 7th pin CLKREQ# of PCI connector JP1 connects digitally through resistance R501, GND_0, 9th pin GND_1, 15th pin GND_2, 18th pin GND_3, 21st pin GND_4, 26th pin GND_5, 27th pin GND_6, 29th pin GND_7, 34th pin GND_8, 35th pin GND_9, 40th pin GND_10, 50th pin GND_11 all connects digitally, the 11st pin REFCLK-of PCI connector JP1 is connected with the 104th pin REFCLKN0 of router chip U17, the 13rd pin REFCLK+ of PCI connector JP1 is connected with the 105th pin REFCLKNP of router chip U17, the 23rd pin PERN0 of PCI connector JP1 is connected with the 106th pin HSIN0 of router chip U17 after electric capacity C325 connects, the 25th pin PERP0 of PCI connector JP1 is connected with the 107th pin HSIP0 of router chip U17 after electric capacity C326 connects, the 31st pin PETN0 of PCI connector JP1 is connected with the 102nd pin HSOP0 of router chip U17 after electric capacity C224 connects, the 33rd pin PETP0 of PCI connector JP1 is connected with the 101st pin HSON0 of router chip U17 after electric capacity C229 connects, the 22nd pin PERST# of PCI connector JP1 is connected with the 124th pin PCIE_RST of router chip U17, the 42nd pin LED_WWAN# of PCI connector JP1 is connected with one end of resistance R20, and the other end of resistance R20 is connected with the negative electrode of light emitting diode D1, and the anode of light emitting diode D1 is connected with 3.3V digital power through resistance R34, the 44th pin LED_WLAN# of PCI connector JP1 is connected with one end of resistance R510, and the other end of resistance R510 is connected with the negative electrode of light emitting diode D25, and the anode of light emitting diode D25 is connected with 3.3V digital power through resistance R511, the 46th pin LED_WPAN# of PCI connector JP1 is connected with one end of resistance R512, and the other end of resistance R512 is connected with the negative electrode of light emitting diode D26, and the anode of light emitting diode D26 is connected with 3.3V digital power through resistance R513,
As shown in figure 11, Ethernet interface unit 15 comprises electric capacity C103, electric capacity C104, electric capacity C105, electric capacity C106, electric capacity C108, electric capacity C109, electric capacity C110, electric capacity C111, electric capacity C112, electric capacity C113, electric capacity C115, electric capacity C116, electric capacity C118, electric capacity C119, electric capacity C120, electric capacity C122, electric capacity C124, electric capacity C126, electric capacity C129, electric capacity C130; Ethernet converter U12, electric capacity C107, Ethernet converter U13, electric capacity C114, electric capacity C117, Ethernet converter U14, electric capacity C121, electric capacity C125; Network joint P11;
The 1st pin RD+ of Ethernet interface U12 connects after digitally filtering through electric capacity C103 and is connected with the 29th pin RXIN4 of router chip U17, the 3rd pin RD-of Ethernet interface U12 connects after digitally filtering through electric capacity C104 and is connected with the 28th pin RXIP4 of router chip U17, the 4th foot meridian capacitor C107 of Ethernet interface U12 connects digitally, the 5th pin TD+ of Ethernet interface U12 connects after digitally filtering through electric capacity C105 and is connected with the 27th pin RXON4 of router chip U17, the 7th pin TD-of Ethernet interface U12 connects after digitally filtering through electric capacity C106 and is connected with the 26th pin RXOP4 of router chip U17, the 10th pin TX+ of Ethernet interface U12 is connected with the pin TX4+ of network interface P11, the 12nd pin TX-of Ethernet interface U12 is connected with the pin TX4-of network interface P11, the 14th pin RX+ of Ethernet interface U12 is connected with the pin RX4+ of network interface P11, the 16th pin RX-of Ethernet interface U12 is connected with the pin RX4-of network interface P11,
The 1st pin RD0-of Ethernet interface U13 connects after digitally filtering through electric capacity C111 and is connected with the 24th pin TDOP3 of router chip U17, the 2nd pin RD0+ of Ethernet interface U13 connects after digitally filtering through electric capacity C110 and is connected with the 23rd pin TDON3 of router chip U17, the 3rd pin CT0 of Ethernet interface U13 connects digitally through electric capacity C114, the 4th pin TD0-of Ethernet interface U13 connects after digitally filtering through electric capacity C109 and is connected with the 22nd pin RDIP3 of router chip U17, the 5th pin TD0+ of Ethernet interface U13 connects after digitally filtering through electric capacity C108 and is connected with the 21st pin IDIN3 of router chip U17, the 19th pin TX3-of Ethernet interface U13 is connected with the pin TX3-of network interface P11, the 20th pin TX3+ of Ethernet interface U13 is connected with the pin TX3+ of network interface P11, the 16th pin RX3-of Ethernet interface U13 is connected with the pin RX3-of network interface P11, the 17th pin RX3+ of Ethernet interface U13 is connected with the pin RX3+ of network interface P11, the 10th pin RD1-of Ethernet interface U13 connects after digitally filtering through electric capacity C116 and is connected with the 15th pin TDOP2 of router chip U17, the 9th pin RD1+ of Ethernet interface U13 connects after digitally filtering through electric capacity C115 and is connected with the 16th pin TDON2 of router chip U17, the 8th pin CT1 of Ethernet interface U13 connects digitally through electric capacity C117, the 7th pin TD1-of Ethernet interface U13 connects after digitally filtering through electric capacity C113 and is connected with the 18th pin RDIP2 of router chip U17, the 6th pin TD1+ of Ethernet interface U13 connects after digitally filtering through electric capacity C112 and is connected with the 19th pin TDIN2 of router chip U17, the 12nd pin TX2-of Ethernet interface U13 is connected with the pin TX2-of network interface P11, the 11st pin TX2+ of Ethernet interface U13 is connected with the pin TX2+ of network interface P11, the 15th pin RX2-of Ethernet interface U13 is connected with the pin RX2-of network interface P11, the 14th pin RX2+ of Ethernet interface U13 is connected with the pin RX2+ of network interface P11
The 1st pin RD0-of Ethernet interface U14 connects after digitally filtering through electric capacity C122 and is connected with the 13rd pin TDOP1 of router chip U17, the 2nd pin RD0+ of Ethernet interface U14 connects after digitally filtering through electric capacity C120 and is connected with the 12nd pin TDON1 of router chip U17, the 3rd pin CT0 of Ethernet interface U14 connects digitally through electric capacity C121, the 4th pin TD0-of Ethernet interface U14 connects after digitally filtering through electric capacity C119 and is connected with the 11st pin RDIP1 of router chip U17, the 5th pin TD0+ of Ethernet interface U14 connects after digitally filtering through electric capacity C118 and is connected with the 10th pin IDIN1 of router chip U17, the 19th pin TX1-of Ethernet interface U14 is connected with the pin TX1-of network interface P11, the 20th pin TX1+ of Ethernet interface U14 is connected with the pin TX1+ of network interface P11, the 16th pin RX1-of Ethernet interface U14 is connected with the pin RX1-of network interface P11, the 17th pin RX1+ of Ethernet interface U14 is connected with the pin RX1+ of network interface P11, the 10th pin RD1-of Ethernet interface U14 connects after digitally filtering through electric capacity C130 and is connected with the 5th pin TDOP0 of router chip U17, the 9th pin RD1+ of Ethernet interface U14 connects after digitally filtering through electric capacity C129 and is connected with the 6th pin TDON0 of router chip U17, the 8th pin CT1 of Ethernet interface U14 connects digitally through electric capacity C125
The 7th pin TD1-of Ethernet interface U14 connects after digitally filtering through electric capacity C126 and is connected with the 7th pin RDIP0 of router chip U17, the 6th pin TD1+ of Ethernet interface U14 connects after digitally filtering through electric capacity C124 and is connected with the 8th pin TDIN0 of router chip U17, the 12nd pin TX0-of Ethernet interface U14 is connected with the pin TX0-of network interface P11, the 11st pin TX0+ of Ethernet interface U14 is connected with the pin TX0+ of network interface P11, the 15th pin RX0-of Ethernet interface U14 is connected with the pin RX0-of network interface P11, the 14th pin RX0+ of Ethernet interface U14 is connected with the pin RX0+ of network interface P11, the pin PGF of network interface P11, pin PGD, pin PGC, pin PGB all connects digitally,
Route indicator unit comprises electric capacity C161, resistance R115, resistance R117, resistance R120, resistance R122, light emitting diode D16, light emitting diode D18, light emitting diode D20, light emitting diode D24;
3.3V digital power connects after digitally filtering through electric capacity C161, respectively with resistance R115, resistance R117, resistance R120, resistance R122 connects, the other end of resistance R115 is connected with the anode of light emitting diode D16, the negative electrode of light emitting diode D16 is connected with the 117th pin LED_PORT0 of router chip U17, the other end of resistance R117 is connected with the anode of light emitting diode D18, the negative electrode of light emitting diode D18 is connected with the 114th pin LED_PORT1 of router chip U17, the other end of resistance R120 is connected with the anode of light emitting diode D20, the negative electrode of light emitting diode D20 is connected with the 115th pin LED_PORT2 of router chip U17, the other end of resistance R122 is connected with the anode of light emitting diode D24, the negative electrode of light emitting diode D24 is connected with the 116th pin LED_PORT4 of router chip U17,
As shown in figure 12, in power supply pipe, unit 12 comprises power supply adaptor J14, step-down controller U25, electric capacity C171, electric capacity C172, electric capacity C177, electric capacity C319, electric capacity C320, electric capacity C317, electric capacity C318, electric capacity C176, electric capacity C160, resistance R496, resistance R498, resistance R497, resistance R499, inductance L 104, inductance L 109, inductance L 937, inductance L 107; Electric capacity C188, electric capacity C189, inductance L 116;
2nd pin of power supply adaptor J14 and the 3rd pin all connect shielding ground, 1st pin access direct supply input, 1st pin is also connected with one end of electric capacity C171 and electric capacity C172 and inductance L 104 respectively, another termination of electric capacity C171 and electric capacity C172 connects shielding ground, the other end out-put supply VIN of inductance L 104, and be connected with the 2nd pin IN of step-down controller U25; One end of inductance L 109 also connects shielding ground, and another termination of inductance L 109 digitally; 4th pin of step-down controller connects digitally, and the 6th pin connects in analog; The positive pole of electric capacity C177, electric capacity C319, electric capacity C320 is all connected with power supply VIN, and the negative pole of electric capacity C177, electric capacity C319, electric capacity C320 all connects digitally; The two ends of resistance R498 are connected with the 1st pin PG of step-down chip U25 and the 2nd pin IN respectively; The two ends of resistance R496 are connected with the 8th pin EN of step-down chip U25 and the 2nd pin IN respectively; The two ends of inductance L 937 are connected with the 3rd pin SW of step-down chip U25 and the 5th pin OUT respectively, and the two ends of resistance R497 are connected with the 5th pin OUT of step-down chip U25 and the 7th pin FB respectively; One end of resistance R499 is connected with the 7th pin FB of step-down chip U25, and another termination in analog; The positive pole of electric capacity C317, electric capacity C318, electric capacity C176 is all connected with the 5th pin OUT of step-down chip U25, and the negative pole of electric capacity C317, electric capacity C318, electric capacity C176 all connects digitally; One end of inductance L 107 is connected with the positive pole of electric capacity C176, and the other end connects after digitally filtering through electric capacity and exports 3.3V digital power;
As shown in figure 13, Z-wave wireless communication unit 17 comprises Z-Wave chip U26, electric capacity C321, electric capacity C322, electric capacity C330, electric capacity C329, electric capacity C331, electric capacity C327, electric capacity C328, antenna H10, resistance R503, resistance R504, resistance R505, resistance R506, resistance R507, switch JP3, resistance R508, resistance R509, electric capacity C324.
The 1st pin GND1 of Z-Wave chip U26, the 6th pin GND2, the 12nd pin GND3, the 17th pin GND4, the 18th pin GND5 all connect in analog; The 2nd pin RESET_N of Z-Wave chip U26 is connected with the 118th pin GPIOB5 of router chip U17; 3.3V digital power connects respectively after filtering in analog through electric capacity C321 and electric capacity C322 and is connected with the 11st pin VCC of Z-Wave chip U26; 19th pin of Z-Wave chip U26 is connected with the positive pole of electric capacity C329, and the positive pole of electric capacity C330 is connected with the positive pole of electric capacity C329, and the negative pole of electric capacity C330 connects in analog, and the positive pole of electric capacity C331 is connected with the negative pole of electric capacity C329, and the negative pole of electric capacity C331 connects in analog; The negative pole of electric capacity C327 is all connected with the negative pole of electric capacity C329 with the negative pole of electric capacity C328, and the positive pole of electric capacity C327 is all connected with antenna JMA with the positive pole of electric capacity C328; The 15th pin TXD of Z-Wave chip U26 is connected with the 126th pin U0_RX of router chip U17, and the 10th pin RXD of Z-Wave chip U26 is connected with the 125th pin U0_TX of router chip U17;
One end of resistance R503, resistance R504, resistance R505, resistance R506 and resistance R507 connects mutually, the other end of resistance R503 is connected with 3.3V digital power, the other end of resistance R504 is connected with the 15th pin TXD of Z-Wave chip U26, the other end of resistance R505 is connected with the 8th pin of connector, the other end of resistance R506 is connected with the 14th pin ZEROX of Z-Wave chip U26, and another termination of resistance R507 in analog;
The one termination 3.3V digital power of resistance R508, the other end is connected with the positive pole of electric capacity C324, the negative pole of electric capacity C324 connects in analog, and the positive pole of electric capacity C324 connects in analog through switch, and the positive pole of electric capacity C324 is also connected with the 3rd pin INT1 of Z-Wave chip U26 after resistance R509 connects;
As shown in figure 14, z-wave storage unit 16 comprises flash storage U27, electric capacity C323, resistance R502.
1st pin CS of flash storage is connected with 3.3V digital power through resistance R502 pull-up, is also connected with the 5th pin P1.5 of Z-Wave chip U26; 2nd pin SO of flash storage is connected with the 7th pin MISO of Z-Wave chip U26,5th pin SI of flash storage is connected with the 9th pin MOSI of Z-Wave chip U26,6th pin SCK of flash storage is connected with the 8th pin SCK of Z-Wave chip U26,4th pin GND of flash storage connects in analog, and 3.3V digital power to connect after filtering in analog through electric capacity C323 and is connected with the 3rd pin WP, the 7th pin HOLD of flash storage and the 8th pin VCC respectively;
As shown in figure 15, SPI interface unit 18 comprises DLL (dynamic link library) JP2, connector JP9.
The 1st pin P1 of DLL (dynamic link library) JP2 connects 3.3V digital power, the 2nd pin P2 of DLL (dynamic link library) JP2 is connected with the 16th pin VPP of Z-Wave chip U26, the 4th pin P4 of DLL (dynamic link library) JP2 is connected with the 9th pin MOSI of Z-Wave chip U26, the 6th pin P6 of DLL (dynamic link library) JP2 is connected with the 7th pin MISO of Z-Wave chip U26, the 8th pin P8 of DLL (dynamic link library) JP2 is connected with the 8th pin SCK of Z-Wave chip U26, the 10th pin P10 of DLL (dynamic link library) JP2 is connected with the 2nd pin RESET_N of Z-Wave chip U26, the 9th pin P9 of the 7th pin P7 DLL (dynamic link library) JP2 of DLL (dynamic link library) JP2 all connects in analog,
1st pin of connector JP9 connects 3.3V digital power, 2nd pin of connector JP9 connects in analog, 3rd pin of connector JP9 is connected with the 14th pin ZEROX of Z-Wave chip U26,4th pin of connector JP9 is connected with the 4th pin PWM of Z-Wave chip U26,5th pin of connector JP9 is connected with the 13rd pin TRIAC of Z-Wave chip U26, and the 6th pin of connector JP9 is connected with the 5th pin P1.5 of Z-Wave chip U26.
As shown in figure 16, a kind of Smart Home signal amplification circuit, comprises power module, z-wave signal processing module, signal amplification module, flash memory module, data input module.
Described data input module connects z-wave signal processing module, described z-wave signal processing module is connected with data input module, signal amplification module respectively, z-wave signal processing module receives the signal of data input module, signal amplification module is outputted to after identifying processing, signal amplification module carries out amplifying and sends through antenna, described power module is connected with z-wave signal processing module, signal amplification module, data input module respectively, in order to power supply.
Wherein, also comprise flash memory module, as shown in figure 21, flash memory module is connected with z-wave signal processing module, in order to buffer memory z-wave signal processing module data.
Wherein, as shown in figure 17, described data input module comprises data-interface J1, described data-interface J1 is provided with 12 pin, be provided with the 3rd pin of electric capacity C1 Parallel Data interface J1, the 9th pin, one termination of electric capacity C1 connection data interface J1 the 3rd pin digitally, be provided with the 3rd pin, the 9th pin of electric capacity C2 two ends difference series inductance L2, the rear Parallel Data interface J1 of inductance L 1, one end that electric capacity C2 connects inductance L 1 connects power supply, in analog, other pin of described data-interface J1 connect z-wave signal processing module to another termination respectively.
Wherein, described data input module also comprises usb interface, and described usb interface is provided with 6 pin, and the 1st pin, the 2nd pin, the 3rd pin connect z-wave signal processing module, and the 4th pin, the 5th pin, the 6th pin connect in analog.
Wherein, described power module comprises voltage-regulating circuit, as shown in figure 23, described voltage-regulating circuit changes 5V supply voltage into DVDD3.3V supply voltage, and described voltage-regulating circuit exports DVDD3.3V voltage respectively to z-wave signal processing module, signal amplification module, flash memory module.
Wherein, described power module also comprises electric source filter circuit, and described electric source filter circuit changes DVDD3.3V voltage into AVDD3.3V voltage, and described electric source filter circuit exports AVDD3.3V voltage to z-wave signal processing module.
Wherein, as shown in figure 19, described Smart Home signal amplification circuit also comprises interrupt circuit, described interrupt circuit comprises interrupt switch SW1, resistance R1, resistance R4, electric capacity C3, interrupt switch is provided with 4 pin, connects DVDD3.3V voltage after the 1st pin resistance in series R1, connects z-wave signal processing module after the 1st pin resistance in series R4,2nd pin connects in analog, the 1st pin, the 2nd pin of described electric capacity C3 interrupt switch in parallel.
A kind of intelligent domestic system based on Smart Home signal amplification circuit, signal amplification circuit, warning system, main control system, supervisory system, household electric appliance control equipment, lamp dimmer, described signal amplification circuit and described warning system, main control system, supervisory system, household electric appliance control equipment, lamp dimmer respectively electric signal are connected.
The signal amplification circuit of a kind of Smart Home of the present invention, the child node signal that can effectively realize in Z-WAVE network amplifies, the Signal transmissions of convenient child node and child node or main control system and child node.
Described Z-WAVE signal processing module uses ZM4101 chip, and described signal amplification module uses SE2435L microarray biochip.
Described signal amplification circuit comprises data input module, ZM4101 chip, flash memory module, interrupt circuit, power module.Described power module comprises power module voltage-regulating circuit, power transfer module, and data input module comprises data-interface J1, usb interface J2.
As shown in figure 23, voltage-regulating circuit comprises voltage regulator module U3, electric capacity C11, electric capacity C12, electric capacity C13, electric capacity C14, electric capacity C15, electric capacity C16, electric capacity C17, resistance R8, resistance R9.Voltage regulator module is provided with pin VIN, the 2nd pin GND, the 3rd pin #SHDN, the 4th pin BP, the 5th pin VOUT, 1st pin through resistance in series R9 connect the 3rd pin #SHDN, the 1st pin VIN through and be connected with the power supply of 5V after connection electric capacity C11 in analog, electric capacity C12 voltage regulation filtering.2nd pin GND connects in analog, connects in analog after the 3rd pin #SHDN series capacitance C16.4th pin BP connects the 5th pin VOUT through resistance R8, the electric capacity C13 of parallel connection, and the 4th pipe foot meridian capacitor C17 connects in analog.5th pin VOUT series capacitance C14, electric capacity C15 connect in analog, meanwhile, and the 5th pin VOUT out-put supply DVDD.
As shown in figure 18, power transfer module comprises electric capacity C5, electric capacity C6, electric capacity C7, electric capacity C8, electric capacity C9, electric capacity C10, inductance L 3.The power supply DVDD of input end is connected the two ends of inductance L 3 with the power supply AVDD of output terminal, and power supply DVDD is also connected with the electric capacity C5, the electric capacity C6 that also connect in analog, electric capacity C7, and power supply AVDD is connected with the electric capacity C8, the electric capacity C9 that also connect in analog, electric capacity C10.
Described Z-WAVE signal processing module uses ZM4101 chip, and described signal amplification module uses SE2435L microarray biochip.
As shown in figure 22, described Z-WAVE signal processing module uses ZM4101 chip to be provided with 56 pins, and wherein the 1st pin GND, the 4th pin GND, the 7th pin GND, the 10th pin GND, the 13rd pin GND, the 14th pin GND, the 21st pin GND, the 22nd pin GND, the 24th pin GND, the 25th pin GND, the 30th pin GND, the 35th pin GND, the 40th pin GND, the 45th pin GND, the 50th pin GND, the 55th pin GND connect in analog.
ZM4101 chip arranges the 26th pin P0.0/KEYPAD, 27th pin P0.1/KEYPAD, 28th pin P0.2/KEYPAD, 29th pin P0.3/KEYPAD, 31st pin P0.4/KEYPAD, 32nd pin P0.5/KEYPAD, 33rd pin P0.6/KEYPAD, 34th pin P0.7/KEYPAD, 36th pin P1.0/INT0/KEYPAD, 37th pin P1.1/INT1/KEYPAD, 38th pin P1.2/KEYPAD, 39th pin P1.3/KEYPAD, 41st pin P1.4/KEYPAD, 42nd pin P1.5/KEYPAD, 43rd pin P1.6/KEYPAD, 44th pin P1.7/KEYPAD.
ZM4101 chip arranges the 5th pin AVDD connecting power supply DVDD, the 6th pin DVDD, the 8th pin RESET, the 9th pin TEST_N, the 11st pin QCS_Q1, the 12nd pin QSC_Q2, the 23rd pin RIFO, the 56th pin VPP that connect power supply AVDD.
ZM4101 chip is also provided with the 2nd pin USB_DM, 3rd pin USB_DP, 15th pin P3.7/PWM/ADC3/ZEREX/KEYAD, 16th pin P3.6/IRTX2/ADC2/TRIAC/KEYAD, 17th pin P3.5/IRTX1/ADC1/KEYAD, 18th pin P3.4/IRTX0/ADC0/KEYAD, 19th pin P3.1/IRRX/TXD1/KEYAD, 20th pin P3.0/SS0_N/RXD1/KEYAD, 46th pin P2.7/SCK0, 47th pin P2.6/MISO0, 48th pin P2.5/MOSI0, 49th pin P2.4/SCK1, 51st pin P2.3/MISO1, 52nd pin P2.2/MOSI1, 53rd pin P2.1/TXD0, 54th pin P2.0/RXD0.
Interface circuit comprises interface J1, electric capacity C1, electric capacity C2, inductance L 1, inductance L 2, interface J1 establishes 12 pins, 1st pin connects ZM4101 chip the 15th pin P3.7/PWM/ADC3/ZEREX/KEYAD, 6th pin connects the 16th pin P3.6/IRTX2/ADC2/TRIAC/KEYAD of ZM4101 chip, 8th pin connects the 17th pin P3.5/IRTX1/ADC1/KEYAD of ZM4101 chip, 10th pin connects the 18th pin P3.4/IRTX0/ADC0/KEYAD of ZM4101 chip, 11st pin connects the 20th pin P3.0/SS0_N/RXD1/KEYAD of ZM4101 chip.2nd pin connects the 53rd pin P2.1/TXD0 of ZM4101 chip, and the 4th pin connects the 54th pin P2.0/RXD0 of ZM4101 chip.3rd pin connects digitally, and the 3rd pin also connects one end of electric capacity C1, inductance L 2.9th pin of the other end connecting interface J1 of electric capacity C1, electric capacity C1 connects one end of inductance L 1, and the other end of inductance L 1 connects 5V power supply on the one hand, and series inductance C2 connects in analog on the other hand, and the other end of inductance L 2 connects in analog on the one hand.5th pin connects ZM4101 chip the 3rd pin USB_DP, and the 7th pin connects ZM4101 chip the 2nd pin USB_DM.12nd pin connects the 8th pin RESET of ZM4101 chip.
Interface J2 is provided with the 1st pin VCC, the 2nd pin DATA-, the 3rd pin DATA+, the 4th pin GND, the 5th pin GND, the 6th pin GND, 1st pin VCC connects 5V power supply, 2nd pin DATA-connects ZM4101 chip the 2nd pin USB_DM, 3rd pin DATA+ connects ZM4101 chip the 3rd pin USB_DP, and the 4th pin GND, the 5th pin GND, the 6th pin GND connect digitally.
Anneta module comprises antenna ANT1, antenna ANT2, chip U6.
As shown in figure 19, described signal amplification module uses SE2435L microarray biochip to be provided with the 1st pin CSD, 2nd pin PA_IN, 3rd pin CPS, 4th pin CTX, 5th pin X_FLT, 6th pin TR, 7th pin ANT_SEL, 8th pin GND, 9th pin LAN_IN, 10th pin NC1, 11st pin RX_FLT, 12nd pin ANT2, 13rd pin NC2, 14th pin TANT1, 15th pin NC3, 16th pin TX_IN, 17th pin NC4, 18th pin NC5, 19th pin NC6, 20th pin PA_OUT, 21st pin VCC2, 22nd pin NC7, 23rd pin VCC0, 24th pin VCC1, 25th pin EPAD.
1st pin CSD connects the 39th pin P1.3/KEYPAD of ZM4101 chip, and the 3rd pin CPS connects the 41st pin P1.4/KEYPAD of ZM4101 chip, and the 4th pin CTX connects the 42nd pin P1.5/KEYPAD of ZM4101 chip.2nd pin PA_IN resistance in series R21 connects in analog, and the 5th pin X_FLT resistance in series R18 connects in analog, and the 2nd pin PA_IN resistance in series R15 is connected with the 5th pin X_FLT.6th pin TR connects the 23rd pin RIFO of ZM4101 chip.7th pin ANT_SEL connects in analog through resistance in series R23, and the 7th pin ANT_SEL also connects the 43rd pin P1.6/KEYPAD of ZM4101 chip through resistance in series R29.8th pin GND, the 25th pin EPAD connect in analog.9th pin LAN_IN connects the 11st pin RX_FLT through resistance in series R25.12nd pin ANT2 connects antenna ANT2, and the 14th pin TANT1 connects antenna ANT1, and the 16th pin TX_IN connects in analog through series capacitance C19, and the 20th pin PA_OUT connects in analog through series capacitance C18.21st pin VCC2, the 22nd pin NC7, the 23rd pin VCC0, the 24th pin VCC1 connect power supply DVDD.
Chip U6 is provided with the 1st pin IN connecting SE2435L chip the 9th pin LAN_IN, the 3rd pin OUT connecting SE2435L chip the 11st pin RX_FLT, the 2nd pin GND on connecting analog ground, the 4th pin GND on connecting analog ground.
As shown in figure 24, antenna ANT1 is provided with antenna L5, connector CON2, resistance R13, resistance R14, resistance R16, resistance R17, resistance R19, resistance R20, resistance R22, resistance R27, resistance R28, chip U5.Connector CON2 is provided with the 1st pin of contact resistance R14 one end, and be provided with the 4th pin, the 5th pin that connect inductance L 5 two ends respectively, the 2nd pin connects in analog, connects in analog after the 3rd pin resistance in series R22.The 14th pin TANT1 of SE2435L chip is connected after the other end resistance in series R13 of resistance R14.One end be connected with connector CON2 of resistance R14 also connects the resistance R20 connect in analog, and the other end of resistance R14 meets resistance R19 in analog.The other end series connection resistance R16 in analog of one end series connection that resistance R13 is connected with resistance R14 resistance R17 in analog, resistance R13.
Chip U5 is provided with the 1st pin IN, the 2nd pin GND, the 3rd pin OUT, the 4th pin GND, one end that after the 1st pin resistance in series R27, contact resistance R13 is connected with the 14th pin TANT1 of SE2435L chip.The other end of the 3rd pin OUT contact resistance R13.2nd pin GND, the 4th pin GND connecting analog ground.
As shown in figure 21, flash memory module comprises flash chip U1, resistance R2, resistance R3, resistance R5, resistance R6, resistance R7, electric capacity C4.Flash chip U1 is provided with the 1st pin CS, the 2nd pin SO, the 3rd pin WP, the 4th pin GND, the 5th pin SI, the 6th pin SCK, the 7th pin HOLD, the 8th pin VCC.Connect power supply DVDD after 1st pin CS resistance in series R2, one end of the 1st pin CS also contact resistance R5, the other end of resistance R5 connects the 48th pin P2.5/MOSI0 of ZM4101 chip.The 51st pin P2.3/MISO1 of ZM4101 chip is connected after 2nd pin resistance in series R3.3rd pin WP connects the 7th pin HOLD, and the 3rd pin is series capacitance C4 connecting analog ground more also.4th pin GND connecting analog ground.The 52nd pin P2.2/MOSI1 of ZM4101 chip is connected after 5th pin SI resistance in series R6.The 49th pin P2.4/SCK1 of ZM4101 chip is connected after 6th pin SCK resistance in series R7.8th pin VCC connects power supply DVDD.
As shown in figure 20, interrupt circuit comprises interrupt switch SW1, resistance R1, resistance R4, electric capacity C3, interrupt switch is provided with and connects the 1st pin, the 2nd pin, power supply DVDD is connected after 1st pin resistance in series R1, first pin also connects the 37th pin P1.1/INT1/KEYPAD of ZM4101 chip after resistance in series R4,2nd pin connects in analog, and interrupt switch SW1 is also parallel with electric capacity C3.
The above, be only the present invention's preferably embodiment, but protection scope of the present invention is not limited thereto, and protection scope of the present invention should be as the criterion with the protection domain of claim.

Claims (10)

1. for a door magnetic control system for Smart Home, it is characterized in that: described door magnetic control system comprises:
Signal acquisition circuit, gathers door and window opening and closing information, and is sent to a magnetic chip;
Door magnetic chip, for the treatment of the opening and closing information of signal acquisition circuit, judges door and window opening and closing information, triggers or removes warning system, door magnetic control signal door and window opening and closing information being sent by communication module and receive for the treatment of communication module;
Communication module, for being sent to z-wave network-based control main frame by door and window opening and closing information and accepting the door magnetic control signal of z-wave network-based control main frame;
Power module, for powering to signal acquisition circuit, communication module, door magnetic chip.
2. a kind of door magnetic for Smart Home as claimed in claim 1, is characterized in that: described signal acquisition circuit comprises the first switch, second switch, the 3rd switch,
First switch is used for control signal Acquisition Circuit and is connected with door magnetic chip or disconnects;
Second switch is used for control signal Acquisition Circuit and sends alerting signal to door magnetic chip;
3rd switch is used for control signal Acquisition Circuit and sends opening of doors and windows or door and window closure signal to door magnetic chip.
3. a kind of door magnetic for Smart Home as claimed in claim 2, it is characterized in that, described signal acquisition circuit comprises XOR gate integrated circuit, electric capacity C10, electric capacity C15, electric capacity C16, electric capacity C17, electric capacity C18, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, resistance R9, resistance R11, the first switch, second switch, the 3rd switch;
Described XOR gate integrated circuit U5 the 2nd pin, the 7th pin, the 12nd pin, the 13rd pin connect digitally; 3rd pin connects the 4th pin, and the 6th pin connects the 9th pin;
8th pin contact resistance R5, the 3rd pin of connection door magnetic chip U1 after connecing electric capacity C18 filtering digitally; 14th pin is through connecing electric capacity C10 out-put supply digitally;
First switch one end ground connection, the first switch other end connects one end of electric capacity C15 one end, resistance R7 one end, resistance R4, another termination of electric capacity C15 digitally, the other end of resistance R7 connects power supply, the 10th pin of other end connection door magnetic chip U1 of resistance R4, the 1st pin 1A of XOR gate integrated circuit U5;
Second switch one end ground connection, the other end connects electric capacity C17 one end, resistance R9 one end, resistance R11 one end, the other end ground connection of electric capacity C17, the other end of resistance R9 connects power supply, the 15th pin of other end connection door magnetic chip U1 of resistance R11, the 10th pin 3B of XOR gate integrated circuit U5;
3rd switch one end ground connection, the other end connects electric capacity C16 one end, resistance R8 one end, resistance R6 one end, the other end ground connection of electric capacity C16, another termination of resistance R8, resistance R7 one end, resistance R9 one end, power supply, the 13rd pin of other end connection door magnetic chip U1 of resistance R6, the 5th pin of XOR gate integrated circuit U5.
4. a kind of door magnetic control system for Smart Home according to claim 1, it is characterized in that: also comprise warning system, host computer, main control system, supervisory system, described host computer is connected with warning system, supervisory system, door magnetic control system by main control system.
5. a kind of door magnetic control system for Smart Home according to claim 1, it is characterized in that: described main control system, door magnetic control system, supervisory system, warning system form Z_Wave network by communication module, described main control system is connected with described host computer, for the control command of host computer is sent to supervisory system, door magnetic control system, warning system, for the duty of door magnetic control system, warning system, supervisory system being sent to host computer display.
6. a kind of door magnetic control system for Smart Home according to claim 5, is characterized in that: described host computer is set to smart mobile phone, panel computer and PC.
7. a control method for a kind of door magnetic control system for Smart Home as described in claim 1 to 6, is characterized in that:
The door and window opening and closing information collected is sent to a magnetic chip by step one, signal acquisition circuit,
Step 2, door magnetic chip accept and process door and window opening and closing information, judge that door and window opening and closing information belongs to normal and opens or unnormal unlocking;
Step 3, when door and window opening and closing information belong to normally open time, door and window opening and closing information is sent to main control system through communication module
Step 4, when door and window opening and closing information belongs to unnormal unlocking, door magnetic opening and closing information is sent to main control system through communication module by door magnetic chip, and sends open command to supervisory system and warning system.
Step 5, main control system receives door and window opening and closing information, and shows.
8. the control method of a kind of door magnetic control system for Smart Home according to claim 7, is characterized in that: in described step 2, and the door and window opening and closing information that in signal acquisition circuit, the 3rd switch sends is unnormal unlocking.
9. the control method of a kind of door magnetic control system for Smart Home according to claim 7, is characterized in that: described step 5 also comprises.Door and window opening and closing information is sent to handheld terminal or PC display by main control system.
10. the control method of a kind of door magnetic control system for Smart Home according to claim 7, is characterized in that: in described step 4, after supervisory system starts, the video information of shooting and audio-frequency information is sent to main control system and stores.
CN201510194190.XA 2015-04-22 2015-04-22 A kind of door sensor control system for smart home CN104821053B (en)

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