CN104813390A

CN104813390A - Method and system for driving an active matrix display circuit

Info

Publication number: CN104813390A
Application number: CN201380060382.0A
Authority: CN
Inventors: 阿罗基亚·内森; 戈尔拉玛瑞扎·恰吉
Original assignee: Ignis Innovation Inc
Current assignee: Ignis Innovation Inc
Priority date: 2012-10-11
Filing date: 2013-10-02
Publication date: 2015-07-29
Anticipated expiration: 2033-10-02
Also published as: EP2907128A1; CN104813390B; EP2907128A4; WO2014057397A1

Abstract

A method and system for driving an active matrix display is provided. The system includes a drive circuit for a pixel having a light emitting device. The drive circuit includes a drive transistor for driving the light emitting device. The system includes a mechanism for adjusting the gate voltage of the drive transistor.

Description

For driving the system and method for active matrix display circuit

Technical field

The present invention relates to luminescent device, more specifically, relate to the system and method that the image element circuit with luminescent device is driven.

Background technology

Electroluminescent display is widely used in the plurality of devices such as such as mobile phone by developing.Especially, have amorphous silicon (a-Si), polysilicon, organic or other drive active matrix organic light-emitting diode (AMOLED) display of backboard because its feasible Flexible Displays, low manufacturing cost, high resolving power and wide viewing angle etc. advantage and become more noticeable.

The backplane electronics circuit that displayer comprises the row of pixel and the array of row and is arranged in the array of described row and row, each pixel has Organic Light Emitting Diode (OLED).Because OLED is current drive-type device, the image element circuit of AMOLED should provide accurate and constant drive current.

Need to provide following system and method: described system and method can provide has high-precision constant luminance, and the aging effect of image element circuit and the instability of backboard and luminescent device can be reduced.

Summary of the invention

The object of this invention is to provide the method and system eliminating or relaxed at least one inferior position in the above-mentioned inferior position of existing system.

According to an aspect of the present invention, propose a kind of system, display system, it comprises the driving circuit used of the pixel with luminescent device.Described driving circuit comprises the driving transistors being connected to described luminescent device.Driving transistors comprises gate terminal, the first terminal and the second terminal.Driving circuit comprises the first transistor with gate terminal, the first terminal and the second terminal, the gate terminal of the first transistor is connected to selection line, and the first terminal of the first transistor is connected to data line and the second connecting terminals of the first transistor is connected to the gate terminal of driving transistors.Driving circuit comprises the circuit for regulating the grid voltage of driving transistors, described circuit for regulating comprises the discharge transistor with gate terminal, the first terminal and the second terminal, the gate terminal of discharge transistor is connected to the gate terminal of driving transistors at Nodes, discharged by the voltage of discharge transistor to described node.Driving circuit comprises the holding capacitor with the first terminal and the second terminal, and the first terminal of holding capacitor is connected to the gate terminal of driving transistors at described Nodes.

Described display system can comprise array of display and for driving the driver of array of display, array of display has the multiple image element circuits arranged in the mode of ranks, and each image element circuit comprises driving circuit.The gate terminal of transistor seconds is connected to offset line.Offset line can be shared by more than in multiple image element circuit image element circuit.

According to a further aspect of the invention, a kind of method for display system is proposed.Described display system comprises for every a line provides the driver of programming cycle, compensation cycle and drive cycle.Said method comprising the steps of: in the programming cycle of the first row, select the address wire of the first row and programming data is supplied to the first row; At the compensation cycle of the first row, select to be used for the neighbor address line of second row adjacent with the first row and forbid the address wire of the first row; And at the drive cycle of the first row, forbid described neighbor address line.

According to a further aspect of the invention, propose a kind of display system, it comprises one or more image element circuits, and each image element circuit comprises luminescent device and driving circuit.Driving circuit comprises the driving transistors with gate terminal, the first terminal and the second terminal, and driving transistors is between described luminescent device and the first power supply.Described driving circuit comprises the switching transistor with gate terminal, the first terminal and the second terminal, and the gate terminal of switching transistor is connected to the first address wire, the first terminal of switching transistor is connected to data line and the second connecting terminals of switching transistor is connected to the gate terminal of driving transistors.Driving circuit comprises the circuit for regulating the grid voltage of driving transistors, described circuit for regulating comprises sensor and discharge transistor, described sensor is for sensing the energy transferring from described image element circuit, described sensor has the first terminal and the second terminal, the characteristic of described sensor changes according to sensing outcome, described discharge transistor has gate terminal, the first terminal and the second terminal, the gate terminal of described discharge transistor is connected to the second address wire, the first terminal of described discharge transistor is connected to the gate terminal of driving transistors and the second connecting terminals of described discharge transistor is connected to the first terminal of described sensor at Nodes.Described driving circuit comprises the holding capacitor with the first terminal and the second terminal, and the first terminal of holding capacitor is connected to the gate terminal of driving transistors at described Nodes.

According to a further aspect of the invention, propose a kind of method for display system, described method comprises the step implementing to compensate in pixel.

According to a further aspect of the invention, propose a kind of method for display system, described method comprises the step implementing to compensate in panel.

According to a further aspect of the invention, propose a kind of method for display system, described system comprises the image element circuit with sensor, and described method comprises the aging step of reading back to sensor.

According to a further aspect of the invention, propose a kind of display system, it comprises: array of display, and described array of display comprises the multiple image element circuits arranged in the mode of ranks, and each image element circuit comprises luminescent device and driving circuit; With the drive system for driving array of display.Described driving circuit comprises the driving transistors with gate terminal, the first terminal and the second terminal, and described driving transistors is between described luminescent device and the first power supply.Described driving circuit comprises the first transistor with gate terminal, the first terminal and the second terminal, the gate terminal of described the first transistor is connected to address wire, and the first terminal of described the first transistor is connected to data line and the second connecting terminals of described the first transistor is connected to the gate terminal of described driving transistors.Described driving circuit comprises the circuit for regulating the voltage of described driving transistors, described circuit for regulating comprises transistor seconds, described transistor seconds has gate terminal, the first terminal and the second terminal, the gate terminal of described transistor seconds is connected to control line, and the first terminal of described transistor seconds is connected to the gate terminal of described driving transistors.Described driving circuit comprises the holding capacitor with the first terminal and the second terminal, and the first terminal of described holding capacitor is connected to the gate terminal of described driving transistors.Image element circuit described in described drive systems is disconnected in a part of frame time to make described image element circuit.

According to a further aspect of the invention, a kind of method of the display system for having array of display and drive system is proposed.Described drive system provides the frame time with programming cycle, discharge cycle, light period, reset cycle and relaxaton period for every a line.Said method comprising the steps of: in programming cycle, programmed by the image element circuit of address wire to this row started for row; At discharge cycle, by making invalid for capable address wire and starting for capable control line, the voltage on the gate terminal of driving transistors is partly discharged; At light period, make the control line for row invalid, and control luminescent device by described driving transistors; In the reset cycle, discharged by the voltage started on the gate terminal of driving transistors described in the control pair for row; And at relaxaton period, make the control line for row invalid.

Accompanying drawing explanation

From reference the description of the drawings below, these and other feature of the present invention will become more obvious.

Fig. 1 illustrates the example of the image element circuit of the pixel drive scheme applied according to the embodiment of the present invention.

Fig. 2 illustrates another example of the image element circuit of the driving circuit with Fig. 1.

Fig. 3 is the sequential chart of the example of the driving method of image element circuit according to the embodiment of the present invention.

Fig. 4 illustrates the example of the display system of the driving circuit of Fig. 1 and Fig. 2.

Fig. 5 illustrates the example of the image element circuit applying pixel drive scheme in accordance with another embodiment of the present invention.

Fig. 6 illustrates another example of the driving circuit of Fig. 5.

Fig. 7 illustrates another example of the driving circuit of Fig. 5.

Fig. 8 illustrates another example of the image element circuit of the driving circuit with Fig. 5.

Fig. 9 is the sequential chart of the example of the driving method of image element circuit in accordance with another embodiment of the present invention.

Figure 10 illustrates the example of the display system of the driving circuit for Fig. 5 and Fig. 8.

Figure 11 illustrates the example of the display system of the driving circuit for Fig. 6 and Fig. 7.

Figure 12 be a diagram that the curve map of the simulation result of the image element circuit of Fig. 1.

Figure 13 illustrates the example of the image element circuit of the pixel drive scheme applied according to another embodiment of the present invention.

Figure 14 illustrates another example of the image element circuit of the driving circuit with Figure 13.

Figure 15 is the sequential chart of the example of the driving method of image element circuit according to another embodiment of the present invention.

Figure 16 illustrates the example of the display system of the driving circuit for Figure 13 and Figure 14.

Figure 17 be a diagram that the curve map of the simulation result of the image element circuit of Fig. 5.

Figure 18 be a diagram that the curve map of the simulation result of the image element circuit of Fig. 5.

Figure 19 is the sequential chart of the operation of the display system of Figure 16.

Figure 20 illustrates the example of the image element circuit of the pixel drive scheme applied according to another embodiment of the present invention.

Figure 21 illustrates another example of the image element circuit of the driving circuit with Figure 20.

Figure 22 be a diagram that the sequential chart of the example of the driving method of the image element circuit according to another embodiment of the present invention.

Figure 23 illustrates the example of the display system of the driving circuit for Figure 20 and Figure 21.

Figure 24 illustrates another example of the display system of the driving circuit for Figure 20 and Figure 21.

Figure 25 illustrates the example of the pixel system according to the embodiment of the present invention.

Figure 26 illustrates the example of the display system of the circuit that reads back with Figure 25.

Figure 27 illustrates another example of the display system of the circuit that reads back with Figure 25.

Figure 28 be a diagram that the sequential chart of the example of the driving method of the image element circuit according to another embodiment of the present invention.

Figure 29 illustrates the example of the aging extracting method of the sensor of Figure 25.

Figure 30 illustrates the example of pixel system in accordance with another embodiment of the present invention.

Figure 31 illustrates the example of the display system of the circuit that reads back with Figure 30.

Figure 32 illustrates another example of the display system of the circuit that reads back with Figure 30.

Figure 33 be a diagram that the sequential chart of the example of the driving method of the image element circuit according to another embodiment of the present invention.

Figure 34 be a diagram that the sequential chart of another example of the aging extracting method of the sensor of Figure 30.

Figure 35 be a diagram that the example of the image element circuit of the pixel drive scheme applied according to another embodiment of the present invention.

Figure 36 is the sequential chart of the example of the driving method of image element circuit according to another embodiment of the present invention.

Figure 37 illustrates the example of the display system of the image element circuit with Figure 35.

Figure 38 illustrates another example of the display system of the image element circuit with Figure 35.

Figure 39 illustrates the example of the image element circuit applying pixel drive scheme in accordance with another embodiment of the present invention.

Figure 40 illustrates the example of the image element circuit of the pixel drive scheme applied according to another embodiment of the present invention.

Figure 41 illustrates the example of the image element circuit applying pixel drive scheme in accordance with another embodiment of the present invention.

Embodiment

Fig. 1 illustrates the example of the image element circuit of the pixel drive scheme applied according to the embodiment of the present invention.The image element circuit 100 of Fig. 1 comprises OLED 102 and the driving circuit 104 for driving OLED 102.Driving circuit 104 comprises driving transistors 106, discharge transistor 108, switching transistor 110 and holding capacitor 112.OLED 102 such as comprises anode, negative electrode and luminescent layer between the anode and the cathode.

In the following description, " image element circuit " and " pixel " is used interchangeably.In the following description, can use interchangeably " signal " and " circuit ".In the following description, term " circuit " and " node " can be used interchangeably.In explanation, term " selection line " and " address wire " can be used interchangeably.In the following description, can use interchangeably " connecting (or being connected) " and " engaging (or engaged) ", and they can be used for showing physical contact or the electrical contact directly or indirectly each other of two or more element.

In one example, transistor 106,108 and 110 is n-type transistor.In another example, transistor 106,108 and 110 is p-type transistor, or the combination of n-type transistor and p-type transistor.In one example, transistor 106,108 and 110 includes gate terminal, source terminal and drain terminal.

Transistor 106,108 and 110 can use amorphous silicon, nanometer/microcrystal silicon, polysilicon, organic semiconductor technologies (such as, organic tft), NMOS/PMOS technology or CMOS technology (such as, MOSFET) to manufacture.

Driving transistors 106 is arranged between voltage supply line VDD and OLED 102.A connecting terminals of driving transistors 106 is connected to VDD.Another connecting terminals of driving transistors 106 is connected to an electrode (such as, anode electrode) of OLED 102.A terminal of discharge transistor 108 and the gate terminal of discharge transistor 108 are connected to the gate terminal of driving transistors 106 at node A1 place.Another connecting terminals of discharge transistor 108 is connected to OLED 102.The gate terminal of switching transistor 110 is connected to selects line SEL.A connecting terminals of switching transistor 110 is connected to data line VDATA.Another connecting terminals of switching transistor 110 is connected to node A1.A connecting terminals of holding capacitor 112 is connected to node A1.Another connecting terminals of holding capacitor 112 is connected to OLED 102.Another electrode (such as, cathode electrode) of OLED 102 is connected to power lead (such as, shared grounding) 114.

As described below, image element circuit 100 is by regulating the grid voltage of driving transistors 106 to be provided in average current constant in frame time.

Fig. 2 illustrates another example of the image element circuit of the driving circuit 104 with Fig. 1.Image element circuit 130 is similar with the image element circuit 100 of Fig. 1.Image element circuit 130 comprises OLED 132.OLED 132 can be identical or similar with the OLED 102 of Fig. 1.In image element circuit 130, driving transistors 106 is arranged between an electrode (such as, cathode electrode) of OLED 132 Yu power lead (such as, shared grounding) 134.A terminal of discharge transistor 138 and a connecting terminals of holding capacitor 112 are connected to power lead 134.Another electrode (such as, anode electrode) of OLED 132 is connected to VDD.

In the mode that the image element circuit 100 with Fig. 1 is similar, image element circuit 130 is provided in average current constant in frame time.

Fig. 3 illustrates the example of the driving method of the image element circuit according to the embodiment of the present invention.The waveform of Fig. 3 puts on the image element circuit (such as, 100 of Fig. 1,130 of Fig. 2) of the driving circuit 104 with Fig. 1 and Fig. 2.

The operating cycle of Fig. 3 comprises programming cycle 140 and drive cycle 142.Referring to figs. 1 through Fig. 3, in programming cycle 140, when selecting line SEL to be high level, node A1 is charged to program voltage by switching transistor 110.In drive cycle 142, discharged by discharge transistor 108 couples of node A1.Because driving transistors 106 and discharge transistor 108 have identical bias condition, they experience identical threshold voltage shift.Consider that discharge time is the function of the mutual conductance of discharge transistor 108, when the threshold voltage of driving transistors 106/ discharge transistor 108 increases, discharge time increases.Therefore, the average current of pixel (Fig. 1 100, Fig. 2 130) in frame time keeps constant.In this example, discharge transistor is very weak transistor, has short width (W) and long channel length (L).Width (W) can change according to different situations from the ratio of length (L).

In addition, in the image element circuit 130 of Fig. 2, the increase of the OLED voltage of OLED 132 causes the discharge time more grown.Therefore, even if after OLED deterioration, mean pixel electric current also will keep constant.

Fig. 4 illustrates the example of the display system of the driving circuit for Fig. 1 and Fig. 2.The display system 1000 of Fig. 4 comprises the array of display 1002 with multiple pixel 1004.Pixel 1004 comprises the driving circuit 104 of Fig. 1 and Fig. 2, and can be the image element circuit 100 of Fig. 1 or the image element circuit 130 of Fig. 2.

Array of display 1002 is active matrix light-emitting displays.In one example, array of display 1002 is AMOLED array of display.Array of display 1002 can be monochrome, polychrome or full-color display, and can comprise one or more electroluminescence (EL) element (such as, organic EL).Array of display 1002 may be used for mobile device, personal digital assistant (PDA), graphoscope or mobile phone.

Array of display 1002 is provided with selects line SELi, SELi+1 and data line VDATAj, VDATAj+1.Each selects line SELi, SELi+1 and Fig. 1 corresponding with the SEL of Fig. 2.Each data line VDATAj, VDATAj+1 and Fig. 1 are corresponding with the VDATA of Fig. 2.Pixel 1004 is arranged in the mode of ranks.Colleague's pixel in array of display 1002 shares selects line (SELi, SELi+1).Same column pixel shared data line (VDATAj, VDATAj+1) in array of display 1002.

In the diagram, four pixels 1004 are shown.But the quantity of pixel 1004 can be different according to system, are not limited to four.In the diagram, show two and select line and two data lines.But the quantity of selection line and data line can be different according to system, are not limited to two.

Gate drivers 1006 drives SELi and SELi-1-1.Gate drivers 1006 can be the address driver for address signal being supplied to address wire (such as, selecting line).Data driver 1008 produces programming data and drives VDATAj and DATAj+1.Controller 1010 control and drive system 1006 and 1008 drives pixel 1004 as described above to make them.

Fig. 5 illustrates the example of the image element circuit applying pixel drive scheme in accordance with another embodiment of the present invention.The image element circuit 160 of Fig. 5 comprises OLED 162 and the driving circuit 164 for driving OLED 162.Driving circuit 164 comprises driving transistors 166, discharge transistor 168, first switching transistor 170 and second switch transistor 172 and holding capacitor 174.

Image element circuit 160 is similar with the image element circuit 130 of Fig. 2.Driving circuit 164 is similar with the driving circuit 104 of Fig. 1 and Fig. 2.Transistor 166,168 and 170 respectively with the transistor 106 of Fig. 1 and Fig. 2,108 and 110 corresponding.Transistor 166,168 can be identical with 110 or similar with the transistor 106,108 of Fig. 1 with Fig. 2 with 170.Holding capacitor 174 is corresponding with the holding capacitor 112 of Fig. 1 and Fig. 2.Holding capacitor 174 can be identical or similar with the holding capacitor 112 of Fig. 1 with Fig. 2.OLED 162 is corresponding with the OLED 132 of Fig. 2.OLED 162 can be identical or similar with the OLED 132 of Fig. 2.

In one example, switching transistor 172 is n-type transistor.In another example, switching transistor 172 is p-type transistor.In one example, transistor 166,168,170 and 172 includes gate terminal, source terminal and drain terminal.

Transistor 166,168,170 and 172 can use amorphous silicon, nanometer/microcrystal silicon, polysilicon, organic semiconductor technologies (such as, organic tft), NMOS/PMOS technology or CMOS technology (such as, MOSFET) to manufacture.

In image element circuit 160, switching transistor 172 and discharge transistor 168 are connected in series between the gate terminal of driving transistors 166 and power lead (such as, shared grounding) 176.The gate terminal of switching transistor 172 is connected to bias voltage line VB.The gate terminal of discharge transistor 168 is connected to the gate terminal of driving transistors at node AZ place.Driving transistors 166 is arranged between an electrode (such as, cathode electrode) of OLED 162 and power lead 176.The gate terminal of switching transistor 170 is connected to SEL.A connecting terminals of switching transistor 170 is connected to VDATA.Another connecting terminals of switching transistor 170 is connected to node A2.A connecting terminals of holding capacitor 174 is connected to node A2.Another connecting terminals of holding capacitor 174 is connected to power lead 176.

As described below, image element circuit 160 is provided in average current constant in frame time by regulating the grid voltage of driving transistors 166.

In one example, the bias voltage line VB of Fig. 5 can be shared by the pixel of whole panel.In another example, as shown in Figure 6, bias voltage line VB can be connected to node A2.The image element circuit 160A of Fig. 6 comprises driving circuit 164A.The driving circuit 164 of driving circuit 164A and Fig. 5 is similar.But in driving circuit 164A, the gate terminal of switching transistor 172 is connected to node A2.In another example, as shown in Figure 7, the switching transistor 172 of Fig. 5 can substitute with resistance.The image element circuit 160B of Fig. 7 comprises driving circuit 164B.The driving circuit 164 of driving circuit 164B and Fig. 5 is similar.But in driving circuit 164B, resistance 178 and discharge transistor 168 are connected in series between node A2 and power lead 176.

Fig. 8 illustrates another example of the image element circuit of the driving circuit 164 with Fig. 5.Image element circuit 190 is similar with the image element circuit 160 of Fig. 5.Image element circuit 190 comprises OLED 192.OLED 192 can be identical or similar with the OLED 162 of Fig. 5.In image element circuit 190, driving transistors 166 is arranged between an electrode (such as, anode electrode) of OLED 192 and VDD.A terminal of discharge transistor 168 and a connecting terminals of holding capacitor 174 are connected to OLED 192.Another electrode (such as, cathode electrode) of OLED 192 is connected to power lead (such as, shared grounding) 194.

In one example, the pixel of whole panel shares the bias voltage line VB of Fig. 8.In another example, as similar with Fig. 6, the bias voltage line VB of Fig. 8 is connected to node A2.In another example, as similar with Fig. 7, the switching transistor 172 of Fig. 8 is substituted by resistance.

In the mode that the image element circuit 160 with Fig. 5 is similar, image element circuit 190 is provided in average current constant in frame time.

Fig. 9 illustrates the example of the driving method of image element circuit in accordance with another embodiment of the present invention.The waveform of Fig. 9 put on the driving circuit 164 with Fig. 5 and Fig. 8 image element circuit (such as, Fig. 5 160, Fig. 8 190).

The operating cycle of Fig. 9 comprises programming cycle 200 and drive cycle 202.With reference to Fig. 5, Fig. 8 and Fig. 9, in programming cycle 200, when SEL is high level, node A2 is charged to program voltage (Vp) by switching transistor 170.In drive cycle 202, discharged by discharge transistor 168 couples of node A2.Because driving transistors 166 and discharge transistor 168 have identical bias condition, they experience identical threshold voltage shift.Consider that discharge time is the function of the mutual conductance of discharge transistor 168, when the threshold voltage of driving transistors 166/ discharge transistor 168 increases, discharge time increases.Therefore, the average current of pixel (Fig. 5 160, Fig. 8 190) in frame time keeps constant.Here, switching transistor 172 forces discharge transistor 168 to enter linear operating region, and reduces feedback gain with this.Therefore, discharge transistor 168 can be the unit transistor (unity transistor) with minimum channel length and width.The width of unit transistor and length are the minimum value that technology allows.

In addition, in the image element circuit 190 of Fig. 8, the increase of the OLED voltage of OLED 192 causes the discharge time more grown.Therefore, even if after OLED deterioration, mean pixel electric current also will keep constant.

Figure 10 illustrates the example of the display system of the driving circuit for Fig. 5 and Fig. 8.The display system 1020 of Figure 10 comprises the array of display 1022 with multiple pixel 1024.Pixel 1024 comprises the driving circuit 164 of Fig. 5 and Fig. 8, and can be the image element circuit 130 of Fig. 5 or the image element circuit 190 of Fig. 8.

Array of display 1022 is active matrix light-emitting displays.In one example, array of display 1022 is AMOLED array of display.Array of display 1022 can be monochrome, polychrome or full-color display, and can comprise one or more EL element (such as, organic EL).Array of display 1022 may be used for mobile device, PDA, graphoscope or mobile phone.

Each selects line SELi corresponding with the SEL of Fig. 8 with SELi+1 and Fig. 5.VB and Fig. 5 is corresponding with the VB of Fig. 8.Each data line VDATAj is corresponding with the VDATA of Fig. 8 with VDATAj+1 and Fig. 5.Pixel 1024 is arranged in the mode of ranks.In array of display 1022, the pixel of concurrence shares and selects line (SELi, SEL1+1).The pixel shared data line (VDATAj, VDATAj+1) of same column in array of display 1022.I-th row and (i+1) row pixel share bias voltage line VB.In another example, VB can be shared by whole array 1022.

In Fig. 10, four pixels 1024 are shown.But the quantity of pixel 1024 can be different according to system, are not limited to four.In Fig. 10, show two and select line and two data lines.But the quantity of selection line and data line can be different according to system, are not limited to two.

Gate drivers 1026 drives SELi and SELi+1 and VB.Gate drivers 1026 can comprise the address driver for address signal being supplied to array of display 1022.Data driver 1028 produces programming data and drives VDATAj and VDATAj+1.Controller 1030 control and drive system 1026 and 1028 drives pixel 1024 as described above to make them.

Figure 11 illustrates the example of the display system of the driving circuit for Fig. 6 and Fig. 7.The display system 1040 of Figure 11 comprises the array of display 1042 with multiple pixel 1044.Pixel 1044 comprises the driving circuit 164B of driving circuit 164A or Fig. 7 of Fig. 6, and can be the image element circuit 160B of image element circuit 160A or Fig. 7 of Fig. 6.

Array of display 1042 is active matrix light-emitting displays.In one example, array of display 1042 is AMOLED array of display.Array of display 1042 can be monochrome, polychrome or total colouring, and can comprise one or more EL element (such as, organic EL).Array of display 1042 may be used for mobile device, PDA, graphoscope or mobile phone.

Each selects line SELi corresponding with the SEL of Fig. 7 with SELi+1 and Fig. 6.Each data line VDATAj with VX) ATAj+1 and Fig. 6 is corresponding with the VDATA of Fig. 7.Pixel 1044 is arranged in the mode of ranks.Colleague's pixel in array of display 1042 shares selects line (SELL, SELi+1).Same column pixel shared data line (VDATAj, VDATAj+1) in array of display 1042.

In fig. 11, four pixels 1044 are shown.But the quantity of pixel 1044 can be different according to system, are not limited to four.In fig. 11, show two and select line and two data lines.But the quantity of selection line and data line can be different according to system, are not limited to two.

Gate drivers 1046 drives SELi and SELi ± 1.Gate drivers 1046 can be the address driver for address signal being supplied to address wire (such as, selecting line).Data driver 1048 produces programming data and drives VDATAj and VDATAj+1.Controller 1040 control and drive system 1046 and 1048 drives pixel 1044 as described above to make them.

Figure 12 illustrates the simulation result of the image element circuit 100 of Fig. 1.In fig. 12, " g1 " represent for the threshold voltage of driving transistors 106 difference drift and initial current is the situation of 500nA, the electric current of the image element circuit 100 shown in Fig. 1; " g2 " represents difference drift for the threshold voltage of driving transistors 106 and initial current is the electric current of the situation of 150nA, image element circuit 100.In fig. 12, " g3 " represent for the threshold voltage of driving transistors difference drift and initial current is the situation of 500nA, the electric current of traditional 2-TFT image element circuit; " g4 " represent for the threshold voltage of driving transistors difference drift and initial current is the situation of 150nA, the electric current of traditional 2-TFT image element circuit.Obviously, for new drive scheme, mean pixel current stabilization, and if from image element circuit, remove discharge transistor (such as, 106 of Fig. 1) (traditional 2-TFT image element circuit), so mean pixel electric current significantly declines.

Figure 13 illustrates the example of the image element circuit of the pixel drive scheme applied according to another embodiment of the present invention.The image element circuit 210 of Figure 13 comprises OLED 212 and the driving circuit 214 for driving OLED 212.Driving circuit 214 comprises driving transistors 216, discharge transistor 218, first switching transistor 220 and second switch transistor 222 and holding capacitor 224.

Image element circuit 210 is similar with the image element circuit 190 of Fig. 8.Driving circuit 214 is similar with the driving circuit 164 of Fig. 5 and Fig. 8.Transistor 216,218 and 220 respectively with the transistor 166 of Fig. 5 and Fig. 8,168 and 170 corresponding.Transistor 216,218 can be identical with 170 or similar with the transistor 166,168 of Fig. 5 with Fig. 8 with 220.Transistor 222 can be identical or similar with the transistor 178 of the transistor 172 of Fig. 5 or Fig. 8.In one example, transistor 216,218,220 and 222 includes gate terminal, source terminal and drain terminal.Holding capacitor 224 is corresponding with the holding capacitor 174 of Fig. 5 to Fig. 8.Holding capacitor 224 can be identical or similar with the holding capacitor 174 of Fig. 5 to Fig. 8.OLED 212 is corresponding with the OLED 192 of Fig. 8.OLED 212 can be identical or similar with the OLED 192 of Fig. 8.

Transistor 216,218,220 and 222 can use amorphous silicon, nanometer/microcrystal silicon, polysilicon, organic semiconductor technologies (such as, organic TF1), NMOS/PMOS technology or CMOS technology (such as, MOSFET) to manufacture.

In image element circuit 210, driving transistors 216 is arranged between an electrode (such as, anode electrode) of VDD and OLED 212.Switching transistor 222 and discharge transistor 218 are connected in series between the gate terminal of driving transistors 216 and OLED 212.A terminal of switching transistor 222 is connected to the gate terminal of driving transistors at node A3 place.The gate terminal of discharge transistor 218 is connected to node M.Holding capacitor 224 is arranged between node A3 and OLED 212.Switching transistor 220 is arranged between VDATA and node A3.The gate terminal of switching transistor 220 is connected to selects line SEL [n].The gate terminal of switching transistor 222 is connected to selects line SEL [n+1].Another electrode (such as, cathode electrode) of OLED 212 is connected to power lead (such as, shared grounding) 226.In one example, SEL [n] is the n-th line address wire in array of display, and SEL [n+1] is (n+1) row address line in array of display.

As described below, image element circuit 210 is provided in average current constant in frame time by regulating the grid voltage of driving transistors 216.

Figure 14 illustrates another example of the image element circuit of the driving circuit 214 with Figure 13.The image element circuit 240 of Figure 14 is similar with the image element circuit 160 of Fig. 5.Image element circuit 240 comprises OLED 242.OLED 242 can be identical or similar with the OLED 162 of Fig. 5.In image element circuit 240, driving transistors 216 is arranged between an electrode (such as, cathode electrode) of OLED 242 Yu power lead (such as, shared grounding) 246.A terminal of discharge transistor 218 and a connecting terminals of holding capacitor 224 are connected to power lead 246.Another electrode (such as, anode electrode) of OLED 242 is connected to VDD.The gate terminal of switching transistor 220 is connected to selects line SEL [n].The gate terminal of switching transistor 222 is connected to selects line SEL [n+1].

In the mode that the image element circuit 210 with Figure 13 is similar, image element circuit 240 is provided in average current constant in frame time.

Figure 15 illustrates the example of the driving method of the image element circuit according to the embodiment of the present invention.The waveform of Figure 15 be applied in the driving circuit 214 with Figure 13 and Figure 14 image element circuit (such as, Figure 13 210, Figure 14 240).

The operating cycle of Figure 15 comprises three operating cycles 250,252 and 254.Operating cycle 250 forms programming cycle, and the operating cycle 252 forms compensation cycle and the operating cycle 254 forms drive cycle.With reference to Figure 13 to Figure 15, in programming cycle 250, when SEL [n] is for high level, node A3 is charged to program voltage by switching transistor 220.Within the second operating cycle 252, SEL [n+1] enters high voltage.SEL [n] is forbidding (or invalid).Node A3 is discharged by discharge transistor 218.Within the 3rd operating cycle 254, SEL [n] and SEL [n+1] is forbidding.Because driving transistors 216 and discharge transistor 218 have identical bias condition, they experience identical threshold voltage shift.Consider that discharge time is the function of the mutual conductance of discharge transistor 218, when the threshold voltage of driving transistors 216/ discharge transistor 218 increases, sparking voltage declines.Therefore, the grid voltage of driving transistors 216 obtains corresponding adjustment.

In addition, in the pixel 240 of Figure 14, the increase of the OLED voltage of OLED 242 causes higher grid voltage.Therefore, pixel current keeps constant.

Figure 16 illustrates the example of the display system of the driving circuit for Figure 13 and Figure 14.The display system 1060 of Figure 16 comprises the array of display 1062 with multiple pixel 1064.Pixel 1064 comprises the driving circuit 214 of Figure 13 and Figure 14, and can be the image element circuit 210 of Figure 13 or the image element circuit 240 of Figure 14.

Array of display 1062 is active array active displays.In one example, array of display 1062 is AMOLED array of display.Array of display 1062 can be monochrome, polychrome or full-color display, and can comprise one or more EL elements (such as, organic EL).Array of display 1062 may be used for mobile device, PDA, graphoscope or mobile phone.

SEL [k] (k=n+1, n+2) is the address wire for row k.VDATAl (l=j, j+1) is data line and corresponding with the VDATA of Figure 13 and Figure 14.Pixel 1064 is arranged in the mode of ranks.In array of display 1062, colleague's pixel shares selects line SEL [k].In array of display 1062, same column pixel shared data line VDATAl.

In figure 16, four pixels 1064 are shown.But the quantity of pixel 1064 can be different according to system, are not limited to four.In figure 16, three address wires and two data lines are shown.But the quantity of address wire and data line can be different according to system.

Gate drivers 1066 drives SEL [k].Gate drivers 1066 can be the address driver for address signal being supplied to address wire (such as, selecting line).Data driver 1068 produces programming data and drives VDATAl.Controller 1070 control and drive system 1066 and 1068 drives pixel 1064 as described above to make them.

Figure 17 illustrates the simulation result of the image element circuit 160 of Fig. 5.In fig. 17, " g5 " represent for the threshold voltage of driving transistors 166 difference drift and initial current is the situation of 630nA, the electric current of the image element circuit 160 shown in Fig. 5; " g6 " represents difference drift for the threshold voltage of driving transistors 166 and initial current is the electric current of the situation of 430nA, image element circuit 160.Can find out, even if after the threshold voltage shift 2V of driving transistors, pixel current is still highly stable.Because the image element circuit of Figure 13 210 is similar with the image element circuit 160 of Figure 15, so to those skilled in the art, the pixel current of image element circuit 210 will be also obviously stable.

Figure 18 illustrates the simulation result of the image element circuit 160 of Fig. 5.In figure 18, " g7 " represent for driving transistors 166 different OLED voltage and initial current is the situation of 515nA, the electric current of the image element circuit 160 shown in Fig. 5; " g8 " represents for the different OLED voltage of driving transistors 166 and initial current is the electric current of the situation of 380nA, image element circuit 160.Can find out, even if after OLED voltage drift 2V, pixel current is still highly stable.Because the image element circuit of Figure 13 210 is similar with the image element circuit 160 of Figure 15, so to those skilled in the art, the pixel current of image element circuit 210 will be also obviously stable.

Figure 19 shows drive cycle for driving the array of display 1062 of Figure 16 and programming cycle.In figure 16, row j (j=1,2,3,4) represents the jth row of array of display 1062.In Figure 19, " P " represents programming cycle; " C " represents compensation cycle; And " D " represents drive cycle.The programming cycle P of jth row is overlapping with the drive cycle D of (j+1) row.The compensation cycle C of jth row is overlapping with the programming cycle P of (1+1) row.The drive cycle D of jth row is overlapping with the compensation cycle C of (j+1) row.

Figure 20 illustrates the example of the image element circuit of the pixel drive scheme applied according to another embodiment of the present invention.The image element circuit 300 of Figure 20 comprises OLED 302 and the driving circuit 304 for driving OLED 302.Driving circuit 304 comprises driving transistors 306, switching transistor 308, discharge transistor 310 and holding capacitor 312.OLED 302 such as comprises anode, negative electrode and the luminescent layer between anode and negative electrode.

In one example, transistor 306,308 and 310 is n-type transistor.In another example, transistor 306,308 and 310 is p-type transistor, or the combination of n-type transistor and p-type transistor.In one example, transistor 306,308 and 310 includes gate terminal, source terminal and drain terminal.Transistor 306,308 and 310 can use amorphous silicon, nanometer/microcrystal silicon, polysilicon, organic semiconductor technologies (such as, organic tft), NMOS/PMOS technology or CMOS technology (such as, MOSFET) to manufacture.

Driving transistors 306 is arranged between voltage supply line Vdd and OLED 302.A terminal (such as, source electrode) of driving transistors 306 is connected to Vdd.Another terminal (such as, draining) of driving transistors 306 is connected to an electrode (such as, anode electrode) of OLED 302.Another electrode (such as, cathode electrode) of OLED 302 is connected to power lead (such as, shared grounding) 314.A terminal of holding capacitor 312 is connected to the gate terminal of driving transistors 306 at node A4 place.Another connecting terminals of holding capacitor 312 is connected to Vdd.The gate terminal of switching transistor 308 is connected to selects line SEL M.A connecting terminals of switching transistor 308 is connected to data line VDATA.Another connecting terminals of switching transistor 308 is connected to node A4.The gate terminal of discharge transistor 310 is connected to selects line SEL [i-1] or SEL [i+1].In one example, line SEL [m] (m=i-1, i, 1+1) is selected to be for the capable address wire of the m in array of display.A connecting terminals of discharge transistor 310 is connected to node A4.Another connecting terminals of discharge transistor 310 is connected to sensor 316.In one example, each pixel comprises sensor 316.In another example, sensor 316 is shared by multiple image element circuit.

Sensor 316 comprises sense terminal and bias terminal Vb1.The sense terminal of sensor 316 is connected to discharge transistor 310.Bias terminal Vb1 such as can be connected to (but being not limited to), a terminal (such as, source electrode) of Vdd or driving transistors 306.Sensor 316 detects the energy transferring from image element circuit.Sensor 316 has the conductance changed according to sensing result.Sensor 316 absorbs the light or heat energy that pixel sends, so the carrier density change of sensor.Sensor 316 such as provides feedback by (but being not limited to) optics, calorifics or other conversion regime.Sensor 316 can be (but being not limited to) optical sensor or thermal sensor.As described below, the conductance according to sensor 316 is discharged to node A4.

Driving circuit 304 is used for implementing the programming of image element circuit, compensation/corrections and driving.Image element circuit 300 is provided in the constant luminance in its display life by the grid voltage of adjustment driving transistors 306.

Figure 21 illustrates another example of the image element circuit of the driving circuit 304 with Figure 20.The image element circuit 330 of Figure 21 is similar with the image element circuit 300 of Figure 20.Image element circuit 330 comprises OLED 332.OLED 332 can be identical or similar with the OLED 302 of Figure 20.In image element circuit 330, a terminal of driving transistors 306 (such as, drain electrode) be connected to an electrode of OLED 332 (such as, cathode electrode), and another terminal of driving transistors 306 (such as, source electrode) be connected to power lead (such as, shared grounding) 334.In addition, a connecting terminals of holding capacitor 312 is connected to node A4, and another connecting terminals of holding capacitor 312 is connected to power lead 334.In the mode that the image element circuit 300 with Figure 20 is similar, image element circuit 330 is provided in the constant luminance in its display life.

With reference to Figure 20 and Figure 21, the driving transistors 306 in image element circuit and the aging of OLED 302/332 are compensated in two different ways: compensate in pixel and correct in panel.

To describe in detail in pixel and compensate.Figure 22 illustrates the example of the driving method of the image element circuit according to another embodiment of the present invention.By the waveform of Figure 22 being put on the pixel of the driving circuit 304 with Figure 20 and Figure 21, implement to compensate in pixel.

The operating cycle of Figure 22 comprises three operating cycles 340,342 and 344.Operating cycle 340 is the programming cycle of the i-th row and is the drive cycle that (i+1) goes.Operating cycle 342 is the compensation cycle of the i-th row and is the programming cycle that (i+1) goes.Operating cycle 344 is the drive cycle of the i-th row and is the compensation cycle that (i+1) goes.With reference to Figure 20 to Figure 22, in the programming cycle 340 of the i-th row of display, when selecting line SEL [i] for high level, the node A4 of the i-th row in image element circuit is charged to program voltage by switching transistor 308.In the programming cycle 342 of (i+1) row, SEL [i+1] becomes high level, and the voltage being stored in node A4 place changes according to the conductance of sensor 316.In the drive cycle 344 of the i-th row, the Current Control OLED brightness of driving transistors 306.

The conductance of sensor 316 is depended in the amount of the sparking voltage at node A4 place.Sensor 316 is subject to the control of OLED brightness or temperature.Therefore, when pixel ageing, the amount of sparking voltage reduces.This causes has constant luminance within the serviceable life of image element circuit.

Figure 23 illustrates the example of the display system of the driving circuit 304 for Figure 20 and Figure 21.The display system 1080 of Figure 23 comprises the array of display 1082 with multiple pixel 1084.Pixel 1084 comprises the driving circuit 304 of Figure 20 and Figure 21, and can be the image element circuit 300 of Figure 20 or the image element circuit 330 of Figure 21.

Array of display 1082 is active matrix light-emitting displays.In one example, array of display 1082 is AMOLED array of display.Array of display 1082 can be monochrome, polychrome or full-color display, and can comprise one or more electroluminescence (EL) element (such as, organic EL).Array of display 1082 may be used for mobile device, personal digital assistant (PDA) (PDA), graphoscope or mobile phone.

SEL [i] (i=m-1, m, m+1) in Figure 23 is the address wire for the i-th row.VDATAn j+1 in Figure 23) be the data line arranged for n-th.Address wire SEL [i] is corresponding with the selection line SEL [i] of Figure 20 and Figure 21.Data line VDATAn and Figure 20 is corresponding with the VDATA of Figure 21.

Gate drivers 1086 comprises for address signal being supplied to each bar address wire to drive the address driver of address wire.Data driver 1088 produces programming data and driving data line.Controller 1090 control and drive system 1086 and 1088 is to make them drive pixel 1084 as described above and to implement to compensate in pixel.

In fig 23, four pixels 1084 are shown.But the quantity of pixel 1084 can be different according to system, are not limited to four.In fig 23, three address wires and two data lines are shown.But the quantity of selection line and data line can be different according to system.

In fig 23, pixel 1084 includes the sensor 316 of Figure 20 and Figure 21.In another example, as shown in figure 24, array of display 1080 can comprise the reference pixel that one or more have sensor 316.

Figure 24 illustrates another example of the display system of the driving circuit 304 for Figure 20 and Figure 21.The display system 1100 of Figure 24 comprises the array of display 1102 with multiple pixels 1104 and one or more reference pixels 1106.Reference pixel 1106 comprises the driving circuit 304 of Figure 20 and Figure 21, and can be the image element circuit 300 of Figure 20 or the image element circuit 330 of Figure 21.In fig. 24, two reference pixels 1106 are shown.But the quantity of pixel 1084 can be different according to system, are not limited to two.Pixel 1104 comprises OLED and the driving transistors for driving OLED, and the sensor 316 not containing Figure 20 and Figure 21.SEL_REF is the selection line selected for the discharge transistor in the array to reference pixel 1106.

Gate drivers 1108 drives selects line SEL_REF and address wire.Gate drivers 1108 can be identical or similar with the gate drivers 1108 of Figure 24.Data driver 1110 driving data line.Data driver 1110 can be identical or similar with the data driver 1088 of Figure 23.Controller 1112 control and drive system 1108 and 1110.

Can to the reference pixel of Figure 23 and Figure 24 (1084 of Figure 23,1106 of Figure 24) carry out the ageing information that operates to be provided for algorithm in following panel: as described below at controller (1090 of Figure 23,1112 of Figure 24) or drive-side (Figure 23 1088, Figure 24 1110) correct program voltage.

To describe in detail in panel and correct.With reference to Figure 21, by extracting the aging of image element circuit in the mode of reading back to sensor 316, and correction is carried out to implement to correct in panel to program voltage.In panel, rectification building-out comprises the pixel ageing of Vt shift and OLED deterioration.

Figure 25 illustrates the example of the pixel system according to the embodiment of the present invention.The pixel system of Figure 25 comprises the circuit 360 that reads back.The circuit 360 that reads back comprises charge-pump amplifier 362 and capacitor 364.A terminal of charge-pump amplifier 362 can be connected with data line VDATA via interrupteur SW 1.Another connecting terminals of charge-pump amplifier 362 is connected to bias voltage Vb2.Charge-pump amplifier 362 is read back from the voltage of node A4 releasing via interrupteur SW 1.

The output 366 of charge-pump amplifier 362 changes according to the voltage at node A4 place.Can from the Time Dependent characteristic of node A4 read pixel circuit via charge-pump amplifier 362.

In fig. 25, read back circuit 360 and an interrupteur SW 1 are illustrated for an image element circuit.But read back circuit 360 and interrupteur SW 1 can be arranged for one group of image element circuit (image element circuits such as, in row).In fig. 25, circuit 360 and the interrupteur SW 1 of reading back is arranged at image element circuit 300.In another example, read back circuit 360 and interrupteur SW 1 are applied to the image element circuit 330 of Figure 21.

Figure 26 illustrates the example of the display system of the circuit 360 that reads back with Figure 25.The display system 1120 of Figure 26 comprises the array of display 1122 with multiple pixel 1124.Pixel 1124 comprises the driving circuit 304 of Figure 20 and Figure 21, and can be the image element circuit 300 of Figure 20 or the image element circuit 330 of Figure 21.Pixel 1124 can be identical or similar with 1106 of 1084 of Figure 23 or Figure 24.

In fig. 26, four pixels 1124 are shown.But the quantity of pixel 1124 can be different according to system, are not limited to four.In fig. 26, three address wires and two data lines are shown.But the quantity of selection line and data line can be different according to system.

For each row, be provided with read back circuit RB1 [n] (n=j, j+1) and interrupteur SW 1 [n] (not shown).The circuit RB1 [n] that reads back can comprise interrupteur SW 1 [n].Circuit RB1 [n] and the interrupteur SW 1 [n] of reading back respectively with Figure 25 read back circuit 360 and interrupteur SW 1 corresponding.In the following description, term RB1 and RB1 [n] can be used interchangeably, and RB1 can refer to the circuit 360 that reads back of certain a line in Figure 25.

Array of display 1122 is active matrix light-emitting displays.In one example, array of display 1122 is AMOLED array of display.Array of display 1122 can be monochrome, polychrome or full-color display, and can comprise one or more electroluminescence (EL) element (such as, organic EL).Array of display 1122 may be used for mobile device, personal digital assistant (PDA), graphoscope or mobile phone.

Gate drivers 1126 comprises the address driver for driving address wire.Gate drivers 1126 can be identical or similar with the gate drivers 1108 of the gate drivers 1086 of Figure 23 or Figure 24.Data driver 1128 produces programming data and driving data line.Data driver 1128 comprises the circuit carrying out calculation and programming data according to the output of the circuit RB1 [n] that reads back accordingly.Controller 1130 control and drive system 1126 and 1128, thus drive pixel 1124 as described above.Being switched on or switched off of controller 1130 gauge tap SW1 [n] makes RB1 [n] be connected to corresponding data line VDATAn.

Pixel 1124 is operated to the ageing information being provided for algorithm in panel, wherein, according to the output voltage of the circuit RB1 that reads back, correct program voltage at controller 1130 or driver 1128 side.Simple correction can be following convergent-divergent (scaling): wherein, amplifies program voltage by the change of the output voltage of the circuit RB1 that reads back.

In fig. 26, pixel 1124 includes the sensor 316 of Figure 20 and Figure 21.In another example, array of display 1120 can comprise the reference pixel that one or more have sensor 316, as shown in figure 27.

Figure 27 illustrates another example of the display system of the circuit that reads back with Figure 25.The display system 1140 of Figure 27 comprises the array of display 1142 with multiple pixels 1144 and one or more reference pixels 1146.Reference pixel 1146 comprises the driving circuit 304 of Figure 20 and Figure 21, and can be the image element circuit 300 of Figure 20 or the image element circuit 330 of Figure 21.In figure 27, two reference pixels 1146 are shown.But the quantity of pixel 1084 can be different according to system, are not limited to two.Pixel 1144 comprises OLED and the driving transistors for driving OLED, and does not comprise the sensor 316 of Figure 20 and Figure 21.SEL_REF is the selection line selected for the discharge transistor in the array to reference pixel 1146.

Gate drivers 1148 drives address wire and selects line SEL_REF.Gate drivers 1148 can be identical or similar with the gate drivers 1126 of Figure 26.Data driver 1150 produces programming data, corrects programming data and driving data line.Data driver 1150 can be identical or similar with the data driver 1128 of Figure 26.Controller 1152 control and drive system 1148 and 1150.

Reference pixel 1146 is used for as in panel, algorithm provides ageing information by operation, wherein, according to the output voltage of the circuit RB1 that reads back, corrects program voltage at controller 1152 or driver 1150 side.Simple correction can be such convergent-divergent: amplify program voltage by the change of the output voltage of the circuit RB1 that reads back.

Figure 28 illustrates the example of the driving method of the image element circuit according to another embodiment of the present invention.The display system 1120 of Figure 26 and the display system 1140 of Figure 27 can operate according to the waveform of Figure 28.By the waveform of Figure 28 being put on the display system with the circuit that reads back (such as, 360, Figure 26 of Fig. 3 and the RB1 of Figure 27), implement to correct in panel.

The operating cycle of Figure 28 comprises the operating cycle 380,382,383,384 and 386.Operating cycle 380 is programming cycle of the i-th row.Operating cycle 382 is drive cycles of the i-th row.The drive cycle of each row is independent of other row.Operating cycle 383 is initialization cycles of the i-th row.Operating cycle 384 is integration periods of the i-th row.Operating cycle 386 is reading back the cycle of the i-th row.

With reference to Figure 25 to Figure 28, in the programming cycle 380 of the i-th row, when selecting line SEL [i] for high level, the node A4 in the i-th row of image element circuit is charged to program voltage by switching transistor 308.In the programming cycle 380 of the i-th row, node A4 is charged to the program voltage after correction.In the drive cycle 382 of the i-th row, by driving transistors 306 control OLED brightness.In the initialization cycle 383 of the i-th row, node A4 is charged to bias voltage.In the integration period 384 of the i-th row, SEL [i-1] is high level, is therefore discharged by the voltage at sensor 316 pairs of node A4 places.Within the cycle of reading back 386, read back to make it for correcting (such as, carrying out convergent-divergent to program voltage) to the change of the voltage at node A4 place.

In the beginning in the cycle of reading back 384, the interrupteur SW 1 of the circuit RB1 that reads back connects, and data line VDATA is charged to Vb2.In addition, due to from the leakage of all pixels being connected to data line VDATA, capacitor 364 is charged to voltage Vpre.Then, line SEL [i] is selected to become high level, so sparking voltage Vdisch is formed in capacitor 364 two ends.Two differences extracted between voltage (Vpre and Vdisch) are used to calculate pixel ageing.

Sensor 316 can not work in the most of the time and only work in integration period 384.Therefore, sensor 316 is aging very slight.In addition, sensor 316 can be power supply levels to keep the transistors properly biased significantly to suppress its deterioration.

In addition, the method can be used in extracting the aging of sensor 316.Figure 29 illustrates the example of the aging method extracting sensor 316.The extraction voltage of the sensor of dark pixel and dark reference pixel can be used for finding the aging of sensor 316.Such as, the display system 1140 of Figure 27 can operate according to the waveform of Figure 29.

The operating cycle of Figure 29 comprises the operating cycle 380,382,383,384 and 386.Operating cycle 380 is programming cycle of the i-th row.Operating cycle 382 is drive cycles of the i-th row.Operating cycle 383 is initialization cycles of the i-th row.Operating cycle 384 is integration periods of the i-th row.Operating cycle 386 is reading back the cycle of the i-th row.Operating cycle 380 (second time occurs) is the initialization cycle of reference line.Operating cycle 384 (second time occurs) is the integration period of reference line.Operating cycle 386 (second time occurs) is read back the cycle (extraction) of reference line.

Reference line comprises one or more reference pixel (such as, 1146 of Figure 27), and is positioned at (m-1) OK.SEL_REF is the selection line for carrying out selecting to the discharge transistor (such as, Figure 25 310) in the reference pixel of reference line.

With reference to Figure 25, Figure 27 and Figure 29, in order to extract the aging of sensor 316, normal pixel circuit (such as, 1144) does not work.Difference between the voltage extracted from normal pixel via output 316 and the voltage extracted in a quiescent state of reference pixel (such as, 1146) is extracted.When reference pixel is not by stress (stress), extract the off position voltage of reference pixel.This difference makes the deterioration being extracted sensor 316.

Figure 30 illustrates the example of pixel system in accordance with another embodiment of the present invention.The pixel system of Figure 30 comprises the circuit 400 that reads back.The circuit 400 that reads back comprises trans-impedance amplifier 402.A terminal of trans-impedance amplifier 402 can be connected to data line VDATA via interrupteur SW 2.Trans-impedance amplifier 402 reads back from the voltage of node A4 releasing via interrupteur SW 2.Interrupteur SW 2 can be identical or similar with the interrupteur SW 1 of Figure 25.

The output of trans-impedance amplifier 402 changes according to the voltage at node A4 place.Can from the Time Dependent characteristic of node A4 read pixel circuit via trans-impedance amplifier 402.

In fig. 30, read back circuit 400 and an interrupteur SW 2 are illustrated for an image element circuit.But read back circuit 400 and interrupteur SW 2 can be arranged for one group of image element circuit (each image element circuits such as, in row).In fig. 30, circuit 400 and the interrupteur SW 2 of reading back is arranged at image element circuit 300.In another example, read back circuit 400 and interrupteur SW 2 are applied to the image element circuit 330 of Figure 21.

Figure 31 illustrates the example of the display system of the circuit 400 that reads back with Figure 30.The display system 1160 of Figure 31 comprises the array of display 1162 with multiple pixel 1164.Pixel 1164 comprises the driving circuit 304 of Figure 20 and Figure 21, and can be the image element circuit 300 of Figure 20 or the image element circuit 330 of Figure 21.Pixel 1164 can be identical or similar with the pixel 1146 of the pixel 1124 of Figure 26 or Figure 27.

In Figure 31, show four pixels 1164.But the quantity of pixel 1164 can change according to system, is not limited to four.In Figure 31, show three address wires and two data lines.But, select the quantity of line and data line can change according to system.

For each row, be provided with read back circuit RB2 [n] (n=j, j+1) and interrupteur SW 2 [n] (not shown).The circuit RB2 [n] that reads back can comprise SW2 [n].Circuit RB2 [n] and the interrupteur SW 2 [n] of reading back respectively with Figure 30 read back circuit 400 and interrupteur SW 2 corresponding.In the following description, term RB2 and RB2 [n] can be used interchangeably, and RB2 can refer to the circuit 400 that reads back of certain a line of Figure 30.

Array of display 1162 is active matrix light-emitting displays.In one example, array of display 1162 is AMOLED array of display.Array of display 1162 can be monochrome, polychrome or full-color display, and can comprise one or more electroluminescence (EL) element (such as, organic EL).Array of display 1162 may be used for mobile device, personal digital assistant (PDA) (PDA), graphoscope or mobile phone.

Gate drivers 1166 comprises the address driver for driving address wire.Gate drivers 1166 can be identical or similar with the gate drivers 1148 of the gate drivers 1126 of Figure 26 or Figure 27.Data driver 1168 produces programming data and driving data line.Data driver 1168 comprises the circuit carrying out calculation and programming data according to the output of the circuit RB2 [n] that reads back accordingly.Controller 1170 control and drive system 1166 and 1168, thus drive pixel 1164 as described above.Being switched on or switched off of controller 1170 gauge tap SW2 [n] makes RB2 [n] be connected to corresponding data line VDATAn.

Pixel 1164 is used for as in panel, algorithm provides ageing information by operation, and wherein, the output voltage according to the circuit RB2 that reads back corrects program voltage at controller 1170 or driver 1168 side.Simple correction can be such convergent-divergent: amplify program voltage by the change of the output voltage of the circuit RB2 that reads back.

In Figure 31, pixel 1164 includes the sensor 316 of Figure 20 and Figure 21.In another example, as shown in figure 32, array of display 1160 can comprise the reference pixel that one or more have sensor 316.

Figure 32 illustrates another example of the display system of the circuit 400 that reads back with Figure 30.The display system 1200 of Figure 32 comprises the array of display 1202 with multiple pixels 1204 and one or more reference pixels 1206.Reference pixel 1206 comprises the driving circuit 304 of Figure 20 and Figure 21, and can be the image element circuit 300 of Figure 20 or the image element circuit 330 of Figure 21.In Figure 32, show two reference pixels 1206.But the quantity of pixel 1204 can change according to system, is not limited to two.Pixel 1204 comprises OLED and the driving transistors for driving OLED, and does not comprise the sensor 316 of Figure 20 and Figure 21.SEL REF is the selection line selected the discharge transistor in the array of reference pixel 1206.

Gate drivers 1208 drives selects line SEL REF and address wire.Gate drivers 1208 can be identical or similar with the gate drivers 1166 of the gate drivers 1148 of Figure 27 or Figure 31.Data driver 1210 produces programming data, corrects programming data and driving data line.Data driver 1210 can be identical or similar with the data driver 1168 of the data driver 1150 of Figure 27 or Figure 32.Controller 1212 control and drive system 1208 and 1210.

Reference pixel 1206 carries out operating thus provides ageing information for algorithm in following panel: wherein, and the output voltage according to the circuit RB2 that reads back corrects program voltage at controller 1212 or driver 1210 side.Simple correction can be such convergent-divergent: amplify program voltage by the change of the output voltage of the circuit RB2 that reads back.

Figure 33 illustrates the example of the driving method of the image element circuit according to another embodiment of the present invention.The display system 1160 of Figure 31 and the display system 1200 of Figure 32 can operate according to the waveform of Figure 33.By the waveform of Figure 33 being put on the display system with the circuit that reads back (such as, 400, Figure 31 of Figure 30 and the RB2 of Figure 32), implement to correct in panel.

The operating cycle of Figure 33 comprises the operating cycle 410,422 and 422 for row.Operating cycle 420 is programming cycle of the i-th row.Operating cycle 422 is drive cycles of the i-th row.Operating cycle 424 is reading back (extraction) cycle of the i-th row.

With reference to Figure 30 to Figure 33, in the programming cycle 420 of the i-th row, when selecting line SEL [i] for high level, the node A4 in the i-th row of image element circuit is charged to program voltage by switching transistor 308.In the drive cycle 422 of the i-th row, by the Current Control pixel intensity of driving transistors 306.In the extracting cycle 424 of the i-th row, SEL [i] and SEL [i-1] is for high level and the electric current of monitoring sensor 316.The circuit RB2 that reads back amplifies the change of this electric current.This change is used to the deterioration in brightness of measurement pixel and passes through to correct the deterioration in brightness that program voltage (such as, carrying out convergent-divergent to program voltage) carrys out compensation pixel.

In the beginning in the cycle of reading back 424, when SEL [i] is for low level, algorithms selection is connect for the interrupteur SW 2 of the row corrected.Therefore, leakage current is extracted the output voltage as trans-impedance amplifier 402.The above-mentioned selection can gone according to stress history (stress history), random or sequential method etc.Then, SEL [i] becomes high level, so the sensor current relevant with the brightness of pixel or temperature is by the output voltage read back as trans-impedance amplifier 402.Use two extraction voltages of leakage current and sensor current, just can calculate pixel ageing.

Sensor 316 can not work in the most of the time and only work in integration period 424.Therefore, sensor 316 is aging very slight.In addition, sensor 316 can be power supply levels to keep the transistors properly biased significantly to suppress its deterioration.

In addition, the method can be used in extracting the aging of sensor 316.Figure 34 illustrates the example of the aging method of the sensor 316 extracting Figure 30.Such as, the display system 1200 of Figure 32 can operate according to the waveform of Figure 34.

The operating cycle of Figure 34 comprises the operating cycle 420,422 and 424.Operating cycle 420 (first time occurs) is the programming cycle of the i-th row.Operating cycle 422 is drive cycles of the i-th row.Operating cycle 424 (first time occurs) is reading back (extraction) cycle of the i-th row.Operating cycle 424 (second time occurs) is reading back (extraction) cycle of reference line.

Reference line comprises one or more reference pixel (such as, 1206 of Figure 32), and is positioned at (m-1) OK.SEL REF is the selection line for carrying out selecting to the discharge transistor (such as, Figure 30 310) in the reference pixel of reference line.

With reference to Figure 30, Figure 32 and Figure 34, in order to extract the aging of sensor 316, normal pixel circuit (such as, 1204) does not work.Output via trans-impedance amplifier 402 is extracted from the difference between the voltage and the voltage extracted in a quiescent state of reference pixel (such as, 1206) of normal pixel circuit extraction.When reference pixel is not by stress, extract the off position voltage of reference pixel.Consequently be extracted the deterioration of sensor 316.

Figure 35 illustrates the example of the image element circuit of the pixel drive scheme applied according to another embodiment of the present invention.The image element circuit 500 of Figure 35 comprises OLED 502 and the driving circuit 504 for driving OLED 502.Driving circuit 504 comprises driving transistors 506, switching transistor 508, discharge transistor 510, regulating circuit 510 and holding capacitor 512.

OLED 502 can be identical or similar with the OLED 302 of the OLED 212 of Figure 13 or Figure 20.Capacitor 512 can be identical or similar with the capacitor 312 of the capacitor 224 of Figure 13 or Figure 20.Transistor 506,508 can be identical with 310 or similar with the transistor 306,308 of 222 or Figure 20 with the transistor 206,220 of Figure 13 with 510.In one example, transistor 506,508 and 510 includes gate terminal, source terminal and drain terminal.

Driving transistors 506 is arranged between voltage supply line VDD and OLED 502.A terminal (such as, draining) of driving transistors 506 is connected to VDD.Another terminal (such as, source electrode) of driving transistors 506 is connected to an electrode (such as, anode electrode) of OLED 502.Another electrode (such as, cathode electrode) of OLED 502 is connected to power lead VSS (such as, shared grounding) 514.A terminal of holding capacitor 512 is connected to the gate terminal of driving transistors 506 at node A5 place.Another connecting terminals of holding capacitor 512 is connected to OLED502.The gate terminal of switching transistor 508 is connected to selects line SEL [n].A connecting terminals of switching transistor 508 is connected to data line VDATA.Another connecting terminals of switching transistor 508 is connected to node A5.The gate terminal of transistor 510 is connected to control line CNT [n].In one example, n represents the n-th line in array of display.A connecting terminals of transistor 510 is connected to node A.S.Another connecting terminals of transistor 510 is connected to a terminal of regulating circuit 516.Another connecting terminals of regulating circuit 516 is connected to OLED 502.

Because the resistance of regulating circuit 516 changes according to pixel ageing, so regulating circuit 516 is provided for the voltage regulating A5 together with discharge transistor 510.In one example, regulating circuit 516 is transistors 218 of Figure 13.In another example, regulating circuit 516 is sensors 316 of Figure 20.

In order to improve the drift of the threshold voltage of driving transistors 506, image element circuit is disconnected in a part of frame time.

Figure 36 illustrates the example of the driving method of the image element circuit according to another embodiment of the present invention.The waveform of Figure 36 puts on the image element circuit of Figure 35.The operating cycle of image element circuit 500 comprises programming cycle 520, discharge cycle 522, light period 524, reset cycle 526 and relaxaton period 527.

In programming cycle 520, node A5 is charged to program voltage VP.In discharge cycle 522, CNT [n] becomes high level, and the voltage at node A5 place is aging by what partly release with compensation pixel.In light period 524, SEL [n] and CNT [n] becomes low level.In light period 524, driving transistors 506 control OLED 502.Within the reset cycle 526, CNT [n] becomes high level and is released completely by the voltage at node A5 place within the reset cycle 526 with this.In relaxaton period 527, driving transistors 506 is not subject to stress and recovers from light period 524.Therefore, the aging of driving transistors 506 is able to remarkable reduction.

Figure 37 illustrates the example of the display system of the image element circuit containing Figure 35.The display system 1300 of Figure 37 comprises the array of display 1302 with multiple pixel 500.Array of display 1302 is active matrix light-emitting displays.In one example, array of display 1302 is AMOLED array of display.Pixel 500 is arranged in row and column fashion.In Figure 37, show two pixels 500 of n-th line.Array of display 1302 can comprise plural pixel.

Array of display 1302 can be monochrome, polychrome or full-color display, and can comprise one or more electroluminescence (EL) element (such as, organic EL).Array of display 1302 may be used for mobile device, personal digital assistant (PDA) (PDA), graphoscope or mobile phone.

Address wire SEL [n] is arranged at n-th line.Control line CNT [n] is arranged at n-th line.Data line VDATAk (k=j, j+1) is arranged at kth row.Address wire SEL [n] is corresponding with the SEL [n] of Figure 35.Control line CNT [n] is corresponding with the CNT [n] of Figure 35.Data line VDATAk (k=j, j+1) is corresponding with the VDATA of Figure 35.

Gate drivers 1306 drives SEL [n].Data driver 1308 produces programming data and drives VDATAk.Controller 1310 control and drive system 1306 and 1308, thus drive pixel 500 to produce the waveform of Figure 36.

Figure 38 illustrates another example of the display system of the image element circuit 500 including Figure 35.The display system 1400 of Figure 38 comprises the array of display 1402 with multiple pixel 500.Array of display 1402 is active matrix light-emitting displays.In one example, array of display 1302 is AMOLED array of display.Pixel 500 is arranged in row and column fashion.In Figure 38, show four pixels 500 of n-th line.Array of display 1402 can comprise more than four pixels.

SEL [i] (i=n, n+1) selects line and corresponding with the SEL [n] of Figure 35.CNT [i] (i=n, n+1) is control line and corresponding with the CNT [n] of Figure 35.OUT [k] (k=n-1, n, n+1) is the output of gate drivers 1406.Select line can be connected to from the one in the output of gate drivers 1402 or VL line.VDATAm (m=j+1) is data line and corresponding with the VDATA of Figure 35.Data driver 1408 control VDATAm.Controller 1410 control gate driver 1406 and data driver 1408, thus operation image element circuit 500.

Control line and selection line are by the shared identical output from gate drivers 1406 of switch 1412.In the discharge cycle 526 of Figure 36, RES signal changes switch 1412 direction and selection line is connected to the VL line with low-voltage, ends to make the transistor 508 of image element circuit 500.OUT [n-1] is high level, so CNT [n] is high level.Therefore, by the voltage at regulating circuit 516 and discharge transistor 510 adjustment node A5 place.Within other operating cycle, the corresponding output (such as, SEL [n] is connected to OUT [n]) that RES signal and switch 1412 will select line to be connected to gate drivers.Switch 1412 can use face plate manufacturing technology (such as, amorphous silicon) and be fabricated in the inside that panel maybe can be integrated in gate drivers.

Figure 39 illustrates the example of the image element circuit of the pixel drive scheme applied according to another embodiment of the present invention.In programming cycle, according to programming information, image element circuit 600 is programmed, and in light period, drive image element circuit 600 luminous according to programming information.The image element circuit 600 of Figure 39 comprises OLED 602 and the driving circuit 604 for driving OLED 602.OLED 602 is luminescent devices luminous in light period.OLED 602 has electric capacity 632.OLED 602 such as comprises anode, negative electrode and the luminescent layer between anode and negative electrode.

Driving circuit 604 comprises driving transistors 606, switching transistor 608, switches set 650, holding capacitor 612 and regulates transistor 646.In light period, driving transistors 606 transports through the drive current of OLED 602.In programming cycle, with the voltage at least in part according to programming information, holding capacitor 612 is charged.Switching transistor 608 operates according to selection line SEL, and in programming cycle, voltage is sent to holding capacitor 612.Regulate transistor 646 leakage current to be sent to the gate terminal of driving transistors 606, thus regulate the grid voltage of driving transistors 606.

In one example, transistor 606,608 and 646 is n-type transistor.In another example, transistor 606,608 and 646 is p-type transistor, or the combination of n-type transistor and p-type transistor.In one example, transistor 606,608 and 646 includes gate terminal, source terminal and drain terminal.

Transistor 606,608 and 646 can use amorphous silicon, nanometer/microcrystal silicon, polysilicon, organic semiconductor technologies (such as, organic tft), NMOS/PMOS technology or CMOS technology (such as, MOSFET) to manufacture.

Driving transistors 606 is by switch or be directly arranged between voltage supply line VDD and OLED602.A connecting terminals of driving transistors 606 is connected to VDD.Another connecting terminals of driving transistors 606 is connected to an electrode (such as, anode electrode) of OLED 602.The gate terminal of switching transistor 608 is connected to selects line SEL.A connecting terminals of switching transistor 608 is connected to data line VDATA.Another connecting terminals of switching transistor 608 is connected to node A.A connecting terminals of holding capacitor 612 is connected to node A.Another connecting terminals of holding capacitor 612 is connected to OLED 602.Another electrode (such as, cathode electrode) of OLED 602 is connected to power lead (such as, shared grounding) 614.

A connecting terminals of transistor 646 is regulated to be connected to the gate terminal of driving transistors 606.The second connecting terminals of transistor 646 is regulated to be connected to an electrode (such as, anode electrode) of OLED 602.The gate terminal of transistor 646 is regulated to be connected to the second terminal regulating transistor 646.Therefore, transistor 646 is regulated to be offset to the sub-threshold region providing very small area analysis.When higher temperature, regulate the subthreshold current of transistor 646 to enlarge markedly, it reduce the mean gate voltage of driving transistors 606.

Switches set 650 can comprise any one in the structures such as the discharge transistor above illustrated about various embodiments of the invention, extra switching transistor, resistance, sensor and/or amplifier.Such as, as shown in Figure 1, switches set 650 can comprise discharge transistor 108.In light period, discharge transistor 108 is discharged on holding capacitor 612 by the voltage charged.In this embodiment, a terminal of discharge transistor 108 and the gate terminal of discharge transistor 108 are connected to the gate terminal of driving transistors 606 at node A place.Another connecting terminals of discharge transistor 108 is connected to OLED 602.

In another example, as shown in Figure 8, switches set 650 can comprise the second switch transistor 172 between gate terminal and an electrode (such as, anode electrode) of OLED 602 and discharge transistor 168 that are connected in series in driving transistors 606.The gate terminal of switching transistor 172 is connected to bias voltage line VB.The gate terminal of discharge transistor 168 is connected to the gate terminal of driving transistors 606 at node A place.In light period, discharge transistor 168 is released on holding capacitor 612 by the voltage charged.

In another example, as shown in figure 13, switches set 650 can comprise the second switch transistor 222 between gate terminal and an electrode (such as, anode electrode) of OLED 602 and discharge transistor 218 that are connected in series in driving transistors 606.The gate terminal of switching transistor 222 is connected to selects line SEL [n+1].The gate terminal of discharge transistor 218 is connected to the gate terminal of driving transistors 606 at node A place.In light period, discharge transistor 218 is released on holding capacitor 612 by the voltage charged.

In another example, as shown in figure 35, switches set 650 can comprise the discharge transistor 510 between gate terminal and an electrode (such as, anode electrode) of OLED 602 being connected in series in driving transistors 606.The gate terminal of discharge transistor is connected to control line CNT [n].Because the resistance of regulating circuit 516 changes according to pixel ageing, so regulating circuit 516 is provided for the voltage of adjustment node A together with discharge transistor 510.In one example, regulating circuit 516 is transistors 218 of Figure 13.In another example, regulating circuit 516 is sensors 316 of Figure 20.In light period, discharge transistor 510 is released on holding capacitor 612 by the voltage charged.

According to these embodiments, image element circuit 600 is provided in average current constant in frame time.

Figure 40 illustrates the example of the image element circuit applying pixel drive scheme in accordance with another embodiment of the present invention.In programming cycle, according to programming information, image element circuit 610 is programmed, and in light period, drive image element circuit 610 luminous according to programming information.The image element circuit 610 of Figure 40 comprises OLED 602 and the driving circuit for driving OLED 602.OLED 602 is luminescent devices luminous in light period.OLED 602 has electric capacity 632.OLED 602 such as comprises anode, negative electrode and the luminescent layer between anode and negative electrode.

Driving circuit comprises driving transistors 606, first switching transistor 608, second switch transistor 688, holding capacitor 612, discharge transistor 686 and regulates transistor 646.In light period, driving transistors 606 transmits and drives current through OLED 602.In programming cycle, with the voltage at least in part according to programming information, holding capacitor 612 is charged.First switching transistor 608 operates according to selection line, and in programming cycle, voltage is sent to holding capacitor 612.In light period, discharge transistor 686 releases the voltage on holding capacitor 612.Regulate transistor 646 leakage current to be sent to the gate terminal of driving transistors 606, thus regulate the grid voltage of driving transistors 606.

In one example, transistor 606,608,646 and 686 is n-type transistor.In another example, transistor 606,608,646 and 686 is p-type transistor, or the combination of n-type transistor and p-type transistor.In one example, transistor 606,608,646 and 686 includes gate terminal, source terminal and drain terminal.

Transistor 606,608,646 and 686 can use amorphous silicon, nanometer/microcrystal silicon, polysilicon, organic semiconductor technologies (such as, organic tft), NMOS/PMOS technology or CMOS technology (such as, MOSFET) to manufacture.

Driving transistors 606 is by switch or be directly arranged between voltage supply line VDD and OLED602.A connecting terminals of driving transistors 606 is connected to VDD.Another connecting terminals of driving transistors 606 is connected to an electrode (such as, anode electrode) of OLED 602.The gate terminal of the first switching transistor 608 is connected to selects line SEL.A connecting terminals of switching transistor 608 is connected to data line VDATA.Another connecting terminals of switching transistor 608 is connected to node A.A connecting terminals of holding capacitor 612 is connected to node A.Another terminal of holding capacitor 612 is connected to OLED 602 at Node B place.Another electrode (such as, cathode electrode) of OLED 602 is connected to power lead (such as, shared grounding).

The gate terminal of discharge transistor 686 is connected to control line CNT.Control line CNT can be corresponding with the CNT of Figure 35 [n].A connecting terminals of discharge transistor 686 is connected to node A.A connecting terminals of second switch transistor 688 is connected to node A.Another terminal of discharge transistor 686 is connected to another terminal of second switch transistor 688 at node C place.The gate terminal of second switch transistor 688 is connected to node C.

A connecting terminals of transistor 646 is regulated to be connected to node C.The second connecting terminals of transistor 646 is regulated to be connected to an electrode (such as, anode electrode) of OLED 602.The gate terminal of transistor is regulated to be connected to node A.Therefore, transistor 646 is regulated to be offset to the sub-threshold region providing very small area analysis.But in frame time, such small area analysis enough changes the grid voltage of driving transistors 606.When higher temperature, regulate the subthreshold current of transistor 646 to enlarge markedly, it reduce the mean gate voltage of driving transistors 606.

According to this embodiment, image element circuit 610 is provided in average current constant in frame time.

Figure 41 illustrates the example of the image element circuit of the pixel drive scheme applied according to another embodiment of the present invention.In programming cycle, according to programming information, image element circuit 620 is programmed, and in light period, drive image element circuit 620 luminous according to programming information.The image element circuit 620 of Figure 41 comprises OLED 602 and the driving circuit for driving OLED 602.OLED 602 is luminescent devices luminous in light period.OLED 602 has electric capacity 632.OLED 602 such as comprises anode, negative electrode and the luminescent layer between anode and negative electrode.

The gate terminal of discharge transistor 686 is connected to control line CNT.Control line CNT can be corresponding with the control line CNT of the CNT of Figure 35 [n] or Figure 40.A connecting terminals of second switch transistor 688 is connected to node A.Another terminal of second switch transistor 688 is connected to OLED 602 at Node B place.The gate terminal of second switch transistor is connected to OLED602 at Node B place.

A connecting terminals of discharge transistor 686 is connected to node A.Another connecting terminals of discharge transistor 686 is connected to the terminal regulating transistor 646.Another terminal of transistor 646 is regulated to be connected to an electrode (such as, anode electrode) of OLED 602 at Node B place.The gate terminal of transistor is regulated to be connected to node A.Therefore, transistor 646 is regulated to be biased the sub-threshold region being in and providing very small area analysis.But in frame time, such small area analysis enough changes the grid voltage of driving transistors 606.When higher temperature, regulate the subthreshold current of transistor 646 to enlarge markedly, reduce the mean gate voltage of driving transistors 606.

According to another embodiment, propose the method for operating of the display of the image element circuit 600,610 or 620 had for driving luminescent device.The method comprises: in programming cycle, by conducting first switching transistor, comes, to image element circuit charging, to be charged to the node being connected to the gate terminal of capacitor and driving transistors in image element circuit to make voltage; By adjustment transistor, leakage current is sent to the gate terminal of driving transistors, thus regulates the voltage of described Nodes; And driving in the light period of image element circuit luminescence according to programming information, by amplifier transistor, the voltage of described Nodes is discharged.

According to embodiments of the invention, even if backboard and OLED instability, driving circuit and the waveform putting on driving circuit provide stable AMOLED display.Driving circuit and waveform thereof reduce the differential ageing impact of image element circuit.Pixel layout in embodiment does not need extra drive cycle or driving circuit, this achieves the low cost application of the portable set comprising mobile device and PDA.In addition, as those of ordinary skill in the art appreciate, it to temperature variation and mechanical stress insensitive.

Describe one or more currently preferred embodiments by example as above.To those skilled in the art, many changes can be made when not departing from the scope of the invention that claims limit and amendment is obvious.

Claims

1. a display system, described system comprises:

Image element circuit, described image element circuit is programmed according to programming information and is driven to emit light according to described programming information in light period in programming cycle, and described image element circuit comprises:

Luminescent device, described luminescent device is used in described light period luminous,

Driving transistors, described driving transistors is used for transmitting in described light period driving current through described luminescent device, and described driving transistors has gate terminal, source terminal and drain terminal,

Holding capacitor, use in described programming cycle and charge to described holding capacitor according to the voltage of described programming information at least partly, described holding capacitor has the first terminal and the second terminal, and described the first terminal is connected to the grid of described driving transistors,

First switching transistor, described first switching transistor selects line to operate according to first, and described first switching transistor is used for, in described programming cycle, described voltage is sent to described holding capacitor, and

Regulate transistor, described adjustment transistor is used for gate terminal leakage current being sent to described driving transistors, thus regulate the grid voltage of described driving transistors, described adjustment transistor has gate terminal, source terminal and drain terminal, the gate terminal of described adjustment transistor is connected to a terminal of described holding capacitor, and the one in the source terminal of described adjustment transistor and drain terminal is connected to the gate terminal of described driving transistors

Wherein, described image element circuit is provided in average current constant in frame time.

2. system according to claim 1, also comprises:

Array of display, described array of display comprises the multiple described image element circuit arranged in the mode of ranks, and

For driving the driver of described array of display.

3. system according to claim 1, also comprises:

Data driver, described data driver charges to described holding capacitor according to described programming information, thus programmes to described image element circuit via data line;

Gate drivers, described gate drivers is used for driving described first to select line; With

Controller, described controller is used for operating described data driver and described gate drivers.

4. system according to claim 1, also comprises:

Second switch transistor, described second switch transistor operates according to offset line, and described second switch transistor is used for the terminal described gate terminal of described driving transistors being connected to described holding capacitor.

5. system according to claim 4, also comprises:

Array of display, described array of display comprises the multiple described image element circuit arranged in the mode of ranks; With

For driving the driver of described array of display,

Wherein, described offset line is shared by the above image element circuit in multiple described image element circuit.

6. system according to claim 1, also comprises:

Second switch transistor, described second switch transistor selects line to operate according to second, and described second switch transistor is used for the terminal described gate terminal of described driving transistors being connected to described holding capacitor.

7. system according to claim 1, wherein, described discharge transistor operates according to control line.

8. system according to claim 1, also comprises:

Regulating circuit, described regulating circuit for regulating the grid voltage of described driving transistors,

Wherein, described discharge transistor is connected between described regulating circuit and described driving transistors.

9. system according to claim 8, wherein, described regulating circuit comprises second switch transistor.

10. system according to claim 8, wherein, described regulating circuit comprises sensor, and described sensor is for detecting the energy transferring from described image element circuit.

11. systems according to claim 10, wherein, described discharge transistor discharges to described voltage according to the conductance of described sensor.

12. systems according to claim 10, wherein, described sensor is optical sensor or thermal sensor.

13. systems according to claim 1, wherein, described adjustment transistor is biased and is in sub-threshold region.

14. 1 kinds of methods that the display of the image element circuit had for driving luminescent device is operated, described method comprises:

By conducting first switching transistor, described image element circuit is charged in programming cycle, voltage to be charged in described image element circuit as lower node with this: as described in node be connected to (a) have the capacitor of the first terminal and the second terminal as described in the gate terminal of the first terminal and (b) driving transistors, described driving transistors also has source terminal and drain terminal; And

Leakage current is transmitted by the adjustment transistor with gate terminal, source terminal and drain terminal, the described gate terminal of described adjustment transistor is connected to a terminal in the described the first terminal of described holding capacitor and described second terminal, and the one in the source terminal of described adjustment transistor and drain terminal is connected to the described gate terminal of described driving transistors, thus regulate the voltage of described Nodes.

15. methods according to claim 14, wherein, described image element circuit is provided in average current constant in frame time.

16. methods according to claim 14, wherein, carry out the first switching transistor described in conducting by selecting line.

17. methods according to claim 16,

Wherein, data driver produces programming information,

Wherein, described in gate driver drive, select line, and

Wherein, controller controls described data driver and described gate drivers.

18. methods according to claim 14, wherein, described discharge transistor and described driving transistors have identical bias condition.

19. methods according to claim 14, wherein, described adjustment transistor is offset to sub-threshold region.

20. methods according to claim 14, also comprise:

By conducting second switch transistor, described discharge transistor is forced to enter linear operating region.

21. methods according to claim 20, wherein, by second switch transistor described in offset line conducting.

22. methods according to claim 20, wherein, by selecting second switch transistor described in line conducting.

23. methods according to claim 14, wherein, carry out operated discharge transistor according to control line.

24. methods according to claim 14, also comprise:

The energy transferring from described image element circuit is detected by sensor.

25. methods according to claim 24, wherein, described discharge transistor discharges according to the voltage of the conductance of described sensor to described Nodes.