CN104808519B - A kind of control method of the embedded OTP modules of chip - Google Patents
A kind of control method of the embedded OTP modules of chip Download PDFInfo
- Publication number
- CN104808519B CN104808519B CN201510087242.3A CN201510087242A CN104808519B CN 104808519 B CN104808519 B CN 104808519B CN 201510087242 A CN201510087242 A CN 201510087242A CN 104808519 B CN104808519 B CN 104808519B
- Authority
- CN
- China
- Prior art keywords
- otp
- modules
- chip
- control
- otp modules
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 20
- 238000012360 testing method Methods 0.000 claims description 7
- 230000006378 damage Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 230000002950 deficient Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25314—Modular structure, modules
Abstract
A kind of control method of the OTP modules embedded the invention discloses chip, belongs to OTP building block techniques field, technical scheme：OTP modules have independent power path；When the control port of OTP modules is controlled by internal logic：When the control logic of OTP modules enters the operation of the internal storage information of guild's destruction OTP modules to OTP modules, if chip is in non-read-write state, the power path of OTP modules is disconnected；If chip is in read-write state, the power path of OTP modules is closed；When the control port of OTP modules is directly controlled by the outside port of chip：When OTP modules are in the operation of the internal storage information that can destroy OTP modules, if chip is in non-read-write state, the power path of OTP modules is disconnected；If chip is in read-write state, the power path of OTP modules is closed.Power path and control port that the present invention passes through independent control OTP modules, reach the content maloperation for avoiding OTP embedded to chip.
Description
Technical field
The present invention relates to a kind of OTP building block techniques field, the controlling party of the embedded OTP modules of specifically a kind of chip
Method.
Background technology
Requirement more and more higher due to people to safety, chip design needs to consider factor of safety, it is desirable to which chip embeds OTP
(One Time Programable One Time Programmables) module is used to preserve some privately owned and security information.But in some feelings
Such as chip testing under condition, may cause some to miss write operation so that these units are destroyed to these units, so that
These chips become defective products.
OTP modules are typically the IP (intellectual property) of chip maker's offer, are a kind of nonvolatile memory, OTP
The characteristic of module is that the bit of default value storage is entirely 0, any bit for needing can be changed to by 0 by programming
1, once being changed to 1, cannot again be changed to 0, but not be changed to 0 bit that 1 can also be changed to by programming.OTP moulds
Block is generally used for storing the restoration information of some chip internals RAM (random access memory), the yield for improving chip.So
One-time programming generally is carried out to OTP modules in chip volume production test phase.In addition, OTP modules can be additionally used in storage, some are very heavy
Want very sensitive information, and read-only information, and chip configuration information.
Because the control signal port of OTP modules and power path are by chip internal logic control or multiple with other functions
With, cause OTP inside modules storage informations to be misused, and change its storage information.How to avoid to the embedded OTP modules of chip
Content maloperation, be those skilled in the art's problem in the urgent need to address.
The content of the invention
Technical assignment of the invention is to provide a kind of control method of the embedded OTP modules of chip.By independent control OTP
The power path and control port of module, reach the content maloperation for avoiding OTP embedded to chip.
Technical assignment of the invention realizes in the following manner,
A kind of control method of the embedded OTP modules of chip, OTP modules have independent power path；The control of OTP modules
Port processed directly can both be controlled by the outside port of chip, it is also possible to by internal logic control；
（1）, when the control port of OTP modules is controlled by internal logic：When the control logic of OTP modules is to OTP modules
During the operation of the internal storage information for entering guild's destruction OTP modules, if chip is in non-read-write state, OTP modules are disconnected
Power path, then OTP inside modules storage information would not be changed；If chip is in read-write state, closure OTP modules
Power path, controls to be written and read operation to OTP inside modules storage informations by internal logic；
（2）, when OTP modules control port directly by chip outside port control when：Can be destroyed when OTP modules are in
During the operation of the internal storage information of OTP modules, if chip is in non-read-write state, the power path of OTP modules is disconnected,
OTP inside modules storage information would not be changed；If chip is in read-write state, the power path of OTP modules is closed, led to
The outside port for crossing the chip of OTP modules is written and read operation to OTP inside modules storage informations.
State（1）In, the operation of internal storage information of OTP modules can be destroyed for testing scanning chain is operated, OTP modules
In testing scanning chain, the scanned chain of logical value and its control structure of each of which unit are controlled control logic, can cause scanning
Chain some specific input values, destroy the internal storage information of OTP modules.
When the control port of OTP modules is directly controlled by the outside port of chip, i.e. the control port of OTP modules is direct
It is connected to the device control beyond chip exterior pin or chip.
State（2）In, the operation that can destroy the internal storage information of OTP modules is：When the outside port or power supply of chip
When path is multiplexed to other functions, can cause that OTP modules are in by write state or other meetings in the presence of some specific combined values
Destroy the mode of operation of the internal storage information of OTP modules.
A kind of control method of the embedded OTP modules of chip of the invention has advantages below：By independent control OTP electricity
Source path and control port, reach the content maloperation for avoiding OTP embedded to chip；Thus, with promoting the use of valency well
Value.
Brief description of the drawings
The present invention is further described below in conjunction with the accompanying drawings.
Accompanying drawing 1 is a kind of control method of the OTP modules that chip is embedded when the control port of OTP modules is by internal logic
During control, chip is in connection block diagram during non-read-write state；
Accompanying drawing 2 is a kind of control method of the OTP modules that chip is embedded when the control port of OTP modules is by internal logic
During control, chip is in connection block diagram during read-write state；
Accompanying drawing 3 is a kind of control method of the OTP modules that chip is embedded when the control port of OTP modules is directly by chip
Outside port control when, chip be in non-read-write state when connection block diagram；
Accompanying drawing 4 is a kind of control method of the OTP modules that chip is embedded when the control port of OTP modules is directly by chip
Outside port control when, chip be in read-write state when connection block diagram.
Specific embodiment
The control method of the OTP modules embedded to a kind of chip of the invention with reference to Figure of description and specific embodiment is made
It is explained in detail below.
Embodiment 1：
A kind of control method of the embedded OTP modules of chip of the invention, OTP modules have independent power path；OTP
The control port of module both can be controlled directly by the outside port of chip, it is also possible to by internal logic control；
（1）, when the control port of OTP modules is controlled by internal logic：When the control logic of OTP modules is to OTP modules
During the operation of the internal storage information for entering guild's destruction OTP modules, if chip is in non-read-write state, OTP modules are disconnected
Power path, then OTP inside modules storage information would not be changed；If chip is in read-write state, closure OTP modules
Power path, controls to be written and read operation to OTP inside modules storage informations by internal logic；
（2）, when OTP modules control port directly by chip outside port control when：Can be destroyed when OTP modules are in
During the operation of the internal storage information of OTP modules, if chip is in non-read-write state, the power path of OTP modules is disconnected,
OTP inside modules storage information would not be changed；If chip is in read-write state, the power path of OTP modules is closed, led to
The outside port for crossing the chip of OTP modules is written and read operation to OTP inside modules storage informations.
Embodiment 2：
A kind of control method of the embedded OTP modules of chip of the invention, OTP modules have independent power path；OTP
The control port of module both can be controlled directly by the outside port of chip, it is also possible to by internal logic control；
（1）, when the control port of OTP modules is controlled by internal logic：When the control logic of OTP modules is to OTP modules
During the operation of the internal storage information for entering guild's destruction OTP modules, if chip is in non-read-write state, OTP modules are disconnected
Power path, then OTP inside modules storage information would not be changed；If chip is in read-write state, closure OTP modules
Power path, controls to be written and read operation to OTP inside modules storage informations by internal logic；
（2）, when OTP modules control port directly by chip outside port control when：Can be destroyed when OTP modules are in
During the operation of the internal storage information of OTP modules, if chip is in non-read-write state, the power path of OTP modules is disconnected,
OTP inside modules storage information would not be changed；If chip is in read-write state, the power path of OTP modules is closed, led to
The outside port for crossing the chip of OTP modules is written and read operation to OTP inside modules storage informations.
State（1）In, the operation of internal storage information of OTP modules can be destroyed for testing scanning chain is operated, OTP modules
In testing scanning chain, the scanned chain of logical value and its control structure of each of which unit are controlled control logic, can cause scanning
Chain some specific input values, destroy the internal storage information of OTP modules.
When the control port of OTP modules is directly controlled by the outside port of chip, i.e. the control port of OTP modules is direct
It is connected to the device control beyond chip exterior pin or chip.
State（2）In, the operation that can destroy the internal storage information of OTP modules is：When the outside port or power supply of chip
When path is multiplexed to other functions, can cause that OTP modules are in by write state or other meetings in the presence of some specific combined values
Destroy the mode of operation of the internal storage information of OTP modules.
By specific embodiment above, the those skilled in the art can readily realize the present invention.But should
Work as understanding, the present invention is not limited to above-mentioned specific embodiment.On the basis of disclosed embodiment, the technical field
Technical staff can be combined different technical characteristics, so as to realize different technical schemes.
Claims (4)
1. the control method of the embedded OTP modules of a kind of chip, it is characterised in that OTP modules have independent power path；OTP
The control port of module both can be controlled directly by the outside port of chip, it is also possible to by internal logic control；
（1）, when the control port of OTP modules is controlled by internal logic：When the control logic of OTP modules is carried out to OTP modules
During the operation of the internal storage information that can destroy OTP modules, if chip is in non-read-write state, the power supply of OTP modules is disconnected
Path, then OTP inside modules storage information would not be changed；If chip is in read-write state, the power supply of OTP modules is closed
Path, controls to be written and read operation to OTP inside modules storage informations by internal logic；
（2）, when OTP modules control port directly by chip outside port control when：OTP can be destroyed when OTP modules are in
During the operation of the internal storage information of module, if chip is in non-read-write state, the power path of OTP modules, OTP are disconnected
Inside modules storage information would not be changed；If chip is in read-write state, the power path of OTP modules is closed, passed through
The outside port of the chip of OTP modules is written and read operation to OTP inside modules storage informations.
2. a kind of control method of the embedded OTP modules of chip according to claim 1, it is characterised in that state（1）In,
The operation of internal storage information of OTP modules can be destroyed for testing scanning chain is operated, the control logic of OTP modules is surveyed in scan chain
During examination, the scanned chain of the logical value of each of which unit and its control structure control can cause scan chain some specific input values,
Destroy the internal storage information of OTP modules.
3. the control method of the embedded OTP modules of a kind of chip according to claim 1, it is characterised in that when OTP modules
Control port directly by chip outside port control when, i.e. the control port of OTP modules is directly connected to chip exterior and draws
Device control beyond pin or chip.
4. a kind of control method of the embedded OTP modules of chip according to claim 1, it is characterised in that state（2）In,
The operation that the internal storage information of OTP modules can be destroyed is：When the outside port or power path of chip are multiplexed to other work(
During energy, can cause that OTP modules are in the presence of some specific combined values and be deposited by write state or other inside that can destroy OTP modules
The mode of operation of storage information.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510087242.3A CN104808519B (en) | 2015-02-25 | 2015-02-25 | A kind of control method of the embedded OTP modules of chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510087242.3A CN104808519B (en) | 2015-02-25 | 2015-02-25 | A kind of control method of the embedded OTP modules of chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104808519A CN104808519A (en) | 2015-07-29 |
| CN104808519B true CN104808519B (en) | 2017-06-30 |
Family
ID=53693454
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510087242.3A Active CN104808519B (en) | 2015-02-25 | 2015-02-25 | A kind of control method of the embedded OTP modules of chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104808519B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113035249B (en) * | 2019-12-24 | 2023-09-26 | 澜起电子科技(昆山)有限公司 | Information tamper-proof system and method |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050262396A1 (en) * | 2004-04-26 | 2005-11-24 | Agilent Technologies, Inc | Apparatus and method for automated test setup |
| US7953987B2 (en) * | 2007-03-06 | 2011-05-31 | International Business Machines Corporation | Protection of secure electronic modules against attacks |
| WO2010057312A1 (en) * | 2008-11-24 | 2010-05-27 | Certicom Corp. | System and method for hardware based security |
| CN102565684A (en) * | 2010-12-13 | 2012-07-11 | 上海华虹集成电路有限责任公司 | Security-based scan chain control circuit, scan chain testing circuit and use method |
| GB2499985A (en) * | 2012-02-29 | 2013-09-11 | Nds Ltd | Current state of OTP memory used with new received information to define new OTP state for computation of new digital signature in preventing playback attacks |
| CN103177767B (en) * | 2013-04-08 | 2015-09-23 | 中国兵器工业集团第二一四研究所苏州研发中心 | A kind of simplification storage means for one-time programming storer |
-
2015
- 2015-02-25 CN CN201510087242.3A patent/CN104808519B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN104808519A (en) | 2015-07-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3703507B2 (en) | Non-volatile memory | |
| US20050237804A1 (en) | Chip protection register unlocking | |
| CN106484316A (en) | Method for managing a memory device, memory device and controller | |
| JP2016527647A (en) | Apparatus and method for configuring memory input / output for a hybrid memory module | |
| JP2007179594A (en) | Semiconductor integrated circuit device | |
| KR20110059558A (en) | Method and apparatus for protecting data of flash memory | |
| KR102556939B1 (en) | One-time programmable memory circuit and semiconductor apparatus including the same | |
| CN104808519B (en) | A kind of control method of the embedded OTP modules of chip | |
| CN107886997A (en) | A kind of EMMC test devices and method | |
| KR101967270B1 (en) | Memory device and method for testing the same | |
| JPH023841A (en) | Ic memory card | |
| US5883842A (en) | Memory card having block erasure type memory units which are used even when partially defective | |
| CN106847343A (en) | The method of testing of the mram memory based on ATE | |
| WO2015041307A1 (en) | Individual identification device | |
| TWI475566B (en) | Semiconductor memory device with reduced number of channels for test operation | |
| CN106205726B (en) | Quick test technology for EEPROM memory | |
| CN102750982A (en) | Burning method and system of encrypted memory chip | |
| JP6055047B1 (en) | Erase system for nonvolatile memory device, nonvolatile memory device, external erase device and method | |
| KR101270179B1 (en) | Method and apparatus for cascade memory | |
| CN102999002B (en) | The method of programmable logic controller device and control programmable logic controller device | |
| KR20150092386A (en) | Memory system | |
| CN203773957U (en) | Repeated writing device of OTP (one time programmable) register | |
| US7757141B2 (en) | Automatically extensible addressing for shared array built-in self-test (ABIST) circuitry | |
| CN101339812B (en) | Storage apparatus test apparatus | |
| CN107678679A (en) | Apply to the scan method of the super block of solid state storage device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| EXSB | Decision made by sipo to initiate substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |