CN104796632A - Detection device and testing method for embedded linear charge coupled device (CCD) dark noise - Google Patents

Detection device and testing method for embedded linear charge coupled device (CCD) dark noise Download PDF

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Publication number
CN104796632A
CN104796632A CN201410460577.0A CN201410460577A CN104796632A CN 104796632 A CN104796632 A CN 104796632A CN 201410460577 A CN201410460577 A CN 201410460577A CN 104796632 A CN104796632 A CN 104796632A
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ccd
line array
array ccd
temperature
signal
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瑚琦
高鹏飞
郭汉明
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Shanghai star Photoelectric Technology Co., Ltd.
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Shanghai Jian Pu Electro-Optical Technology Inc (us) 62 Martin Road Concord Massachusetts 017
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Priority to CN201410460577.0A priority Critical patent/CN104796632A/en
Publication of CN104796632A publication Critical patent/CN104796632A/en
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Abstract

The invention provides a detection device and a testing method for embedded linear charge coupled device (CCD) dark noise. The detection device for the embedded linear CCD dark noise comprises a CCD fixing unit for fixing a linear CCD, a temperature control unit comprising a temperature regulation component, a temperature sensing component and a driving device of the temperature regulation component, a shading unit and a CCD detection unit for detecting CCD dark noise. The CCD detection unit is connected with a first connector welded on the same printed circuit board together with the CCD fixing unit through a second connector in the CCD detection unit, thereby realizing connection with the CCD fixing unit and the temperature control unit. The detection device for the embedded linear CCD dark noise can measure the dark noise level of each pixel of the linear CCD at different temperatures and different integral time, thereby being convenient for users to select a proper CCD, providing the basis for final signal correction, and offering a guide function for an application environment of the system.

Description

Embedded line array CCD dark noise checkout gear and method of testing
Technical field
The invention belongs to line array CCD field, be specifically related to a kind of line array CCD dark noise checkout gear and method of testing.
Background technology
Line array CCD (Charge Coupled Device, charge coupled device) be a kind of photo-electric conversion element, have that cost is low, sensitivity high, be all widely used in fields such as industrial detection, bar code scan, file scan, spectral measurements.Ideally, the photobehavior of each pixel of CCD is on all four, and when not having illumination, its output signal voltage amplitude should be zero.But, due to reasons such as materials and process, under same light pretends use, the output of each pixel is not quite similar, and, when there is no light signal, it still has signal to export, i.e. the dark noise of CCD, and output signal voltage amplitude size is relevant with device temperature and the time of integration.Therefore, in actual applications, the signal magnitude that system obtains, except the light intensity signal of reality, also comprises dark-noise signal amplitude now.The dark noise of CCD evaluates an important parameter of CCD performance quality, and whether the CCD selected is suitable, decides the success or failure of a measuring system.
Under different application scenarios, because the temperature of CCD work is different with the time of integration, the noise size of the same pixel of same CCD is not identical yet, and generally, CCD noise level can increase with the rising of working temperature and the growth of the time of integration.In order to signal more accurately can be obtained, clear and definite understanding must be had to selected CCD noise level at different conditions, to revise in signal processing, thus improve the accuracy of systematic survey, the performance of improving product and competitiveness.Meanwhile, under known different condition when CCD dark noise, directive function can be played to the condition of work of system, such as can according to the temperature range of the given system works of measurement result and the time of integration scope etc.
At present, there is no the special device carrying out detecting for CCD dark noise, the method of demarcating the many employings of CCD dark noise is that user's foundation practical situations is to demarcate the CCD dark noise under specified conditions, due to system the situation of whole CCD dark noise cannot be learnt, therefore be also difficult to realize buying before instrument select suitable line array CCD, whether suitablely the model of CCD by virtue of experience or can only be determined by experiment after Instrument purchase.
Summary of the invention
The present invention, for solving the problem and carrying out, by providing a kind of embedded line array CCD dark noise checkout gear and detection method, makes the CCD dark noise under system testing different condition be achieved.
Present invention employs following technical scheme:
Embedded line array CCD dark noise checkout gear for detecting line array CCD dark-noise signal amplitude provided by the invention, there is such feature, comprise: temperature control unit, for controlling the working temperature of line array CCD, comprise temperature-controlled package, temperature sense assembly and temperature-controlled package driving element, temperature-controlled package is under the driving of temperature-controlled package driving element, and for changing the working temperature of line array CCD, temperature sense assembly is for responding to the change of line array CCD working temperature; Lightproof unit, is covered in outside line array CCD, for blocking the light be radiated on line array CCD; And CCD detecting unit, be connected with temperature control unit, for detecting different temperatures and line array CCD dark-noise signal amplitude under the different time of integration, wherein, CCD detecting unit can produce line array CCD work schedule, line array CCD work schedule drives line array CCD work, start output signal, that is, CCD dark-noise signal, meanwhile, line array CCD work schedule is also for controlling the time of integration in testing conditions.
Embedded line array CCD dark noise checkout gear provided by the invention, can also have such feature, also comprise: CCD fixed cell, comprise the locking member for fixing line array CCD.
Embedded line array CCD dark noise checkout gear provided by the invention, such feature can also be had: CCD detecting unit has human-computer interaction interface, microcontroller device, programmable logic device, level conversion device, signal conditioning circuit, high-precision adc part, data buffering device, display module and communication part, human-computer interaction interface, programmable logic device, data buffering device, display module and communication part are connected with microcontroller device, level conversion device, high-precision adc part and data buffering device are connected with programmable logic device, level conversion device is by line array CCD and signal conditioning circuit, high-precision adc part and data buffering device also form one and are linked in sequence.
Embedded line array CCD dark noise checkout gear provided by the invention, can also have such feature, also comprise: memory cell, be connected with micro-control unit, for the test data of poke line array CCD dark noise.
Embedded line array CCD dark noise checkout gear provided by the invention, can also have such feature: fixed cell and temperature sense components welding are in a printed circuit board.
Embedded line array CCD dark noise checkout gear provided by the invention, can also have such feature: printed circuit board (PCB) is also provided with the first connector be connected with line array CCD, temperature-controlled package and temperature-controlled package driving element.
Embedded line array CCD dark noise checkout gear provided by the invention, can also have such feature: be also provided with the second connector in CCD detecting unit, CCD detecting unit passes through the connection realization of the second connector and the first connector and the connection of CCD fixed cell and temperature control unit.
Embedded line array CCD dark noise checkout gear provided by the invention, such feature can also be had: signal conditioning circuit comprises voltage follower circuit, negative circuit and amplifying circuit three part be linked in sequence, voltage follower circuit is as the buffer between late-class circuit, late-class circuit is avoided to cause interference to ccd output signal, negative circuit is used for, the phasing back of dark-noise signal 180 °, amplifying circuit is used for CCD dark-noise signal to amplify, and improves sensitivity and the certainty of measurement of system.
A detection method for line array CCD dark noise, has such feature, comprises the following step:
Step 1, testing conditions is set in human-computer interaction interface, microcontroller device is according to the input parameter of user, first the working temperature of control temperature adjusting part driving element setting line array CCD, and detect the variations in temperature coming from temperature sense assembly in real time, when working temperature line array CCD being detected is design temperature, send data acquisition commencing signal to programmable logic device;
Step 2, programmable logic device is after starting of receiving that microcontroller device sends carries out data acquisition signal, produce line array CCD, high-precision adc part and data buffering device work schedule, and control line array CCD, high-precision adc part and data buffering device synchronous working;
Step 3, the line array CCD work schedule that programmable logic device exports, after level conversion device is by programmable logic device level conversion to line array CCD operation level, drives line array CCD work, and line array CCD starts output signal, i.e. CCD dark-noise signal;
Step 4, under the driving of CCD work schedule, after the predetermined integral time, the charge signal stored in line array CCD is shifted out from signal output part, and the charge signal migrated out carries out anti-phase through signal conditioning circuit and amplifies;
Step 5, the output signal in step 4 is converted into digital signal by high-precision adc part under the control of programmable logic device, and digital signal is stored in data buffering device;
Step 6, microcontroller device, from the digital signal read step 5 in data buffering device in internal memory, will read data reduction and become the real output value of line array CCD, and Control Items shows according to the yield value of signal conditioning circuit.
Line array CCD dark noise detection method provided by the invention, also can have and have such feature: for the line array CCD of different model, and programmable logic device can be utilized to write different drivers, with the measurement needs of satisfied different line array CCD dark noise.
Invention effect and effect
The invention provides a kind of embedded line array CCD dark noise checkout gear and method of testing, embedded line array CCD dark noise checkout gear has the CCD fixed cell for fixing line array CCD, by temperature-controlled package, the temperature control unit of temperature sense assembly and temperature-controlled package driving element composition, lightproof unit and for detecting CCD dark noise CCD detecting unit, the first connector that CCD detecting unit is welded on same printed circuit board (PCB) by the second connector in it and same CCD fixed cell is connected, realize the connection with CCD fixed cell and temperature control unit, embedded line array CCD dark noise checkout gear provided by the invention is the full-automatic dark noise measuring instrument for line array CCD, according to its method of testing, line array CCD can be measured in different temperatures, the dark noise level of each pixel under the different time of integration, then pass through PC control, the data of measurement are directly passed in host computer and carries out data analysis, shown by display module simultaneously, make embedded line array CCD dark noise checkout gear provided by the invention that user can be made to decide the optimum temperature range of system works according to the noise situations of CCD under condition of different temperatures, directive function is provided for user selects suitable CCD device and provides foundation for final signal correction simultaneously.
Accompanying drawing explanation
Fig. 1 is embedded line array CCD dark noise structure of the detecting device schematic diagram of the present invention;
Fig. 2 is the structural representation of line array CCD detecting unit of the present invention;
Fig. 3 is the driving circuit principle figure of temperature-controlled package driving element of the present invention;
Fig. 4 is level shifting circuit schematic diagram of the present invention;
Fig. 5 is Output Signal of Linear CCD's schematic diagram of the present invention;
Fig. 6 is the voltage follower circuit schematic diagram in signal conditioning circuit of the present invention;
Fig. 7 is the negative circuit schematic diagram in signal conditioning circuit of the present invention;
Fig. 8 is amplifying circuit schematic diagram in signal conditioning circuit of the present invention;
Fig. 9 is high-precision adc part operation principle schematic diagram of the present invention; And
Figure 10 is data buffering device operation principle schematic diagram of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described.
Fig. 1 is the embedded line array CCD dark noise structure of the detecting device schematic diagram of the present embodiment.
As shown in Figure 1, embedded line array CCD dark noise checkout gear 100 comprises line array CCD 1, the CCD fixed cell 2 of fixing linear array CCD1, the temperature control unit 3 controlling linear array CCD1 working temperature, lightproof unit 4, CCD detecting unit 5, printed circuit board (PCB) (PCB) 6 and the first connector 7.
Temperature control unit 3 comprises temperature-controlled package 31, temperature-controlled package driving element 32 and temperature sense assembly 33, temperature-controlled package 31 is under the driving of temperature-controlled package driving element 32, for changing the working temperature of line array CCD 1, temperature sense assembly 33 is for responding to the change of linear array CCD1 working temperature; Fixed cell 2 and the first connector 7 are welded in the both sides of printed circuit board (PCB) 6 the same face respectively, lightproof unit 4 covers the outside of fixed cell 1 and temperature control unit 3, to block the light be radiated on line array CCD 1, the first connector 7 has the pin be connected with line array CCD 1, temperature-controlled package 31 and temperature-controlled package driving element 32.
CCD detecting unit 5 has the second connector 51, second connector 51 have power interface 511, the signaling interface 512 of driven CCD work and the signaling interface 513 of reception CCD output that CCD powers, second connector 51 is connected with the first connector 7 by these interfaces, and then the connection of realization and line array CCD 1 and temperature control unit 3.
Fig. 2 is the structural representation of the line array CCD detecting unit of the present embodiment.
As shown in Figure 2, CCD detecting unit 5 comprises alternating interface between man and computer 52, microcontroller device (MCU) 53, programmable logic device 54, level conversion device 55, signal conditioning circuit 56, high-precision adc part (ADC) 57, data buffering device (FIFO) 58, display module 591 and communication part 593, microcontroller device 53 is also connected with memory module 592, preserves for the data read by microcontroller device 53.
Alternating interface between man and computer 52, programmable logic device 54, data buffering device 58, display module 591, memory module 592 and communication part 593 are connected with microcontroller device 53, level conversion device 55, high-precision adc part 57 and data buffering device 58 are connected with programmable logic device 54, and level conversion device 55 also forms one by line array CCD 1 and signal conditioning circuit 56, high-precision adc part (ADC) 57 and data buffering device (FIFO) 58 and is linked in sequence.
The detection method of the line array CCD dark noise that the present embodiment provides, comprises the following step:
Step 1, design temperature measuring range T in human-computer interaction interface 52 1-T 2, the time of integration scope t 1-t 2, measure temperature interval △ T, derivative time interval △ t and the times of collection N under predetermined temperature and the time of integration;
Step 2, microcontroller device 53 is according to the input parameter of user, first control temperature adjusting part driving element 31 sets the working temperature of line array CCD 1 and actuation temperature regulatory components 32 is started working, microcontroller device 53 Real-Time Monitoring comes from the variations in temperature of temperature sense assembly 33 simultaneously, when working temperature line array CCD 1 being detected is design temperature, send data acquisition commencing signal to programmable logic device 54;
Step 3, programmable logic device 54 is after starting of receiving that microcontroller device 53 sends carries out data acquisition signal, produce line array CCD, high-precision adc part and data buffering device work schedule, and control line array CCD 1, high-precision adc part 57 and data buffering device 58 synchronous working, wherein, the high level that programmable logic device 54 exports need be converted to the high level of line array CCD demand through level conversion device 55, driving line array CCD works, start output signal, the CCD dark-noise signal namely in the present embodiment;
Step 4, under the driving of CCD work schedule, after the predetermined integral time, the charge signal stored in line array CCD is shifted out from signal output part, and the charge signal migrated out carries out anti-phase through signal conditioning circuit and amplifies;
Step 5, the output signal in step 4 is converted into digital signal by high-precision adc part 57 under the control of programmable logic device 54, and digital signal is stored in data buffering device 58;
Step 6, after whole pixel Charger transfer of line array CCD 1 inside, programmable logic device 54 sends data acquisition end signal to microcontroller device 53, and a frame data conversion is complete, and waits for that microcontroller device 53 sends new data acquisition signal;
Step 7, microcontroller device 53 reads CCD dark noise digital signal data to internal memory in data buffering device 58, according to the signal amplification factor inside signal conditioning circuit, calculate the output of actual each pixel, and be stored in the memory module 592 be connected with microcontroller device 53, data are shown on display module 591 with the form of broken line graph simultaneously, also by communication part 593 to computer or smart mobile phone transmitting test data;
Step 8, after a frame data measurement terminates, microcontroller device 53 detects Current Temperatures and whether the number of times measured under the time of integration is N, when reaching N time, the data that N time is measured is averaged, and is T using this mean value as working temperature 1, the time of integration is t 1condition under, the signal value that each pixel of CCD exports, mean value is stored in memory module 592 by microcontroller device 53, shows on display module 591 simultaneously, also by communication part 593 to computer or smart mobile phone transmitting test data;
Step 9, when working temperature is T 1, the time of integration is t 1time after CCD dark noise measures, first keep working temperature constant, change the time of integration, measuring in temperature is T 1time, each time of integration of setting CCD dark noise size under condition, afterwards, then measuring tempeature is T 1during+Δ T, the dark noise size of CCD under each time of integration condition, the like, until measuring the dark noise size of CCD under complete various temperature and time of integration condition or receiving till user stops the instruction of measuring.
For the line array CCD of different model, programmable logic device 54 can be utilized to write different drivers, to meet the measurement needs to different line array CCD dark noise.
According to the implementation efficiency of the convenience of practical application and the working temperature of line array CCD, in the present embodiment, fixed cell is locking member, temperature-controlled package is semiconductor cooling device (TEC), temperature-controlled package driving element is semiconductor cooling device driving element, temperature sensing device is thermistor, and display module is LCD, and memory module is SD card, communication part comprises the wireline interfaces such as 232 serial ports, USB interface, network interface, also comprises the wireless communication mode such as bluetooth, WIFI.
Below the operation principle of the section components in the present embodiment is described further.
One. temperature control principle
Fig. 3 is the driving circuit principle figure of temperature-controlled package driving element in the present embodiment.
As shown in Figure 4, temperature sense assembly 32 is thermistor R to semiconductor cooling device (TEC) driving circuit principle figure 8, for detecting the ambient temperature of linear array CCD1 work, its resistance is understood variation with temperature and changes, and causes the input voltage V on chip 311 No. 18 pin 1change.Input voltage V on chip 311 No. 19 pin 2size is determined by user, and user inputs temperature value to be set by human-computer interaction interface 522, and the temperature value of input is converted to corresponding magnitude of voltage V by microcontroller device 53 2, domination number mode convertion device (DAC) 315 exports, and port 312 is the logic interfacing of microcontroller device 53 domination number mode convertion device (DAC) 315.
The port 314 of chip 311 o.11 pin is the low-power consumption mode selecting side of semiconductor cooling device driving element 32, be connected with the I/O port of microcontroller device 53, when this pin is low level, chip 311 is in low-power consumption mode, when this pin is high level, chip 311 normally works.
Resistance R 5, R 6, R 7with electric capacity C 10, C 11, C 12form PID control ring 313, PID control ring 313 by elements such as the amplifiers that pin 14,15,17 and 45 and chip 311 are inner integrated and pass through V 1with V 2difference control size of current and the direction of flowing through TEC; When design temperature is different from the ambient temperature of line array CCD work at present, i.e. V 1with V 2time unequal, control loop will change the size of current or direction that flow through TEC automatically, thus causes the temperature of TEC cold and hot surface to change, and then affects the ambient temperature of CCD work, causes the resistance of thermistor R8 to change, and changes V 1size, until V 1and V 2till equal, now, the ambient temperature of CCD real work is identical with design temperature.
V tEMPfor V 1output voltage after chip 311 internal buffer, microcontroller device 53 obtains this magnitude of voltage by A/D converter 57, the reference voltage V that chip 311 exports rEFwith regulating resistance R 4size is fixed value, therefore can calculate R according to following formula 8size:
R 8 R 4 + R 8 = V TEMF V REF
Real time temperature when showing that CCD works by the relation of thermistor resistance and temperature changes.
Two. Change of integral time principle
In the line array CCD work schedule that programmable logic device 54 produces, comprise the control to the different time of integration, export different line array CCD work schedules by programmable logic device 54, realize line array CCD and test within the different times of integration.
Three. the component working principle in line array CCD dark noise test process
Microcontroller device (MCU)
Microcontroller device MCU (Micro Control Unit), also known as one chip microcomputer (Single Chip Microcomputer) or single-chip microcomputer, refer to the appearance along with large scale integrated circuit and development thereof, by the CPU of computer, RAM, ROM, timer conter and multiple I/O Interface integration on one chip, form the computer of chip-scale, do various combination for different application scenarios and control.Microcontroller device 53 in the present embodiment carries out measurement display according to user's input parameter control system to CCD dark noise, preserves or be sent in host computer 521 by communication interface to process according to user instruction to measurement data.
Programmable logic device
The programmable logic device 54 adopted in the present embodiment is field programmable gate array (FPGA) or Complex programmable logical device (CPLD), after what FPGA/CPLD received that microcontroller device 53 sends start to carry out data acquisition signal, produce CCD, ADC, the sequential of FIFO work, and control linear array CCD1, high-precision adc part 57 and data buffering device 58 synchronous working, the each pixel output signal exported by CCD is stored in data buffering device 58 after high-precision adc part 57 is changed, after frame data store, FPGA/CPLD sends data acquisition end signal to microcontroller device 53, and wait for that microcontroller device 53 sends new data acquisition signal.
Fig. 4 is the level shifting circuit schematic diagram in the present embodiment.
As shown in Figure 4, the high level that programmable logic device I/O port 552 exports is generally 3.3V, and CCD logic high 5V or higher often, therefore need level shifting circuit that the high level that I/O port 552 exports is converted to the logic high of CCD demand.Level shifting circuit as shown in Figure 5, the supply power voltage VCC of circuit is CCD logic power, I/O port output level is from the input of IN end, after light lotus root 551, export from OUT, be converted to CCD logic level, CCD logic level is by the signaling interface 512 of the driven CCD work in the second connector 51, drive linear array CCD1 to work through the first connector 7 again, produce CCD dark-noise signal.
Fig. 5 is Output Signal of Linear CCD's schematic diagram in the present embodiment.
Line array CCD 1 outputs signal definition as shown in Figure 3, SS is zero reference potential, OS is that CCD exports, when unglazed, VOS is maximum for its output voltage amplitude, along with the enhancing of light intensity, VOS is more and more lower for output voltage amplitude, when light intensity reaches a certain value, output saturation, output voltage amplitude VOS is minimum.
Signal conditioning circuit
Signal conditioning circuit 56 is by anti-phase for the output signal of CCD and amplification, make when there is no light signal, circuit exports as zero potential, along with the enhancing of light intensity, circuit output voltage amplitude is higher, when light intensity reaches a certain value, output saturation, output voltage amplitude is the highest, signal conditioning circuit is by the voltage follower circuit 561 be linked in sequence, negative circuit 562 and amplifying circuit 563 3 part composition, the dark-noise signal of line array CCD is through the first connector 7 and the IN end input of signaling interface 513 at voltage follower circuit 561 receiving CCD output, export from the OUT end of amplifying circuit 563, and then be inverted and amplify.
Fig. 6 is the voltage follower circuit schematic diagram in embodiment in signal conditioning circuit.
As shown in Figure 6, chip 5611 is voltage stabilizing chip, and VCC is the supply power voltage in circuit, and VSS is this circuit common ground terminal voltage, R 1composition voltage divider, voltage follower circuit input impedance is high, output impedance is low can be used as and buffer between late-class circuit, avoids late-class circuit to export CCD dark-noise signal and causes interference, export equal with input signal.
Fig. 7 is the negative circuit schematic diagram in the present embodiment in signal conditioning circuit.
As shown in Figure 7, the reference voltage of voltage stabilizing chip 5611 exports as V negative circuit schematic diagram rEF, circuit exports V oUTwith input V iNrelation as follows:
V OUT = R 4 R 3 + R 4 × V REF + R 2 × R 4 R 1 × ( R 4 + R 3 ) × V REF - R 2 R 1 × V IN
R 3for variable resistor, R 1– R 4for fixed resistance, known by above formula, when unglazed, V iNfor maximum, now by regulating R 3the size of resistance makes V oUToutput voltage amplitude is zero.Along with the enhancing V of light signal iNvalue diminishes, V oUTvalue becomes large, thus reaches anti-phase object.
Fig. 8 is the amplifying circuit schematic diagram in the present embodiment in signal conditioning circuit.
As shown in Figure 5, it exports with the relation of input as follows amplifying circuit schematic diagram:
V OUT = ( 1 + R 2 R 1 ) × V IN
R 1for fixed resistance, R 2for variable resistor, regulate R 2the large I of resistance change the multiplication factor of amplifying circuit, thus change the sensitivity of measuring circuit.
Fig. 9 is high-precision adc part operation principle schematic diagram in the present embodiment.
For improving the accuracy of measurement result, high high-precision adc device must be adopted.What the present embodiment was selected is have 18bit resolution stop and reserves (SAR) type high-precision adc part ADS8381, and its sampling rate can reach 580KHz.
As shown in Figure 9, pin CS, RD, CNV forms the port 571 be connected with the I/O port of programmable logic device 54; Pin BUSY, BUS, BYTE form the port 573 be connected with programmable logic device 54IO mouth; Data/address bus AD 0-AD 17port 572 be connected with the data-in port 584 in data buffering device 58; Input end of analog signal mouth 574 is connected with amplifying circuit 563, and for CCD dark-noise signal that is anti-phase through signal conditioning circuit 56 and that amplify is inputted high-precision adc part, reference voltage input terminal mouth 575 Low Drift Temperature, high-precision voltage reference source connect.
Pin CS is that sheet selects port, Low level effective; Translation data in high-precision adc part 57, for reading enable port, is outputted to data/address bus AD during trailing edge by pin RD 0-AD 17on; Pin CNV is change over clock input port, and trailing edge starts to carry out analog-to-digital conversion; Pin BUSY is working state output terminal mouth, and high level represents current and is in analog-to-digital conversion state; Pin BUS, BYTE, for selecting valid data bus bits, can be configured to 8,16 or the output of 18 BITBUS network.
According to high precision analogue conversion timing sequence, programmable logic device 54 requires that controlling high-precision adc part 57 works, and converts the analog signal that each CCD pixel exports to digital signal.
Figure 10 is data buffering device operation principle schematic diagram in the present embodiment.
Data buffering device can adopt field programmable gate array (FPGA) or Complex programmable logical device (CPLD) and static random access memory (SRAM) device to form Large Volume Data buffering device 57, also independently components and parts can be selected, as IDT72V245, the latter uses fairly simple.The latter selected in the present embodiment, has 18 bit data bus width, and capacity is 4096*18bit, and can increase data-bus width and buffer memory capacity by the mode of multi-disc cascade.
As shown in Figure 10, pin WEN, RS, OE, REN, RCLK, EF and Q 0-Q 17form the port 581 be connected with the I/O port of microcontroller device 53, port 582 is connected with programmable logic device 54, port FL, WXI, RXI, WXO, RXO form multi-disc level coupling logic interfacing 583, multiple data buffering device can increase data-bus width and buffer memory capacity by logic interfacing 583 in the mode of multi-disc cascade, port 584 is connected with the port 571 in Fig. 9, stores for the CCD digital signal in high-precision adc part 57 being transferred in data buffering device 58.
Pin LD is initial address offset control port; Pin WEN is write enable signal port, Low level effective; Pin WCLK is write clock signal port, when pin WEN is low level, and input data bus D 0-D 17data when WCLK rises stored in data buffering device 58; Pin OE is output enable port, Low level effective, data/address bus Q during high level 0-Q 17for high-impedance state; Pin RS is reset signal port, and when RS is low level, data buffering device 58 is read and write pointer and reset to initial value; Pin REN for reading enable port, Low level effective; Pin RCLK is readout clock, and when output enable, when pin REN is low level, in data buffering device, data output to data/address bus Q when RCLK rising edge 0-Q 17on; Pin EF is the empty flag bit of data buffering device, Low level effective; Pin HF is the half-full flag bit of data buffering device, Low level effective; Pin FF is data buffering device full scale will position, Low level effective; Pin PAE is that in data buffering device, data volume reaches programming lower limit flag bit, Low level effective; Pin PAF is that in data buffering device, data volume reaches programming upper limit flag bit, Low level effective.
The first control data buffering device 58 of microcontroller device 53 resets, when needs carry out data acquisition, microcontroller device 53 is by WEN set low level, allow data write data buffering device 58 processed, now, programmable logic device 54 control high-precision adc part 57 work and by conversion after data be directly deposited in data buffering device 58; When needs read data, OE pin, REN pin are set to low level by microcontroller device 53, allow sense data in data buffering device 58, and control RCLK pin produces read signal clock, by data/address bus Q 0-Q 17the data of upper output are read into Installed System Memory, and detect EF pin level state, when EF pin is low level, digital independent is complete simultaneously.
Embodiment effect and effect
Present embodiments provide a kind of embedded line array CCD dark noise checkout gear and method of testing, embedded line array CCD dark noise checkout gear has the CCD fixed cell for fixing line array CCD, by temperature-controlled package, the temperature control unit of temperature sense assembly and temperature-controlled package driving element composition, lightproof unit and for detecting CCD dark noise CCD detecting unit, the first connector that CCD detecting unit is welded on same printed circuit board (PCB) by the second connector in it and same CCD fixed cell is connected, realize the connection with CCD fixed cell and temperature control unit, the embedded line array CCD dark noise checkout gear that the present embodiment provides is the full-automatic dark noise measuring instrument for line array CCD, according to its method of testing, line array CCD can be measured in different temperatures, the dark noise level of each pixel under the different time of integration, then pass through PC control, the data of measurement are directly passed in host computer and carries out data analysis, shown by display module simultaneously, the embedded line array CCD dark noise checkout gear that the present embodiment is provided can make user decide the optimum temperature range of system works according to the noise situations of CCD under condition of different temperatures, directive function is provided for user selects suitable CCD device and provides foundation for final signal correction simultaneously.
The invention is not restricted to the scope of embodiment; to those skilled in the art; as long as various change to limit and in the spirit and scope of the present invention determined in described claim; these changes are apparent, and all innovation and creation utilizing the present invention to conceive are all at the row of protection.

Claims (10)

1. an embedded line array CCD dark noise checkout gear, for detecting described line array CCD dark-noise signal amplitude, is characterized in that, comprise:
Temperature control unit, for controlling the working temperature of described line array CCD, comprise temperature-controlled package, temperature sense assembly and temperature-controlled package driving element, described temperature-controlled package is under the driving of described temperature-controlled package driving element, for changing the working temperature of described line array CCD, described temperature sense assembly is for responding to the change of described line array CCD working temperature;
Lightproof unit, is covered in outside described line array CCD, for blocking the light be radiated on described line array CCD; And
CCD detecting unit, is connected with described temperature control unit, for detecting different temperatures and described line array CCD dark-noise signal amplitude under the different time of integration,
Wherein, described CCD detecting unit can produce line array CCD work schedule, and described line array CCD work schedule drives described line array CCD work, starts output signal, i.e. CCD dark-noise signal,
Described line array CCD work schedule is also for controlling the time of integration in testing conditions.
2. embedded line array CCD dark noise checkout gear according to claim 1, is characterized in that, also comprise:
CCD fixed cell, comprises locking member, and described locking member is used for fixing described line array CCD.
3. embedded line array CCD dark noise checkout gear according to claim 2, is characterized in that:
Wherein, described CCD detecting unit has man-machine mutual interface, microcontroller device, programmable logic device, level conversion device, signal conditioning circuit, high-precision adc part, data buffering device, display module and communication part,
Described human-computer interaction interface, described programmable logic device, described data buffering device, described display module and described communication part are connected with described microcontroller device, described level conversion device, described high-precision adc part and described data buffering device are connected with described programmable logic device, and described level conversion device also forms one by described line array CCD and described signal conditioning circuit, described high-precision adc part and described data buffering device and is linked in sequence.
4. embedded line array CCD dark noise checkout gear according to claim 3, is characterized in that, also comprise:
Wherein, memory module, is connected, for store test data with described microcontroller device.
5. embedded line array CCD dark noise checkout gear according to claim 4, is characterized in that:
Wherein, described fixed cell and described temperature sense components welding are in a printed circuit board.
6. embedded line array CCD dark noise checkout gear according to claim 5, is characterized in that:
Wherein, described printed circuit board (PCB) is also provided with the first connector be connected with described line array CCD, described temperature-controlled package and described temperature-controlled package driving element.
7. embedded line array CCD dark noise checkout gear according to claim 6, is characterized in that:
Wherein, be also provided with the second connector in described CCD detecting unit, described CCD detecting unit realizes the connection with described CCD fixed cell and described temperature control unit by the connection of described second connector and described first connector.
8. embedded line array CCD dark noise checkout gear according to claim 3, is characterized in that:
Wherein, described signal conditioning circuit comprises voltage follower circuit, negative circuit and amplifying circuit three part be linked in sequence, described voltage follower circuit is as the buffer between late-class circuit, avoid late-class circuit to export described ccd signal and cause interference, described negative circuit is used for the phasing back 180 ° of described ccd output signal, and described amplifying circuit is used for the output signal of described CCD to amplify.
9. a detection method for line array CCD dark noise, is characterized in that, comprises the following step:
Step 1, testing conditions is set in human-computer interaction interface, microcontroller device is according to the input parameter of user, first control temperature adjusting part driving element sets the working temperature of described line array CCD, and detect the variations in temperature coming from temperature sense assembly in real time, when the working temperature described line array CCD being detected is design temperature, send data acquisition commencing signal to programmable logic device;
Step 2, described programmable logic device is after starting of receiving that described microcontroller device sends carries out data acquisition signal, produce line array CCD, high-precision adc part and data buffering device work schedule, and control described line array CCD, high-precision adc part and data buffering device synchronous working;
Step 3, the described line array CCD work schedule that described programmable logic device exports through level conversion device by described programmable logic device level conversion to described line array CCD operation level, drive line array CCD work, start to output signal, i.e. CCD dark-noise signal;
Step 4, under the driving of described CCD work schedule, after the predetermined integral time, the charge signal stored in described line array CCD is shifted out from signal output part, and the charge signal migrated out carries out anti-phase through signal conditioning circuit and amplifies;
Step 5, the output signal in step 4 is converted into digital signal by described high-precision adc part under the control of described programmable logic device, and described digital signal is stored in described data buffering device;
Step 6, described microcontroller device is from the described digital signal data read step 5 in described data buffering device in internal memory, to read data reduction and become the real output value of described line array CCD according to the yield value of described signal conditioning circuit, and Control Items shows.
10. line array CCD dark noise detection method according to claim 9, is characterized in that:
Wherein, for the described line array CCD of different model, described programmable logic device can be utilized to write different drivers, with the measurement needs of the described line array CCD dark noise of satisfied difference.
CN201410460577.0A 2014-09-11 2014-09-11 Detection device and testing method for embedded linear charge coupled device (CCD) dark noise Pending CN104796632A (en)

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