CN104793189B - A kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA - Google Patents
A kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA Download PDFInfo
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- CN104793189B CN104793189B CN201510187166.3A CN201510187166A CN104793189B CN 104793189 B CN104793189 B CN 104793189B CN 201510187166 A CN201510187166 A CN 201510187166A CN 104793189 B CN104793189 B CN 104793189B
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- fpga
- intermediate frequency
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/285—Receivers
Abstract
The present invention relates to radar engineering field, it is related specifically to the radar system of intermediate frequency coherent, a kind of specifically marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, the intermediate frequency amplification module being connected including the output end with receiver rf front-end, it is characterized in that, also include A/D sampling A/D chips, Digital Down Converter Module, described Digital Down Converter Module includes the digital controlled oscillator based on FPGA, low pass filter and the decimation filter of digital sequentially set；The EF power signal of receiver rf front-end output is changed into voltage signal by intermediate frequency amplification module, then is conveyed to Digital Down Converter Module after being delivered to A/D sampling A/D chip collection voltages signals.The present invention is simple in construction, and the flexibility of system is high, compared with analog converting method respectively obtains I/Q baseband signals, improve the image-frequency rejection ratio of i/q signal, there is low drifting, low distortion, and Radar Signal Processing of the useful information in echo-signal in the later stage can be extracted to greatest extent and operated.
Description
Technical field
The present invention relates to radar engineering field, is related specifically to the radar system of intermediate frequency coherent, specifically a kind of base
In FPGA marine radar digitised Intermediate Frequency coherent receiving processing system.
Background technology
Marine radar is a kind of traditional radio navigation device, and in ship coastal waters, positioning, guiding ship are narrow into and out of port
Fairway navigation and played a role in collision prevention.Nowadays marine radar can be not only used for marine navigation, can be also used for port
Mouth management and ocean remote sensing etc..At present, domestic and international marine radar mostly uses non-coherent pulse system, due to being shaken using magnetron
Swing device generation radio-frequency pulse frequency to be not sufficiently stable, the phase between pulse changes at random, therefore the simulation method of reseptance of main flow can not
Using the frequency information and phase information in echo, simply the amplitude after echo envelope detection using echo is carried out in base band
Target detection, the further raising of the detectability and tracking performance to target is constrained significantly.The application of coherent radar can be with
Such issues that solve well, the main difference of itself and non-coherent radar are that coherent radar can carry out doppler information
Extraction.Coherent system is divided into full coherent system and intermediate frequency coherent system, intermediate frequency coherent radar than full phase parameter radar have it is higher and
The more reasonably ratio of performance to price.Also, nowadays the ocean remote sensing purposes of marine radar is more and more important, during for ocean remote sensing
Antenna rotation rate requires higher, and the reception system flexibility simulated is low, and processing speed does not reach requirement, and digitised Intermediate Frequency coherent connects
Receiving processing system turns into inexorable trend.
As digital signal processing chip technology develops rapidly, although algorithm can be with general, its stability and speed are also
Industrial requirement is not reached.Under the higher and higher background of switching rate of current high-speed a/d change-over circuit, digitized radar connects
Receipts machine proposes higher requirement to the processing speed of digital signal processor.Traditional common DSP because its processing speed is limited,
A/D chips often can not directly be handled to high-speed data-flow caused by if signal sampling, and FPGA develops into intermediate frequency coherent
Reception system provides technology place mat, and FPGA is configurable, programmable, can conveniently realize digital controlled oscillator, low pass filter
Etc. function, the flexibility of system can be preferably improved.Digitised Intermediate Frequency reception system based on FPGA design also is compliant with software
The basic thought of radio, substantially increase the reliability of Radar Signal Processing part below.
In radar mean frequency reception system, the patent for having retrieved correlation has：A kind of patent of invention [1] (universal number
Word intermediate-frequency receiver, application number：201210507125.4 inventor：Make friends with peak), describing one kind has flexible group of multichannel
The digital if receiver with parallel processing structure is closed, is made full use of at ASIC, DSP and FPGA collaboration processing and multi-channel parallel
It the advantage of reason, can both be used as flexible channel reception, full probability reception can be used as again, versatility is good, and the scope of application is wide, can
Apply in multiple fields such as radar, communication, observing and controlling.But processing module chip is more, structure is complex so that with whole thunder
The system design reached is not compact enough；Utility model patent [2] (ship-navigation radar Larger Dynamic scope if digitization module, Shen
Please number：201320044573.5 inventor：Ge Junxiang, Pan An, Shandong build refined etc.), describe a kind of ship-navigation radar Larger Dynamic
Scope if digitization module, is amplified intermediate frequency with the mode of integrated circuit, the part such as digital sample is integrated in same module, is
System is more succinct.But FPGA is directly defeated by by interface after collection reception signal and is used for signal transacting, signal can only be extracted
Amplitude information and phase information can not be extracted, determine that the radar can not make full use of the doppler information of echo-signal；Hair
(a kind of radar receives digital coherent processing system, application number to bright patent [3]：201310024773.9 inventor：Xu Hongchun,
King is progressive), describe a kind of radar and receive digital coherent processing system, intermediate frequency direct digitization is taken, by launching main ripple sample
This signal carries out convolution algorithm with intermediate frequency echo data signal, eliminates the shadow that transmission signal first phase, frequency are unstable, amplitude is unstable
Ring, realize the steady phase of digital frequency stabilization, adaptive frequency compensation, receiving coherent processing.But twin-channel pattern will ensure that clock is same
Step, i/q signal amplitude-phase are unanimously relatively complicated.
The content of the invention
The technical purpose of the present invention is to overcome above mentioned problem, there is provided a kind of marine radar based on FPGA of simple possible
Digitised Intermediate Frequency coherent receiving processing system.Main difference with non-coherent radar is that coherent radar can carry out Doppler
The extraction of information, the marine radar can be made to be used for ocean remote sensing in addition.Main demodulation work is all real in digit chip
It is existing, it is simple in construction, implement and facilitate feasible, and the flexibility of system is high, and I/Q base band is respectively obtained with analog converting method
Signal is compared, and improves the image-frequency rejection ratio of i/q signal, has the series of advantages such as low drifting, low distortion, and can be maximum
Radar Signal Processing of the useful information in the later stage extracted to limit in echo-signal operates.And whole system exploitation simply has
Effect, it is easy to accomplish.
To achieve these goals, the technical solution adopted in the present invention is：A kind of marine radar numeral based on FPGA
Change intermediate frequency coherent receiving processing system, including the intermediate frequency amplification module being connected with the output end of receiver rf front-end, its feature exist
In, in addition to A/D sampling A/D chips, Digital Down Converter Module, described Digital Down Converter Module include sequentially setting based on
FPGA digital controlled oscillator, low pass filter and decimation filter of digital；The EF power signal warp of receiver rf front-end output
Cross intermediate frequency amplification module and be changed into -1.7V ~+1.7V voltage signal, then be delivered to A/D sampling A/D chips, A/D sampling A/D chips according to
Digital Down Converter Module is conveyed to after the sampling control signal collection voltages signal of time schedule controller output based on FPGA.
A kind of foregoing marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, the amplification of described intermediate frequency
Module includes the logafier and level adjusting circuit sequentially set.
A kind of foregoing marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, described numerical control vibration
Device is designed based on FPGA application hardware description language verilog, using loop up table, including FREQUENCY CONTROL word register, 32
Five position phase accumulator, phase controlling word register, 16 bit address generators, waveform generator ROM parts；In input clock
Triggering under, using described frequency control word as step value, be used for depositing with phase controlling word register and represent 32 of frequency
Phase value is sent into accumulator in the lump uses Altera adder progress phase-accumulated, and the ground of storage table is used as by the use of the accumulated value
Location；Waveform generator ROM is read-only sine and cosine look-up table, and the sine and cosine assignment for reading corresponding address is exported, and exports frequency
Rate is controlled by the input of frequency control word.
A kind of foregoing marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, described digital decimation
Wave filter is the cascading filter based on FPGA application hardware description languages verilog designs, and the first order of cascading filter is adopted
With the cic filters of 5 times of extractions, and cic filter can bring logical band attenuation, therefore filter CIC using compensating filter
Device passband planarizes, i.e., carries out passband compensation plus FIR filter after cic filter, improve the whole of digital filter
Body performance, therefore after cic filter reduces signal sampling frequencies, the second level uses the FIR filter of 4 times of extractions, the third level
Processing is filtered using the FIR filter of 2 times of extractions, improves resource utilization.
Foregoing a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, in FPGA PLL cores
Portion carry out clock division processing and produce 80MHz output clock be supplied to A/D sampling A/D chips as sample frequency.
A kind of foregoing marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, described A/D samplings
The A/D that chip carries out 16 to voltage signal is sampled.
Compared with prior art, the invention has the advantages that：
1. intermediate frequency amplifier section is put plate and ADC chips by and separated in system, only simulation ground is without numeral on PCB
Ground, noise jamming can be reduced.
2. the improvement of digital received is carried out on the basis of spot ship pathfinder, the processing speed compared with simulating and receiving
It hurry up, precision height, the marine radar is also suitable for the IF process requirement of ocean remote sensing.
3. analog-to-digital conversion module is controlled ADC chips output sampled signal and produced with PLL cores inside FPGA and adopted using FPGA
Sample frequency, this method are easy and effective, it is easy to accomplish.
4. replace traditional DSP with FPGA to realize intermediate frequency coherent receiving processing system, traditional common DSP can be avoided at it
Reason speed is limited, can not directly handle A/D chips to caused by if signal sampling the defects of high-speed data-flow；FPGA is as whole
The main control chip of individual radar system, both can be used for signal transacting, can be used for the control of complete machine sequential and emitter, be even more
The core control portions of servo-drive system so that the design of whole radar system is compacter.
5. realize the functions such as digital mixer, low pass filter using the IP kernel in FPGA, stable performance, flexibility and can
Transplantability is strong, can also reduce design cost, saves debug time.
Brief description of the drawings
Fig. 1 is the general frame of the marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA.
Fig. 2 is analog-to-digital conversion control module（ADC）Block diagram.
Fig. 3 is the digital controlled oscillator based on look-up table（NCO）Module frame chart.
Fig. 4 is digital decimation module frame chart.
Embodiment
Technical scheme, technical characteristic, reached purpose and effect to realize the present invention are easy to understand, with reference to
Embodiment, the present invention is expanded on further.
Marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA is included under intermediate frequency amplification module and numeral
Two parts of frequency-variable module.Intermediate frequency amplifier section includes putting plate in the 60MHz intermediate-freuqncy signals process of receiver front end output by greatly
The voltage change that the EF power signal of dynamic range is changed into -1.7V ~+1.7V delivers to 16 ADC chips（That is A/D samples core
Piece）Analog input end is straight by interface after sampling control signal that ADC chips export according to time schedule controller collection reception signal
Connect and be defeated by FPGA.Wherein A/D change-over circuits（That is ADC chips）It is embedded in fpga chip；Digital Down Convert part includes being based on
The realization of FPGA digital controlled oscillator, digital filter and digital decimation.It is to utilize to calculate that digital controlled oscillator, which is based on look-up table,
Sine and cosine assignment deposit ROM tables realize two-way orthogonal signalling to be mixed, the IP in digital filter and extraction calling FPGA
Core is realized.
As shown in Figure 1.Radar antenna goes out electromagnetic wave with the beam transmission designed, and receives the electricity that target reflects
Magnetic wave, receiver choose the faint high frequency echo signal that antenna receives from noise and interference, receiver front end（I.e.
Receiver rf front-end）The 60MHz intermediate-freuqncy signals of output realized after intermediate frequency amplification module envelope detection to echo-signal and
Amplification etc. processing after, A/D sampling A/D chips according to sampling control signal carry out bandpass sampling after by the reception signal of collection by connecing
Mouth is directly defeated by FPGA and handled for Digital Down Convert, and it is further later finally to produce 16 orthogonal I, Q two paths of signals use
Digital Signal Processing operates.Wherein, the baseband signal in figure refers to by being obtained after digitised Intermediate Frequency coherent receiving processing system
Raw digital signal, the signal is non-modulated.
As shown in Figure 2.By carrying out clock division processing inside the PLL cores in FPGA, produce 80MHz output clocks and provide
To ADC chips as sample frequency, and sampling control signal is provided, the voltage signal after intermediate frequency is amplified carries out the A/D of 16
Sampling.
As shown in Figure 3.The design of the system digital controlled oscillator include FREQUENCY CONTROL word register, 32 phase accumulators,
Phase controlling word register, 16 bit address generators, Wave data etc..Frequency control word is that step-length progress is phase-accumulated, and
By the use of the accumulated value as the address of storage table, the assignment for reading corresponding address in sine and cosine table is exported, and passes through FREQUENCY CONTROL
The input of word controls output frequency.
As shown in Figure 4.Filtering extraction is exactly to filter out high-frequency information from signal to reduce sample rate without causing frequency with inch
Compose the process of aliasing.Many multipliers can be saved using cic filter in the first order of cascading filter while can be realized
High data transfer rate input, selects 5 times of extractions.Two-stage FIR filter is used below, realizes 4 times and 2 times extractions respectively.
General principle, principal character and the advantages of the present invention of the present invention has been shown and described above.The technology of the industry
Personnel are it should be appreciated that the present invention is not limited to the above embodiments, and the simply explanation described in above-described embodiment and specification is originally
The principle of invention, without departing from the spirit and scope of the present invention, various changes and modifications of the present invention are possible, these changes
Change and improvement all fall within the protetion scope of the claimed invention.The claimed scope of the invention by appended claims and its
Equivalent thereof.
Claims (5)
1. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA, including it is defeated with receiver rf front-end
Go out the intermediate frequency amplification module of end connection, it is characterised in that also including A/D sampling A/D chips, Digital Down Converter Module, described numeral
Down conversion module includes the digital controlled oscillator based on FPGA, low pass filter and the decimation filter of digital sequentially set；Radio frequency
The EF power signal of receiving front-end output is changed into -1.7V ~+1.7V voltage signal by intermediate frequency amplification module, then conveys
To A/D sampling A/D chips, the sampling control signal collection voltages that A/D sampling A/D chips export according to the time schedule controller based on FPGA are believed
Digital Down Converter Module is conveyed to after number；
Described intermediate frequency amplification module includes the logafier and level adjusting circuit sequentially set；Intermediate frequency amplifier section is by
Plate and A/D sampling A/D chips is put to separate；Described decimation filter of digital is to be set based on FPGA application hardware description languages verilog
The cascading filter of meter, the first order of cascading filter use the cic filter of 5 times of extractions, what the second level was extracted using 4 times
FIR filter, the third level use the FIR filter of 2 times of extractions.
2. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1, its
It is characterised by, digital controlled oscillator is to realize that two-way I, Q are orthogonal using the sine and cosine assignment deposit ROM tables calculated based on look-up table
The mixing of signal, low pass filter and decimation filter of digital call the IP kernel in FPGA to realize.
3. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1 or 2,
Characterized in that, described digital controlled oscillator is designed based on FPGA application hardware description language verilog, using look-up table
Method, including FREQUENCY CONTROL word register, 32 phase accumulators, phase controlling word register, 16 bit address generators, waveform hair
Raw five parts of device ROM；Under the triggering of input clock, using described frequency control word as step value, posted with phase control words
Storage is used for depositing 32 phase values for representing frequency and being sent into the lump in accumulator tiring out using Altera adder progress phase
Add, the address of storage table is used as by the use of accumulated value；Waveform generator ROM is read-only sine and cosine look-up table, is reading corresponding address just
Cosine assignment is exported, and output frequency is controlled by the input of frequency control word.
4. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1 or 2,
Characterized in that, FPGA PLL cores inside carry out clock division processing and produce 80MHz output clock be supplied to A/D sample core
Piece is as sample frequency.
5. a kind of marine radar digitised Intermediate Frequency coherent receiving processing system based on FPGA according to claim 1, its
It is characterised by, the A/D that described A/D sampling A/D chips carry out 16 to voltage signal is sampled.
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| CN110596650A (en) * | 2019-08-05 | 2019-12-20 | 深圳普捷利科技有限公司 | Radar signal processing method, apparatus, digital radar receiver, and storage medium |
| CN111913154B (en) * | 2020-08-14 | 2021-09-14 | 成都亘波雷达科技有限公司 | Magnetron radar receiving phase parameter word processing method |
| CN112904285B (en) * | 2021-02-03 | 2023-12-15 | 北京航空航天大学杭州创新研究院 | Signal acquisition method and device based on FPGA chip |
| CN113485177A (en) * | 2021-06-24 | 2021-10-08 | 西安电子科技大学 | Multi-channel signal preprocessing system and method based on FPGA |
| CN114755630B (en) * | 2022-03-23 | 2023-06-16 | 中山大学 | Frequency modulation continuous wave radar based on SOC |
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